JPS52144910A - Clock extraction circuit - Google Patents

Clock extraction circuit

Info

Publication number
JPS52144910A
JPS52144910A JP4633376A JP4633376A JPS52144910A JP S52144910 A JPS52144910 A JP S52144910A JP 4633376 A JP4633376 A JP 4633376A JP 4633376 A JP4633376 A JP 4633376A JP S52144910 A JPS52144910 A JP S52144910A
Authority
JP
Japan
Prior art keywords
extraction circuit
clock extraction
level
base band
zitter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4633376A
Other languages
Japanese (ja)
Inventor
Norio Sugano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP4633376A priority Critical patent/JPS52144910A/en
Publication of JPS52144910A publication Critical patent/JPS52144910A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To decrease the zitter in the timing loop produced from DC drift, by detecting DC level of the base band NRZ pulse signal train and compensating the base band DC level by feedback.
JP4633376A 1976-04-22 1976-04-22 Clock extraction circuit Pending JPS52144910A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4633376A JPS52144910A (en) 1976-04-22 1976-04-22 Clock extraction circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4633376A JPS52144910A (en) 1976-04-22 1976-04-22 Clock extraction circuit

Publications (1)

Publication Number Publication Date
JPS52144910A true JPS52144910A (en) 1977-12-02

Family

ID=12744205

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4633376A Pending JPS52144910A (en) 1976-04-22 1976-04-22 Clock extraction circuit

Country Status (1)

Country Link
JP (1) JPS52144910A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04137839A (en) * 1990-09-28 1992-05-12 Anritsu Corp Nrz signal clock reproducing circuit
JP2008020297A (en) * 2006-07-12 2008-01-31 Anritsu Corp Sampling apparatus and waveform observing apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04137839A (en) * 1990-09-28 1992-05-12 Anritsu Corp Nrz signal clock reproducing circuit
JP2008020297A (en) * 2006-07-12 2008-01-31 Anritsu Corp Sampling apparatus and waveform observing apparatus

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