JPS52137219A - Address control system of buffer memory - Google Patents
Address control system of buffer memoryInfo
- Publication number
- JPS52137219A JPS52137219A JP5326276A JP5326276A JPS52137219A JP S52137219 A JPS52137219 A JP S52137219A JP 5326276 A JP5326276 A JP 5326276A JP 5326276 A JP5326276 A JP 5326276A JP S52137219 A JPS52137219 A JP S52137219A
- Authority
- JP
- Japan
- Prior art keywords
- buffer memory
- control system
- address control
- address
- prefix conversion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Multi Processors (AREA)
- Memory System (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP51053262A JPS5811655B2 (ja) | 1976-05-12 | 1976-05-12 | バッファ記憶装置のアドレス制御方式 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP51053262A JPS5811655B2 (ja) | 1976-05-12 | 1976-05-12 | バッファ記憶装置のアドレス制御方式 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS52137219A true JPS52137219A (en) | 1977-11-16 |
JPS5811655B2 JPS5811655B2 (ja) | 1983-03-04 |
Family
ID=12937850
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP51053262A Expired JPS5811655B2 (ja) | 1976-05-12 | 1976-05-12 | バッファ記憶装置のアドレス制御方式 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5811655B2 (ja) |
-
1976
- 1976-05-12 JP JP51053262A patent/JPS5811655B2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5811655B2 (ja) | 1983-03-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS5226124A (en) | Buffer memory control unit | |
JPS5267929A (en) | Instruction control system | |
JPS5242032A (en) | Data processing unit | |
JPS5373927A (en) | Replacing system of intermediate buffer memory | |
JPS5235946A (en) | Memory control unit | |
JPS53115129A (en) | Time axis correcting device | |
JPS5271951A (en) | Branch system for micro program | |
JPS52137219A (en) | Address control system of buffer memory | |
JPS5214322A (en) | Data processing unit | |
JPS5235947A (en) | Information processing unit for imaginary memory system | |
JPS5282149A (en) | Instruction address control system | |
JPS53129688A (en) | Timing system | |
JPS51138335A (en) | Control system for control memory | |
JPS524741A (en) | Memory control system | |
JPS5216233A (en) | Record medium | |
JPS53109443A (en) | Data processor | |
JPS52129241A (en) | Memory control system | |
JPS5236951A (en) | Computer system | |
JPS5394142A (en) | Input/output control system | |
JPS51132047A (en) | Address extension method | |
JPS5391519A (en) | Write timing control system | |
JPS51124339A (en) | Circuit control system | |
JPS51111366A (en) | Effective value transformation apparatus | |
JPS522141A (en) | Interruption control system | |
JPS5220731A (en) | Memory busy control system |