JPS5162359A - Denkisoshino toritsukehoho - Google Patents

Denkisoshino toritsukehoho

Info

Publication number
JPS5162359A
JPS5162359A JP13689074A JP13689074A JPS5162359A JP S5162359 A JPS5162359 A JP S5162359A JP 13689074 A JP13689074 A JP 13689074A JP 13689074 A JP13689074 A JP 13689074A JP S5162359 A JPS5162359 A JP S5162359A
Authority
JP
Japan
Prior art keywords
toritsukehoho
denkisoshino
denkisoshino toritsukehoho
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13689074A
Other languages
Japanese (ja)
Inventor
Hideo Fujii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP13689074A priority Critical patent/JPS5162359A/en
Publication of JPS5162359A publication Critical patent/JPS5162359A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83193—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83194—Lateral distribution of the layer connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
JP13689074A 1974-11-28 1974-11-28 Denkisoshino toritsukehoho Pending JPS5162359A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13689074A JPS5162359A (en) 1974-11-28 1974-11-28 Denkisoshino toritsukehoho

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13689074A JPS5162359A (en) 1974-11-28 1974-11-28 Denkisoshino toritsukehoho

Publications (1)

Publication Number Publication Date
JPS5162359A true JPS5162359A (en) 1976-05-29

Family

ID=15185933

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13689074A Pending JPS5162359A (en) 1974-11-28 1974-11-28 Denkisoshino toritsukehoho

Country Status (1)

Country Link
JP (1) JPS5162359A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55130135A (en) * 1979-03-30 1980-10-08 Fujitsu Ltd Semiconductor device
JPS55145395A (en) * 1979-04-27 1980-11-12 Matsushita Electric Ind Co Ltd Method of connecting printed circuit board
JPS59220281A (en) * 1983-05-28 1984-12-11 Nippon Light Metal Co Ltd Brazing and joining method of metallic body
JPS59223158A (en) * 1983-06-03 1984-12-14 Nippon Light Metal Co Ltd Brazing method of metallic body
JPS60121456U (en) * 1984-01-21 1985-08-16 株式会社明電舎 Brazed structure
JPS6144494A (en) * 1984-08-09 1986-03-04 ソニー株式会社 Electric connector
JP2006351927A (en) * 2005-06-17 2006-12-28 Auto Network Gijutsu Kenkyusho:Kk Semiconductor device, circuit board, and electric connection box
JP2013084960A (en) * 2011-10-11 2013-05-09 Led Engin Inc Grooved plate for solder joint
CN109273423A (en) * 2018-08-22 2019-01-25 宁波天炬光电科技有限公司 Chip structure, wafer-level package enhancing structure and method
CN110544739A (en) * 2019-09-02 2019-12-06 闽南师范大学 Flip red light chip and manufacturing method thereof

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55130135A (en) * 1979-03-30 1980-10-08 Fujitsu Ltd Semiconductor device
JPS55145395A (en) * 1979-04-27 1980-11-12 Matsushita Electric Ind Co Ltd Method of connecting printed circuit board
JPS6232636B2 (en) * 1979-04-27 1987-07-15 Matsushita Electric Ind Co Ltd
JPS59220281A (en) * 1983-05-28 1984-12-11 Nippon Light Metal Co Ltd Brazing and joining method of metallic body
JPS59223158A (en) * 1983-06-03 1984-12-14 Nippon Light Metal Co Ltd Brazing method of metallic body
JPS60121456U (en) * 1984-01-21 1985-08-16 株式会社明電舎 Brazed structure
JPS6144494A (en) * 1984-08-09 1986-03-04 ソニー株式会社 Electric connector
JPH0576797B2 (en) * 1984-08-09 1993-10-25 Sony Corp
JP2006351927A (en) * 2005-06-17 2006-12-28 Auto Network Gijutsu Kenkyusho:Kk Semiconductor device, circuit board, and electric connection box
JP2013084960A (en) * 2011-10-11 2013-05-09 Led Engin Inc Grooved plate for solder joint
CN109273423A (en) * 2018-08-22 2019-01-25 宁波天炬光电科技有限公司 Chip structure, wafer-level package enhancing structure and method
CN110544739A (en) * 2019-09-02 2019-12-06 闽南师范大学 Flip red light chip and manufacturing method thereof

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