JPS5149192B2 - - Google Patents
Info
- Publication number
- JPS5149192B2 JPS5149192B2 JP48070343A JP7034373A JPS5149192B2 JP S5149192 B2 JPS5149192 B2 JP S5149192B2 JP 48070343 A JP48070343 A JP 48070343A JP 7034373 A JP7034373 A JP 7034373A JP S5149192 B2 JPS5149192 B2 JP S5149192B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Die Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Hall/Mr Elements (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP48070343A JPS5149192B2 (cs) | 1973-06-20 | 1973-06-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP48070343A JPS5149192B2 (cs) | 1973-06-20 | 1973-06-20 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5019361A JPS5019361A (cs) | 1975-02-28 |
| JPS5149192B2 true JPS5149192B2 (cs) | 1976-12-24 |
Family
ID=13428661
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP48070343A Expired JPS5149192B2 (cs) | 1973-06-20 | 1973-06-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5149192B2 (cs) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54148405A (en) * | 1978-05-15 | 1979-11-20 | Nippon Telegr & Teleph Corp <Ntt> | Terminal control system by exchange |
| JPS5566165A (en) * | 1978-11-13 | 1980-05-19 | Sankyo Birudeingu Kk | Information control service system |
| JPS5839048U (ja) * | 1981-09-08 | 1983-03-14 | 三菱電機株式会社 | 半導体装置 |
| JPS60130149A (ja) * | 1983-12-16 | 1985-07-11 | Seiko Instr & Electronics Ltd | Ｉｃパツケ−ジ |
| JPS63211638A (ja) * | 1988-01-08 | 1988-09-02 | Nec Home Electronics Ltd | 樹脂封止型半導体装置の製造方法 |
-
1973
- 1973-06-20 JP JP48070343A patent/JPS5149192B2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5019361A (cs) | 1975-02-28 |