JPS5134371U - - Google Patents
Info
- Publication number
- JPS5134371U JPS5134371U JP1974107282U JP10728274U JPS5134371U JP S5134371 U JPS5134371 U JP S5134371U JP 1974107282 U JP1974107282 U JP 1974107282U JP 10728274 U JP10728274 U JP 10728274U JP S5134371 U JPS5134371 U JP S5134371U
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
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- G—PHYSICS
- G04—HOROLOGY
- G04G—ELECTRONIC TIME-PIECES
- G04G17/00—Structural details; Housings
- G04G17/02—Component assemblies
- G04G17/04—Mounting of electronic components
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- G—PHYSICS
- G04—HOROLOGY
- G04C—ELECTROMECHANICAL CLOCKS OR WATCHES
- G04C10/00—Arrangements of electric power supplies in time pieces
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05553—Shape in top view being rectangular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electric Clocks (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Electromechanical Clocks (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1974107282U JPS5623892Y2 (de) | 1974-09-06 | 1974-09-06 | |
| DE19752539604 DE2539604A1 (de) | 1974-09-06 | 1975-09-05 | Integrierte schaltungseinheit fuer eine elektrische uhr |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1974107282U JPS5623892Y2 (de) | 1974-09-06 | 1974-09-06 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5134371U true JPS5134371U (de) | 1976-03-13 |
| JPS5623892Y2 JPS5623892Y2 (de) | 1981-06-04 |
Family
ID=14455112
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1974107282U Expired JPS5623892Y2 (de) | 1974-09-06 | 1974-09-06 |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPS5623892Y2 (de) |
| DE (1) | DE2539604A1 (de) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3427908C2 (de) * | 1984-07-28 | 1986-10-02 | Gebrüder Junghans GmbH, 7230 Schramberg | Verfahren zum Herstellen des Schaltungsträgers eines elektromechanischen Uhrwerks und nach solchem Verfahren herstellbarer Schaltungsträger |
| US4796239A (en) * | 1986-05-08 | 1989-01-03 | Seikosha Co., Ltd. | Circuit unit for timepiece and process for fabricating the same |
| CH680252B5 (de) * | 1990-08-21 | 1993-01-29 | Ebauchesfabrik Eta Ag |
-
1974
- 1974-09-06 JP JP1974107282U patent/JPS5623892Y2/ja not_active Expired
-
1975
- 1975-09-05 DE DE19752539604 patent/DE2539604A1/de not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5623892Y2 (de) | 1981-06-04 |
| DE2539604A1 (de) | 1976-03-25 |