JPS5117669A - HANDOTA ISOCHI - Google Patents

HANDOTA ISOCHI

Info

Publication number
JPS5117669A
JPS5117669A JP9001174A JP9001174A JPS5117669A JP S5117669 A JPS5117669 A JP S5117669A JP 9001174 A JP9001174 A JP 9001174A JP 9001174 A JP9001174 A JP 9001174A JP S5117669 A JPS5117669 A JP S5117669A
Authority
JP
Japan
Prior art keywords
handota
isochi
handota isochi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9001174A
Other languages
Japanese (ja)
Other versions
JPS5523462B2 (en
Inventor
Isamu Kitahiro
Masahide Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP9001174A priority Critical patent/JPS5117669A/en
Publication of JPS5117669A publication Critical patent/JPS5117669A/en
Publication of JPS5523462B2 publication Critical patent/JPS5523462B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP9001174A 1974-08-05 1974-08-05 HANDOTA ISOCHI Granted JPS5117669A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9001174A JPS5117669A (en) 1974-08-05 1974-08-05 HANDOTA ISOCHI

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9001174A JPS5117669A (en) 1974-08-05 1974-08-05 HANDOTA ISOCHI

Publications (2)

Publication Number Publication Date
JPS5117669A true JPS5117669A (en) 1976-02-12
JPS5523462B2 JPS5523462B2 (en) 1980-06-23

Family

ID=13986707

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9001174A Granted JPS5117669A (en) 1974-08-05 1974-08-05 HANDOTA ISOCHI

Country Status (1)

Country Link
JP (1) JPS5117669A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57201053A (en) * 1981-06-04 1982-12-09 Nec Ic Microcomput Syst Ltd Sealing method for semiconductor device
JPS61294844A (en) * 1985-06-21 1986-12-25 Sony Corp Semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4823333U (en) * 1971-07-26 1973-03-16

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4823333U (en) * 1971-07-26 1973-03-16

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57201053A (en) * 1981-06-04 1982-12-09 Nec Ic Microcomput Syst Ltd Sealing method for semiconductor device
JPS61294844A (en) * 1985-06-21 1986-12-25 Sony Corp Semiconductor device

Also Published As

Publication number Publication date
JPS5523462B2 (en) 1980-06-23

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