JPS51117834A - Method of manufacturing 3d memory and device therefor - Google Patents
Method of manufacturing 3d memory and device thereforInfo
- Publication number
- JPS51117834A JPS51117834A JP50039887A JP3988775A JPS51117834A JP S51117834 A JPS51117834 A JP S51117834A JP 50039887 A JP50039887 A JP 50039887A JP 3988775 A JP3988775 A JP 3988775A JP S51117834 A JPS51117834 A JP S51117834A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- manufacturing
- device therefor
- therefor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/06—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using single-aperture storage elements, e.g. ring core; using multi-aperture plates in which each individual aperture forms a storage element
- G11C11/06007—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using single-aperture storage elements, e.g. ring core; using multi-aperture plates in which each individual aperture forms a storage element using a single aperture or single magnetic closed circuit
- G11C11/06014—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using single-aperture storage elements, e.g. ring core; using multi-aperture plates in which each individual aperture forms a storage element using a single aperture or single magnetic closed circuit using one such element per bit
- G11C11/06021—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using single-aperture storage elements, e.g. ring core; using multi-aperture plates in which each individual aperture forms a storage element using a single aperture or single magnetic closed circuit using one such element per bit with destructive read-out
- G11C11/06028—Matrixes
- G11C11/06035—Bit core selection for writing or reading, by at least two coincident partial currents, e.g. "bit"- organised, 2L/2D, or 3D
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/12—Apparatus or processes for interconnecting storage elements, e.g. for threading magnetic cores
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Magnetic Heads (AREA)
- Wire Processing (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| SU7402011776A SU493160A1 (ru) | 1974-04-03 | 1974-04-03 | Способ изготовлени накопител пам ти |
| SU2016331 | 1974-04-08 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS51117834A true JPS51117834A (en) | 1976-10-16 |
| JPS5522868B2 JPS5522868B2 (ja) | 1980-06-19 |
Family
ID=26665510
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50039887A Granted JPS51117834A (en) | 1974-04-03 | 1975-04-03 | Method of manufacturing 3d memory and device therefor |
Country Status (11)
| Country | Link |
|---|---|
| JP (1) | JPS51117834A (ja) |
| BG (1) | BG25950A1 (ja) |
| CH (1) | CH607229A5 (ja) |
| CS (1) | CS174004B1 (ja) |
| DD (1) | DD117136A1 (ja) |
| DE (1) | DE2513518A1 (ja) |
| DK (1) | DK136195B (ja) |
| FR (1) | FR2266938A1 (ja) |
| IT (1) | IT1043966B (ja) |
| NL (2) | NL165319C (ja) |
| SE (1) | SE408239B (ja) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58133861U (ja) * | 1982-03-03 | 1983-09-09 | 日本電気株式会社 | タグコ−ド読取り装置 |
| US10445831B2 (en) * | 2015-12-02 | 2019-10-15 | Peter Seilern | System, method, and device for autonomous fund management by computer-based algorithms |
-
1975
- 1975-03-26 DE DE19752513518 patent/DE2513518A1/de active Granted
- 1975-03-27 CS CS2126A patent/CS174004B1/cs unknown
- 1975-04-01 CH CH410475A patent/CH607229A5/xx not_active IP Right Cessation
- 1975-04-01 NL NL7503817.A patent/NL165319C/xx not_active IP Right Cessation
- 1975-04-01 DD DD185143A patent/DD117136A1/xx unknown
- 1975-04-02 FR FR7510286A patent/FR2266938A1/fr active Granted
- 1975-04-02 DK DK141375AA patent/DK136195B/da not_active IP Right Cessation
- 1975-04-02 SE SE7503764A patent/SE408239B/xx unknown
- 1975-04-02 IT IT21938/75A patent/IT1043966B/it active
- 1975-04-03 JP JP50039887A patent/JPS51117834A/ja active Granted
- 1975-04-03 BG BG7529526A patent/BG25950A1/xx unknown
-
1978
- 1978-10-02 NL NL7809911A patent/NL7809911A/xx not_active Application Discontinuation
Also Published As
| Publication number | Publication date |
|---|---|
| NL165319B (nl) | 1980-10-15 |
| CH607229A5 (ja) | 1978-11-30 |
| FR2266938A1 (en) | 1975-10-31 |
| DK136195B (da) | 1977-08-29 |
| DE2513518A1 (de) | 1975-10-30 |
| NL165319C (nl) | 1981-03-16 |
| DK141375A (ja) | 1975-10-04 |
| BG25950A1 (ja) | 1979-01-12 |
| CS174004B1 (ja) | 1977-03-31 |
| DK136195C (ja) | 1978-01-30 |
| DE2513518B2 (ja) | 1978-06-22 |
| FR2266938B1 (ja) | 1977-04-15 |
| NL7503817A (nl) | 1975-10-07 |
| IT1043966B (it) | 1980-02-29 |
| SE408239B (sv) | 1979-05-21 |
| DE2513518C3 (ja) | 1979-02-22 |
| NL7809911A (nl) | 1979-01-31 |
| JPS5522868B2 (ja) | 1980-06-19 |
| DD117136A1 (ja) | 1975-12-20 |
| SE7503764L (sv) | 1975-10-06 |
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