JPS51109774A - - Google Patents

Info

Publication number
JPS51109774A
JPS51109774A JP50034695A JP3469575A JPS51109774A JP S51109774 A JPS51109774 A JP S51109774A JP 50034695 A JP50034695 A JP 50034695A JP 3469575 A JP3469575 A JP 3469575A JP S51109774 A JPS51109774 A JP S51109774A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50034695A
Other languages
Japanese (ja)
Inventor
Manabu Bonshihara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP50034695A priority Critical patent/JPS51109774A/ja
Publication of JPS51109774A publication Critical patent/JPS51109774A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/536Shapes of wire connectors the connected ends being ball-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/59Bond pads specially adapted therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • H10W72/932Plan-view shape, i.e. in top view
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP50034695A 1975-03-20 1975-03-20 Pending JPS51109774A (https=)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50034695A JPS51109774A (https=) 1975-03-20 1975-03-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50034695A JPS51109774A (https=) 1975-03-20 1975-03-20

Publications (1)

Publication Number Publication Date
JPS51109774A true JPS51109774A (https=) 1976-09-28

Family

ID=12421497

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50034695A Pending JPS51109774A (https=) 1975-03-20 1975-03-20

Country Status (1)

Country Link
JP (1) JPS51109774A (https=)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55141743A (en) * 1979-04-23 1980-11-05 Hitachi Ltd Lead frame
JPS5895833A (ja) * 1981-12-02 1983-06-07 Matsushita Electronics Corp リ−ドフレ−ム
JPH0348230U (https=) * 1989-09-16 1991-05-08
JP2009049072A (ja) * 2007-08-15 2009-03-05 Panasonic Corp リードフレーム、半導体装置、リードフレームの製造方法、および半導体装置の製造方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55141743A (en) * 1979-04-23 1980-11-05 Hitachi Ltd Lead frame
JPS5895833A (ja) * 1981-12-02 1983-06-07 Matsushita Electronics Corp リ−ドフレ−ム
JPH0348230U (https=) * 1989-09-16 1991-05-08
JP2009049072A (ja) * 2007-08-15 2009-03-05 Panasonic Corp リードフレーム、半導体装置、リードフレームの製造方法、および半導体装置の製造方法

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