JPS5066218A - - Google Patents
Info
- Publication number
- JPS5066218A JPS5066218A JP11527274A JP11527274A JPS5066218A JP S5066218 A JPS5066218 A JP S5066218A JP 11527274 A JP11527274 A JP 11527274A JP 11527274 A JP11527274 A JP 11527274A JP S5066218 A JPS5066218 A JP S5066218A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
- G11B20/1426—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code conversion to or from block codes or representations thereof
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Dc Digital Transmission (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US404231A US3905029A (en) | 1970-12-01 | 1973-10-09 | Method and apparatus for encoding and decoding digital data |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5066218A true JPS5066218A (ja) | 1975-06-04 |
Family
ID=23598729
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11527274A Pending JPS5066218A (ja) | 1973-10-09 | 1974-10-08 |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPS5066218A (ja) |
| DE (1) | DE2441576A1 (ja) |
| FR (1) | FR2247027A2 (ja) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU542859B2 (en) * | 1979-12-28 | 1985-03-21 | Sony Corporation | Method for digital encoding/decoding |
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1974
- 1974-08-30 DE DE19742441576 patent/DE2441576A1/de active Pending
- 1974-10-08 FR FR7433781A patent/FR2247027A2/fr active Granted
- 1974-10-08 JP JP11527274A patent/JPS5066218A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| FR2247027B2 (ja) | 1977-07-08 |
| DE2441576A1 (de) | 1975-04-10 |
| FR2247027A2 (en) | 1975-05-02 |