JPS506279A - - Google Patents

Info

Publication number
JPS506279A
JPS506279A JP5463173A JP5463173A JPS506279A JP S506279 A JPS506279 A JP S506279A JP 5463173 A JP5463173 A JP 5463173A JP 5463173 A JP5463173 A JP 5463173A JP S506279 A JPS506279 A JP S506279A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5463173A
Other languages
Japanese (ja)
Other versions
JPS5226989B2 (enrdf_load_stackoverflow
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5463173A priority Critical patent/JPS5226989B2/ja
Publication of JPS506279A publication Critical patent/JPS506279A/ja
Publication of JPS5226989B2 publication Critical patent/JPS5226989B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8592Applying permanent coating, e.g. protective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Casings For Electric Apparatus (AREA)
JP5463173A 1973-05-18 1973-05-18 Expired JPS5226989B2 (enrdf_load_stackoverflow)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5463173A JPS5226989B2 (enrdf_load_stackoverflow) 1973-05-18 1973-05-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5463173A JPS5226989B2 (enrdf_load_stackoverflow) 1973-05-18 1973-05-18

Publications (2)

Publication Number Publication Date
JPS506279A true JPS506279A (enrdf_load_stackoverflow) 1975-01-22
JPS5226989B2 JPS5226989B2 (enrdf_load_stackoverflow) 1977-07-18

Family

ID=12976089

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5463173A Expired JPS5226989B2 (enrdf_load_stackoverflow) 1973-05-18 1973-05-18

Country Status (1)

Country Link
JP (1) JPS5226989B2 (enrdf_load_stackoverflow)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54173668U (enrdf_load_stackoverflow) * 1978-05-29 1979-12-07
JPS56150830A (en) * 1980-04-25 1981-11-21 Hitachi Ltd Semiconductor device
JPS57188853A (en) * 1981-05-18 1982-11-19 Hitachi Ltd Plastic molded type semiconductor device
JPS58118297A (ja) * 1981-12-31 1983-07-14 共同印刷株式会社 識別カ−ドの製造方法
JPS6097646A (ja) * 1983-10-31 1985-05-31 Nitto Electric Ind Co Ltd 半導体装置
US4758875A (en) * 1981-04-30 1988-07-19 Hitachi, Ltd. Resin encapsulated semiconductor device
JPH02125644A (ja) * 1988-11-05 1990-05-14 Seiko Epson Corp 樹脂封止半導体装置
US4933744A (en) * 1980-09-22 1990-06-12 Hitachi, Ltd. Resin encapsulated electronic devices

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54173668U (enrdf_load_stackoverflow) * 1978-05-29 1979-12-07
JPS56150830A (en) * 1980-04-25 1981-11-21 Hitachi Ltd Semiconductor device
US4933744A (en) * 1980-09-22 1990-06-12 Hitachi, Ltd. Resin encapsulated electronic devices
US4758875A (en) * 1981-04-30 1988-07-19 Hitachi, Ltd. Resin encapsulated semiconductor device
JPS57188853A (en) * 1981-05-18 1982-11-19 Hitachi Ltd Plastic molded type semiconductor device
JPS58118297A (ja) * 1981-12-31 1983-07-14 共同印刷株式会社 識別カ−ドの製造方法
JPS6097646A (ja) * 1983-10-31 1985-05-31 Nitto Electric Ind Co Ltd 半導体装置
JPH02125644A (ja) * 1988-11-05 1990-05-14 Seiko Epson Corp 樹脂封止半導体装置

Also Published As

Publication number Publication date
JPS5226989B2 (enrdf_load_stackoverflow) 1977-07-18

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