JPS5057162A - - Google Patents
Info
- Publication number
- JPS5057162A JPS5057162A JP48104717A JP10471773A JPS5057162A JP S5057162 A JPS5057162 A JP S5057162A JP 48104717 A JP48104717 A JP 48104717A JP 10471773 A JP10471773 A JP 10471773A JP S5057162 A JPS5057162 A JP S5057162A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Logic Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP48104717A JPS5057162A (ja) | 1973-09-17 | 1973-09-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP48104717A JPS5057162A (ja) | 1973-09-17 | 1973-09-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5057162A true JPS5057162A (ja) | 1975-05-19 |
Family
ID=14388223
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP48104717A Pending JPS5057162A (ja) | 1973-09-17 | 1973-09-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5057162A (ja) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61154313A (ja) * | 1984-12-27 | 1986-07-14 | Seikosha Co Ltd | 出力インバ−タの貫通電流防止回路 |
| JPH0563548A (ja) * | 1991-08-29 | 1993-03-12 | Nec Corp | 論理回路 |
| JP2014027657A (ja) * | 2012-07-24 | 2014-02-06 | Analog Devices Inc | 高速シリアルトランスミッタ用のアーキテクチャ |
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1973
- 1973-09-17 JP JP48104717A patent/JPS5057162A/ja active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61154313A (ja) * | 1984-12-27 | 1986-07-14 | Seikosha Co Ltd | 出力インバ−タの貫通電流防止回路 |
| JPH0563548A (ja) * | 1991-08-29 | 1993-03-12 | Nec Corp | 論理回路 |
| JP2014027657A (ja) * | 2012-07-24 | 2014-02-06 | Analog Devices Inc | 高速シリアルトランスミッタ用のアーキテクチャ |