JPS5023950B1 - - Google Patents

Info

Publication number
JPS5023950B1
JPS5023950B1 JP45079406A JP7940670A JPS5023950B1 JP S5023950 B1 JPS5023950 B1 JP S5023950B1 JP 45079406 A JP45079406 A JP 45079406A JP 7940670 A JP7940670 A JP 7940670A JP S5023950 B1 JPS5023950 B1 JP S5023950B1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP45079406A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS5023950B1 publication Critical patent/JPS5023950B1/ja
Pending legal-status Critical Current

Links

Classifications

    • H10W72/90
    • H10W72/50
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/4501Shape
    • H01L2224/45012Cross-sectional shape
    • H01L2224/45015Cross-sectional shape being circular
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • H10W72/01515
    • H10W72/075
    • H10W72/07521
    • H10W72/07532
    • H10W72/07533
    • H10W72/5363
    • H10W72/5445
    • H10W72/5449
    • H10W72/5522
    • H10W72/5524
    • H10W72/932
    • H10W90/753
    • H10W90/754
    • H10W90/756
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S228/00Metal fusion bonding
    • Y10S228/904Wire bonding

Landscapes

  • Wire Bonding (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
JP45079406A 1969-09-11 1970-09-11 Pending JPS5023950B1 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL6913812A NL6913812A (ja) 1969-09-11 1969-09-11

Publications (1)

Publication Number Publication Date
JPS5023950B1 true JPS5023950B1 (ja) 1975-08-12

Family

ID=19807875

Family Applications (1)

Application Number Title Priority Date Filing Date
JP45079406A Pending JPS5023950B1 (ja) 1969-09-11 1970-09-11

Country Status (8)

Country Link
US (1) US3707655A (ja)
JP (1) JPS5023950B1 (ja)
BE (1) BE755950A (ja)
CH (1) CH513521A (ja)
DE (1) DE2043297A1 (ja)
FR (1) FR2061243A5 (ja)
GB (1) GB1322788A (ja)
NL (1) NL6913812A (ja)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3801881A (en) * 1971-10-30 1974-04-02 Nippon Electric Co Packaged semiconductor device including a housing in the form of a rectangular parallelepiped and ceramic rectangular base member
US3984860A (en) * 1973-06-04 1976-10-05 International Business Machines Corporation Multi-function LSI wafers
AU507497B2 (en) * 1975-06-26 1980-02-14 Kollmorgen Corp. Coupling continuous conductive filaments toan element
JPS575887Y2 (ja) * 1976-08-23 1982-02-03
DE3106376A1 (de) * 1981-02-20 1982-09-09 Siemens AG, 1000 Berlin und 8000 München Halbleiteranordnung mit aus blech ausgeschnittenen anschlussleitern
JPS59125644A (ja) * 1982-12-29 1984-07-20 Fujitsu Ltd 半導体装置
US6664620B2 (en) * 1999-06-29 2003-12-16 Intel Corporation Integrated circuit die and/or package having a variable pitch contact array for maximization of number of signal lines per routing layer

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL142018B (nl) * 1964-11-26 1974-04-16 Philips Nv Werkwijze tot het vervaardigen van een halfgeleidende inrichting en inrichting vervaardigd volgens de werkwijze.
US3537175A (en) * 1966-11-09 1970-11-03 Advalloy Inc Lead frame for semiconductor devices and method for making same
US3539259A (en) * 1967-07-07 1970-11-10 Mitronics Inc Method of making lead array for connection to miniature electrical device such as a chip
GB1152809A (en) * 1968-05-07 1969-05-21 Standard Telephones Cables Ltd Electric Circuit Assembly

Also Published As

Publication number Publication date
NL6913812A (ja) 1971-03-15
CH513521A (de) 1971-09-30
US3707655A (en) 1972-12-26
FR2061243A5 (ja) 1971-06-18
GB1322788A (en) 1973-07-11
BE755950A (fr) 1971-03-09
DE2043297A1 (de) 1971-03-18

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