JPS50131493A - - Google Patents

Info

Publication number
JPS50131493A
JPS50131493A JP50036536A JP3653675A JPS50131493A JP S50131493 A JPS50131493 A JP S50131493A JP 50036536 A JP50036536 A JP 50036536A JP 3653675 A JP3653675 A JP 3653675A JP S50131493 A JPS50131493 A JP S50131493A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50036536A
Other languages
Japanese (ja)
Other versions
JPS5836512B2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS50131493A publication Critical patent/JPS50131493A/ja
Publication of JPS5836512B2 publication Critical patent/JPS5836512B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5386Geometry or layout of the interconnection structure
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/06Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Geometry (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Structure Of Printed Boards (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Combinations Of Printed Boards (AREA)
JP50036536A 1974-03-28 1975-03-26 半導体メモリチツプの接続のための端子面配列を持つマルチチツプ配線 Expired JPS5836512B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE2415047 1974-03-28
DE19742415047 DE2415047B2 (de) 1974-03-28 1974-03-28 Multichip-verdrahtung mit anschlussflaechenkonfigurationen zur kontaktierung von vier gleichen halbleiterspeicher-chips

Publications (2)

Publication Number Publication Date
JPS50131493A true JPS50131493A (nl) 1975-10-17
JPS5836512B2 JPS5836512B2 (ja) 1983-08-09

Family

ID=5911463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50036536A Expired JPS5836512B2 (ja) 1974-03-28 1975-03-26 半導体メモリチツプの接続のための端子面配列を持つマルチチツプ配線

Country Status (8)

Country Link
JP (1) JPS5836512B2 (nl)
BE (1) BE827367A (nl)
DE (1) DE2415047B2 (nl)
FR (1) FR2266305B1 (nl)
GB (1) GB1464080A (nl)
IT (1) IT1034529B (nl)
NL (1) NL7502773A (nl)
SE (1) SE7503369L (nl)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3033900C3 (de) * 1980-09-09 1994-12-15 Siemens Ag Gehäuseloses Schaltungsmodul und Verfahren zu seiner Herstellung
DE3123620A1 (de) * 1981-06-13 1983-01-05 Telefonbau Und Normalzeit Gmbh, 6000 Frankfurt Anordnung zum verbinden eines speichers mit einer steuereinrichtung
JPS57207356A (en) * 1981-06-15 1982-12-20 Fujitsu Ltd Semiconductor device
JPH0279123U (nl) * 1988-12-02 1990-06-18
JPH02285910A (ja) * 1989-04-26 1990-11-26 Seijiro Isoi 鳥休止防止具
JPH052533U (ja) * 1991-02-25 1993-01-14 マサル工業株式会社 電線保護カバー
GB2312562B (en) * 1996-04-26 2000-05-17 Appliance Control Technology E A method of interconnecting wiring with a pcb

Also Published As

Publication number Publication date
DE2415047C3 (nl) 1978-09-21
BE827367A (fr) 1975-07-16
GB1464080A (en) 1977-02-09
NL7502773A (nl) 1975-09-30
SE7503369L (nl) 1975-09-29
IT1034529B (it) 1979-10-10
JPS5836512B2 (ja) 1983-08-09
FR2266305A1 (nl) 1975-10-24
DE2415047B2 (de) 1978-02-02
FR2266305B1 (nl) 1978-02-24
DE2415047A1 (de) 1975-10-16

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