JPS4966069A - - Google Patents

Info

Publication number
JPS4966069A
JPS4966069A JP10769572A JP10769572A JPS4966069A JP S4966069 A JPS4966069 A JP S4966069A JP 10769572 A JP10769572 A JP 10769572A JP 10769572 A JP10769572 A JP 10769572A JP S4966069 A JPS4966069 A JP S4966069A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10769572A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10769572A priority Critical patent/JPS4966069A/ja
Publication of JPS4966069A publication Critical patent/JPS4966069A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83193Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015Shape
    • H01L2924/10155Shape being other than a cuboid
    • H01L2924/10158Shape being other than a cuboid at the passive surface

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
JP10769572A 1972-10-27 1972-10-27 Pending JPS4966069A (enrdf_load_stackoverflow)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10769572A JPS4966069A (enrdf_load_stackoverflow) 1972-10-27 1972-10-27

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10769572A JPS4966069A (enrdf_load_stackoverflow) 1972-10-27 1972-10-27

Publications (1)

Publication Number Publication Date
JPS4966069A true JPS4966069A (enrdf_load_stackoverflow) 1974-06-26

Family

ID=14465594

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10769572A Pending JPS4966069A (enrdf_load_stackoverflow) 1972-10-27 1972-10-27

Country Status (1)

Country Link
JP (1) JPS4966069A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49115782A (enrdf_load_stackoverflow) * 1973-03-09 1974-11-05
JPS5323569A (en) * 1976-08-18 1978-03-04 Toshiba Corp Semiconductor device
JPS54156472A (en) * 1978-05-30 1979-12-10 Nec Corp Semiconductor integrated circuit device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4931275A (enrdf_load_stackoverflow) * 1972-07-20 1974-03-20

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4931275A (enrdf_load_stackoverflow) * 1972-07-20 1974-03-20

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49115782A (enrdf_load_stackoverflow) * 1973-03-09 1974-11-05
JPS5323569A (en) * 1976-08-18 1978-03-04 Toshiba Corp Semiconductor device
JPS54156472A (en) * 1978-05-30 1979-12-10 Nec Corp Semiconductor integrated circuit device

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