JPS494156A - - Google Patents
Info
- Publication number
- JPS494156A JPS494156A JP47043486A JP4348672A JPS494156A JP S494156 A JPS494156 A JP S494156A JP 47043486 A JP47043486 A JP 47043486A JP 4348672 A JP4348672 A JP 4348672A JP S494156 A JPS494156 A JP S494156A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP47043486A JPS494156A (de) | 1972-05-01 | 1972-05-01 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP47043486A JPS494156A (de) | 1972-05-01 | 1972-05-01 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS494156A true JPS494156A (de) | 1974-01-14 |
Family
ID=12665036
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP47043486A Pending JPS494156A (de) | 1972-05-01 | 1972-05-01 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS494156A (de) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5834772U (ja) * | 1981-08-31 | 1983-03-07 | 太陽誘電株式会社 | 電気回路装置 |
JPS6046090A (ja) * | 1983-08-24 | 1985-03-12 | シヤ−プ株式会社 | 電子回路基板 |
-
1972
- 1972-05-01 JP JP47043486A patent/JPS494156A/ja active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5834772U (ja) * | 1981-08-31 | 1983-03-07 | 太陽誘電株式会社 | 電気回路装置 |
JPS6046090A (ja) * | 1983-08-24 | 1985-03-12 | シヤ−プ株式会社 | 電子回路基板 |
JPH0219635B2 (de) * | 1983-08-24 | 1990-05-02 | Shaapu Kk |