JPS4936140B1 - - Google Patents

Info

Publication number
JPS4936140B1
JPS4936140B1 JP44074035A JP7403569A JPS4936140B1 JP S4936140 B1 JPS4936140 B1 JP S4936140B1 JP 44074035 A JP44074035 A JP 44074035A JP 7403569 A JP7403569 A JP 7403569A JP S4936140 B1 JPS4936140 B1 JP S4936140B1
Authority
JP
Japan
Prior art keywords
situations
actions
parameters
center
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP44074035A
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS4936140B1 publication Critical patent/JPS4936140B1/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/10—Geometric CAD
    • G06F30/18—Network design, e.g. design based on topological or interconnect aspects of utility systems, piping, heating ventilation air conditioning [HVAC] or cabling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2111/00—Details relating to CAD techniques
    • G06F2111/02—CAD in a network environment, e.g. collaborative CAD or distributed simulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2111/00—Details relating to CAD techniques
    • G06F2111/10—Numerical modelling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Geometry (AREA)
  • Evolutionary Computation (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Measuring Or Testing Involving Enzymes Or Micro-Organisms (AREA)
  • Memory System (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Semiconductor Memories (AREA)
JP44074035A 1968-09-19 1969-09-19 Pending JPS4936140B1 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR166845 1968-09-19

Publications (1)

Publication Number Publication Date
JPS4936140B1 true JPS4936140B1 (ja) 1974-09-27

Family

ID=8654744

Family Applications (1)

Application Number Title Priority Date Filing Date
JP44074035A Pending JPS4936140B1 (ja) 1968-09-19 1969-09-19

Country Status (9)

Country Link
US (1) US3651495A (ja)
JP (1) JPS4936140B1 (ja)
BE (1) BE739023A (ja)
CH (1) CH520983A (ja)
DE (1) DE1947461A1 (ja)
FR (1) FR1586706A (ja)
GB (1) GB1284422A (ja)
IL (1) IL33007A (ja)
NL (1) NL6914210A (ja)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5437276B2 (ja) * 1971-12-30 1979-11-14
US4210962A (en) * 1978-06-30 1980-07-01 Systems Control, Inc. Processor for dynamic programming
US4370732A (en) * 1980-09-15 1983-01-25 Ibm Corporation Skewed matrix address generator
GB2163883B (en) * 1984-08-29 1989-02-01 British Aerospace Data processing arrangement
FR2583539B1 (fr) * 1984-12-31 1991-05-24 Lehmann Jean Philippe Procede de construction de dispositifs d'activation simultanee de trains de commandes et applications aux memoires.
US5157595A (en) * 1985-07-19 1992-10-20 El Paso Technologies, Company Distributed logic control system and method
US4987604A (en) * 1989-06-02 1991-01-22 Delco Electronics Corporation Second opinion method of pattern recognition error reduction

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3292159A (en) * 1963-12-10 1966-12-13 Bunker Ramo Content addressable memory

Also Published As

Publication number Publication date
CH520983A (fr) 1972-03-31
US3651495A (en) 1972-03-21
DE1947461A1 (de) 1970-03-26
GB1284422A (en) 1972-08-09
IL33007A (en) 1972-01-27
NL6914210A (ja) 1970-03-23
FR1586706A (ja) 1970-02-27
BE739023A (ja) 1970-03-02
IL33007A0 (en) 1969-11-30

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