JPS4853676A - - Google Patents

Info

Publication number
JPS4853676A
JPS4853676A JP46088855A JP8885571A JPS4853676A JP S4853676 A JPS4853676 A JP S4853676A JP 46088855 A JP46088855 A JP 46088855A JP 8885571 A JP8885571 A JP 8885571A JP S4853676 A JPS4853676 A JP S4853676A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP46088855A
Other languages
Japanese (ja)
Other versions
JPS5339742B2 (enrdf_load_stackoverflow
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8885571A priority Critical patent/JPS5339742B2/ja
Publication of JPS4853676A publication Critical patent/JPS4853676A/ja
Publication of JPS5339742B2 publication Critical patent/JPS5339742B2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612Auxiliary members for layer connectors, e.g. spacers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
JP8885571A 1971-11-08 1971-11-08 Expired JPS5339742B2 (enrdf_load_stackoverflow)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8885571A JPS5339742B2 (enrdf_load_stackoverflow) 1971-11-08 1971-11-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8885571A JPS5339742B2 (enrdf_load_stackoverflow) 1971-11-08 1971-11-08

Publications (2)

Publication Number Publication Date
JPS4853676A true JPS4853676A (enrdf_load_stackoverflow) 1973-07-27
JPS5339742B2 JPS5339742B2 (enrdf_load_stackoverflow) 1978-10-23

Family

ID=13954585

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8885571A Expired JPS5339742B2 (enrdf_load_stackoverflow) 1971-11-08 1971-11-08

Country Status (1)

Country Link
JP (1) JPS5339742B2 (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4919769A (enrdf_load_stackoverflow) * 1972-02-26 1974-02-21
JPS5143566U (enrdf_load_stackoverflow) * 1974-09-27 1976-03-31
JPS55176557U (enrdf_load_stackoverflow) * 1979-06-06 1980-12-18
CN108701666A (zh) * 2016-02-19 2018-10-23 贺利氏德国有限两合公司 用于制造衬底板的方法、衬底板、用于制造半导体模块的方法和半导体模块

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7408246B2 (en) 2005-03-31 2008-08-05 Agere Systems, Inc. Controlling warping in integrated circuit devices

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4919769A (enrdf_load_stackoverflow) * 1972-02-26 1974-02-21
JPS5143566U (enrdf_load_stackoverflow) * 1974-09-27 1976-03-31
JPS55176557U (enrdf_load_stackoverflow) * 1979-06-06 1980-12-18
CN108701666A (zh) * 2016-02-19 2018-10-23 贺利氏德国有限两合公司 用于制造衬底板的方法、衬底板、用于制造半导体模块的方法和半导体模块
JP2019512867A (ja) * 2016-02-19 2019-05-16 ヘラエウス ドイチュラント ゲゼルシャフト ミット ベシュレンクテル ハフツング ウント コンパニー コマンディトゲゼルシャフト 回路基板プレートを製造するための方法、回路基板プレート、半導体モジュールを製造するための方法、及び、半導体モジュール

Also Published As

Publication number Publication date
JPS5339742B2 (enrdf_load_stackoverflow) 1978-10-23

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