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Priority to JP1965043812UpriorityCriticalpatent/JPS4216568Y1/ja
Publication of JPS4216568Y1publicationCriticalpatent/JPS4216568Y1/ja
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
H—ELECTRICITY
H01—ELECTRIC ELEMENTS
H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
H01L2224/42—Wire connectors; Manufacturing methods related thereto
H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector