JPH1195243A - Electrode driving ic for liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To lessen the deterioration in image quality at a low cost while effec tively utilizing the packaging rule which makes a contribution heretofore to increasing microminiaturization by connecting the terminal pairs between first and second electrode driving output terminal groups with the electrode wiring of a packaging substrate. SOLUTION: Power source terminals VD1, VD2, VS2, VS1 and input terminals CK, ST, DF are connected the wiring P1, P2, P6, P7, P3 to 5 on the glass substrate on their respective short sides. The scanning electrode C1 is connected to the electrode driving output terminal T1L, T1R and similarly, the scanning electrodes C2 to 240 are connected to the respective corresponding electrode driving output terminal pairs. The electrode driving output terminals TnL are held by the first and second power source wiring and are connected the respective power source wiring via P channel transistors. The output terminals TnR are held by the third and fourth power source wiring and are connected to the respective power source wiring via N channel transistors.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrode driving IC for a liquid crystal display device, and more particularly, to a connection circuit and a positional relationship between an electrode driving output terminal and a liquid crystal driving power supply wiring, an electrode driving output terminal and an electrode. The present invention relates to an electrode driving IC of a liquid crystal display device characterized by the connection method described above.

[0002]

2. Description of the Related Art In a matrix type liquid crystal display device, as the number of pixels increases, the number of electrodes driven by one electrode driving IC also increases. For this reason, it is required to connect the electrode driving IC and the electrode of the liquid crystal display device at a high density, and the electrical connection is made by overlapping the connection portion of the mounting board and the terminal surface of the electrode driving IC. Practical methods have been put to practical use. Among these, there is a method of simultaneously forming a connection portion of an electrode driving IC and a display portion on one glass substrate, which is called chip-on-glass (hereinafter referred to as COG).
In some electrode driving ICs for COG, I
Utilizing that the TO electrode wiring can be finely patterned, an output terminal for driving the electrode is also arranged inside the connection surface,
It enabled high-density connections. However, since the COG requires a portion on which an electrode driving IC is mounted, an increase in the size of the glass outer shape has led to an increase in cost and a reduction in design flexibility. Therefore, in order to reduce the size of the mounting portion of the electrode driving IC, the Company has developed a scanning electrode driving IC for inputting a power supply and a control signal from a short side (Japanese Utility Model Application No. 5-2375).
3, Japanese Patent Application No. 6-522977).

FIG. 6 is a schematic diagram showing a connection state between the above-mentioned scan electrode drive IC 61 and a glass substrate, and is a view of the terminal surface of the scan electrode drive IC 61 from the back side of the glass substrate. The scanning electrodes C1, C2, C3,...
C238, C239, and C240 are output terminals T1, T2, and T for driving the scanning electrode of the scanning electrode driving IC 61, respectively.
3,..., T238, T239, and T240. On the short side on the upper side of the scan electrode drive IC 61, the power supply terminals VD1, VD2, VS2, VS1, the clock signal input terminal CK, and the start signal input terminal ST are connected to a transparent electrode (ITO) for connection to an external circuit. Wiring P61, P6
2, P65, P66, P63, and P64. The input terminal RL2 of the signal for controlling the selection order of the scanning electrodes is connected to the power supply terminal VS1 via the wiring P67.
Note that the scanning electrodes C1 to 240 also include wirings connected to the scanning electrodes, but since each wiring is connected to only one scanning electrode in the display screen, it is also referred to as a scanning electrode in the following description.

The scanning electrode driving IC 61 shown in FIG. 6 can determine the order of selecting the scanning electrodes in the IC so that it can be mounted on either the left or right side of the liquid crystal screen with the power supply terminal and the signal input terminal facing upward. I was In addition, it was possible to display the image upside down on either side. As described above, since the number of elements is increased due to the multi-functionality, a structure in which metal wiring such as aluminum is formed in two layers (hereinafter, referred to as a two-layer AL) is aimed at miniaturization and reduction of power supply wiring resistance for the reasons described later. Was adopted.

In a liquid crystal panel, as the number of scanning electrodes increases, image quality tends to deteriorate due to a pattern (hereinafter referred to as crosstalk) that trails along signal electrodes. One of the causes is a resistance from the scanning electrode to an external power supply. Because of this resistance, noise generated when the voltage polarity of the signal electrode group switches on the scanning electrodes, the effective value voltage of each pixel deviates from the theoretical value, and crosstalk occurs. In other words, crosstalk occurs between the signal electrodes via the scanning electrodes, and a pattern that trails along the signal electrodes appears. In order to prevent crosstalk caused by the resistance of the scan electrode, noise transmitted to the scan electrode may be quickly discharged to an external power supply circuit. In addition, measures have been taken to increase the driving capability of the electrode driving transistor.

Recently, the practical use of an anisotropic conductive film (hereinafter referred to as ACF) has made it possible to reduce the pitch between terminals to about several tens of μm. Therefore, high-density connection can be achieved simply by arranging the electrode driving output terminals in a row on the long side of the electrode driving IC without disposing the electrode driving output terminals in the connection surface as in the case of the scanning electrode driving IC 61. Has become available.

When the output terminals are arranged in one line, the output blocks for driving the electrodes are also arranged in one line. FIG.
FIG. 13 is a circuit diagram of a third electrode driving output block, and also shows the arrangement of elements. The output block includes, from the left, a clock signal ck, a control block 70, a drive polarity signal df, a power supply wiring vd1, a P-channel transistor t
p1, power supply wiring vd2, P-channel transistor tp
2, an electrode driving output terminal Tn, an N-channel transistor tn2, a power supply line vs2, an N-channel transistor tn1, and a power supply line vs1 are arranged. The control block 70 supplies the selection pulse 3 in synchronization with the clock signal ck.
1 is transferred from the previous (n-1) control block, and the n-th output block is selected. Next clock signal ck
The control block 30 outputs the selection pulse 32 to the subsequent stage (n + 1).
To the output control block. When the output block is not selected, the P-channel transistor tp2 or the N-channel transistor t depends on the polarity of the polarity control signal df.
Which of n2 conducts. When selecting an output block,
Either the P-channel transistor tp1 or the N-channel transistor tn1 conducts according to the polarity of the polarity control signal df. As a result, the electrode driving output terminal Tn
Outputs any voltage of the power supply wirings vd1, vd2, vs2, vs1. The voltage relationship of the power supply wiring is vd
1>vd2>vs2> vs1. The P-channel transistors tp1, tp2 and the N-channel transistors tn1, tn2 are electrodes driving transistors.

When the source of the transistor for driving the electrode and the power supply line are adjacent to each other in the case of four power supplies, the wiring between the power supply line vd2, the drain of the P-channel transistor tp1, and the output terminal Tn for driving the scan electrode as shown in FIG. (Hereinafter referred to as a bridge) 71 is formed between the two. N
A bridge 72 is similarly formed on the channel side. In the scan electrode driving IC 61 described above, since the bridges 71 and 72 are processed by the aluminum wiring of the two-layer AL, the output terminal Tn for driving the electrode and the drain of the transistor for driving the electrode can be connected with low resistance. . In an electrode driving IC having a structure having only one layer of aluminum wiring (hereinafter, referred to as one layer AL), wirings in a high concentration region, polysilicon wirings, and the like are used to correspond to the bridges 71 and 72. Sheet resistance was higher than that.

[0009]

The above-described scan electrode drive I
C61 is a two-layer AL for miniaturization and reduction of power supply wiring resistance.
Was used. This has a problem that the manufacturing process is lengthened and the cost is increased because the aluminum wiring has two layers.

In the low-cost one-layer AL, the bridge 7
Due to the high-resistance wiring used in the electrodes 1 and 72, the resistance from the electrode driving output terminal Tn to the power supply wirings vd1 and vs2 does not sufficiently decrease when the electrode driving transistors Tp1 and Tn1 are turned on. There is a problem that the image quality may be deteriorated.

Therefore, claims 1 and 2 of the present invention.
The object of the invention described in (1) is to provide an electrode driving IC of a liquid crystal display device which is low in cost and less deteriorated in image quality while utilizing the miniaturized mounting rules.

An electrode driving IC such as an electrode driving IC 61
Has increased the circuit scale in order to have versatility in addressing directions and mounting positions. Therefore, there has been a problem that the number of elements has increased and the area of the electrode driving IC has increased.

Therefore, the invention according to claim 3 of the present invention provides, in addition to the object described in claim 1, an electrode driving IC of a liquid crystal display device which can maintain the function while reducing the number of elements by simplifying the circuit. It is intended to do so.

[0014]

The present invention has the following features in order to achieve the objects of claims 1 and 2 described above.
An output terminal group for driving the first electrode, an output terminal group for driving the second electrode, a first power wiring, a second power wiring, a third power wiring, and a fourth power wiring are provided. A first electrode driving output terminal group is arranged between the first power supply wiring and the second power supply wiring, and a second electrode driving output group is similarly provided between the third power supply wiring and the fourth power supply wiring. Are arranged. Each terminal of the first output terminal group for driving the liquid crystal is connected to the first power supply wiring and the second power supply wiring via the transistor for driving the electrode. Similarly, each terminal of the output terminal group for driving the second electrode is connected to the third power supply wiring and the fourth power supply wiring via the transistor for driving liquid crystal. A terminal pair between the first and second electrode driving output terminal groups is connected by electrode wiring on the mounting board.

The present invention has the following features in addition to the features described above. A terminal pair having an equivalent function between the two terminal groups on the short side is rotationally symmetric about the center of the electrode driving IC. The electrode drive IC is mounted by being rotated by 180 ° to perform inverted display.

(Function) In a group of electrode driving output terminals arranged in two rows along the long side of the electrode driving IC, one electrode is driven by pairing two electrode driving output terminals. I do.
Each output terminal is sandwiched between two power supply wires, and there is a transistor between each power supply wire and an output terminal for driving an electrode. The source of this transistor is connected to a power supply wiring by a metal wiring having a low resistance, and the drain is similarly connected to an electrode driving output terminal by a metal wiring.

[0017]

FIG. 1 is a schematic diagram showing a terminal arrangement of a scan electrode driving IC 11 according to a first embodiment of the present invention. The power supply terminals VD1, VD2, VS2, and VS are connected to an external circuit on the short side of the scan electrode driving IC 11.
1, an input terminal CK for a clock signal, an input terminal ST for a start signal, and an input terminal DF for a signal for determining a drive polarity, and form a terminal group. On the left long side, output terminals T1L, T2L, T3L,.
L, T239L, and T240L are arranged in a line to form a first electrode driving output terminal group. Output terminals T1R, T2R, T3R,...
T238R, T239R, T240R are arranged in a line,
An output terminal group for driving the second electrode is formed. The output terminals for driving the electrodes, such as the output terminals T1L and T1R for driving the electrodes, which have the same numbers on the left and right, form an output terminal pair.

FIG. 2 is a circuit diagram of the n-th output block of the electrode drive IC 11 of FIG. 1, and also shows the arrangement of elements. The same numbers and symbols as those in FIG. 7 indicate equivalent power supply wires, transistors, and signals. The left electrode driving output terminal TnL is sandwiched between a power supply wiring vd1 serving as a first power supply wiring and a power supply wiring vd2 serving as a second power supply wiring, and the respective power supply wirings vd1, vd2, and P
They are connected via channel transistors tp1 and tp2. The right electrode driving output terminal TnR is sandwiched between a power supply line vs2 serving as a third power supply line and a power supply line vs1 serving as a fourth power supply line.
s2, vs1 and N-channel transistors tn2, tn
1 are connected. The control block 20 is disposed between the power supply wiring vd2 and the power supply wiring vs2. Therefore, a wiring for gate control of the P-channel transistor is provided on the left side, and a wiring for gate control of the N-channel transistor is provided on the right side. Power supply lines vd1, vd2 and P
Since the sources of the channel transistors tp1 and tp2 are adjacent to each other, they are connected by aluminum wiring. An electrode driving output terminal TnL and a P-channel transistor tp1,
Since the drain of tp2 is also adjacent, it is connected by an aluminum wiring. The same applies to the N-channel side.

FIG. 3 is a schematic diagram when the scan electrode driving IC 11 of FIG. 1 is mounted on the glass substrate on the left side of the screen. The hatched portion indicates the wiring of the transparent electrode on the glass substrate, and the terminal surface is viewed through the glass substrate. The same numbers and symbols as those in FIG. 1 indicate the same ones. Power supply terminals VD1, VD2, VS2, VS1, input terminals CK, S
T and DF are connected to the wirings P1, P2, P6, P7, P3, P4, and P5 on the glass substrate at the upper short sides, respectively. The scanning electrode C1 is a pair of output terminals T1L for driving electrodes,
T2R, and likewise scan electrodes C2, C3,.
, C238, C239, and C240 are also connected to corresponding electrode drive output terminal pairs.

FIG. 4 shows a scan electrode drive I according to the second embodiment.
It is the schematic diagram which showed the connection surface of C41. The same symbols as in FIG. 1 indicate equivalent terminals. The scan electrode driving IC 41 limits the addressing function to one direction, thereby simplifying the circuit. Therefore, it has only a function of sequentially selecting the scanning electrodes from the scanning electrode C1 to the scanning electrode C240. In the scan electrode drive IC 41, the upper short side power supply terminals VD1, VD2, VS2, VS1, input terminals CK, S
T, DF and lower short side power supply terminals VD1, VD2, V
S2, VS1, input terminals CK, ST, DF, and output terminal groups T1L to T240L, T1R to T2 for electrode driving
Reference numeral 40R denotes a rotationally symmetric arrangement about the center of the scan electrode driving IC 41 as an axis. Therefore, since the scan electrode drive IC 41 can be mounted on the mounting portion on the glass substrate even when rotated by 180 °, the scan electrode drive IC 41 is rotated by 180 ° and mounted when displaying a vertically inverted image. Even if the output terminal group is not rotationally symmetric, the output terminal pairs are arranged in parallel with the short sides of the scan electrode drive IC 41 and the scan electrode drive IC 4
It suffices that both output terminal groups are symmetrical with respect to a straight line passing through the center of 1 and parallel to the short side. In this case, it is necessary to prepare transparent electrode wiring in advance so that mounting can be performed by 180 ° rotation. is there.

FIG. 5 shows a scan electrode drive I according to the third embodiment.
It is a circuit diagram of the n-th output block of C, and also shows the arrangement relationship of elements. The same numbers and symbols as in FIG. 2 indicate the same ones. The sources of the P-channel transistor tp2 and the N-channel transistor tn2 are connected to the power supply wiring vm. The power supply wiring vm is obtained by integrating the power supply wirings vd2 and vs2 of FIG. 2 and outputs three voltages as a scan electrode driving IC. A method of driving the scanning electrodes with three power supplies is also frequently used in passive matrices.

The present invention can be applied to a signal electrode driving IC. In addition to COG, a mounting method such as TAB (tape auto bonding), which connects an electrode driving IC and a mounting substrate to face each other, can be applied. The output terminals for driving the electrodes need not have a constant pitch as long as they form a pair.

[0023]

As described above, according to the first aspect of the present invention, an output terminal group for driving each electrode is connected to an electrode driving IC.
In a single-layer AL with a short manufacturing process, the source and power wiring of the transistor for driving electrodes, and the drain and output terminal for driving electrodes are arranged in a line in parallel with the long side of At the same time, direct connection can be made by metal wiring, so that image deterioration due to resistance can be reduced, and at the same time, a low-cost electrode driving IC can be provided.

According to the second aspect of the present invention, in addition to the effect of the first aspect of the present invention, the gate control wiring of the electrode driving transistor can be distributed left and right in each output block.
This has the added effect that the width of the output block can be narrowed and finer mounting rules can be used even more.

According to a third aspect of the present invention, in addition to the effects of the first aspect of the present invention, the number of elements can be reduced by simplifying the circuit by limiting the addressing function to one direction, and the electrode driving This has the added effect that the inverted display function can be maintained by mounting the IC by rotating it by 180 °.

According to a fourth aspect of the present invention, in addition to the effects of the first aspect of the present invention, the size of the electrode drive IC can be reduced by sharing the second and third power supply wires when only three values are required. It has the added effect of being able to plan.

[Brief description of the drawings]

FIG. 1 is a scanning electrode driving IC according to a first embodiment of the present invention;
FIG. 11 is a schematic diagram showing an arrangement of terminals 11;

FIG. 2 is a scan electrode drive IC according to the first embodiment of the present invention;
FIG. 11 is a circuit diagram of an n-th output block of FIG. 11 and also shows an element arrangement.

FIG. 3 is a scan electrode drive IC according to the first embodiment of the present invention;
FIG. 11 is a schematic diagram showing a connection state of 11.

FIG. 4 is a scan electrode driving IC according to a second embodiment of the present invention;
Schematic diagram showing terminal arrangement of No. 11

FIG. 5 is a scan electrode drive IC according to a third embodiment of the present invention;
FIG. 11 is a circuit diagram of an n-th output block of FIG. 11 and also shows an element arrangement.

FIG. 6 is a schematic diagram showing a scan electrode driving IC 61 of a first conventional example and a connection state thereof.

FIG. 7 is a circuit diagram of an n-th output block of a scan electrode driving IC according to a second conventional example, and also shows an element arrangement at the same time.

[Explanation of symbols]

11, 41, 61 Scanning electrode driving IC 20, 70 Control block VD1 power supply terminal VD2 power supply terminal VS2 power supply terminal VS1 power supply terminal VM power supply terminal CK Clock signal input terminal ST Start signal input terminal DF Input terminal of signal for determining drive polarity vd1 power supply wiring vd2 power supply wiring vs2 power supply wiring vs1 power supply wiring tp1, tp2 P-channel transistors tn1, tn2 N-channel transistors T1L to T240L Left scan electrode driving output terminal group T1R to T240R Right scan electrode drive output terminal group C1 to C244 Scanning electrode and wiring P1 to P67 Wiring

Claims (4)

[Claims] 1. A liquid crystal display device comprising: a terminal group for connecting to an external circuit on a short side; and a connection portion of a mounting board and a terminal surface of an electrode driving IC overlapped face to face to establish an electrical connection. In the electrode driving IC, a first electrode driving output terminal group, a second electrode driving output terminal group, a first power wiring, a second power wiring, a third power wiring, and a fourth power wiring. A first electrode driving output terminal group is arranged between the first power supply wiring and the second power supply wiring, and a second electrode is provided between the third power supply wiring and the fourth power supply wiring. A driving output terminal group is arranged, and each output terminal of the first liquid crystal driving output terminal group is connected to a first power supply wiring and a second power supply wiring via an electrode driving transistor.
And each output terminal of the second liquid crystal drive output terminal group is connected to the third power supply line via an electrode drive transistor.
A liquid crystal display, wherein the output terminal pair between the first and second electrode driving output terminal groups is connected by the electrode wiring of the mounting board. The electrode drive IC of the device. 2. The electrode driving IC of a liquid crystal display device according to claim 1, wherein said output terminal pair sandwiches a control block. 3. A terminal pair having an equivalent function between both terminal groups on the short side is located at a rotationally symmetric position about the center of the electrode driving IC, and the electrode driving IC is rotated by 180 °. 2. The electrode driving IC for a liquid crystal display device according to claim 1, wherein the mounting is performed to perform inverted display. 4. The electrode driving IC of a liquid crystal display device according to claim 1, wherein said second and third power supply wires are common.