JPH118445A - Circuit board - Google Patents
Circuit boardInfo
- Publication number
- JPH118445A JPH118445A JP16150997A JP16150997A JPH118445A JP H118445 A JPH118445 A JP H118445A JP 16150997 A JP16150997 A JP 16150997A JP 16150997 A JP16150997 A JP 16150997A JP H118445 A JPH118445 A JP H118445A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- circuit board
- tailings
- holes
- edge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3468—Applying molten solder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】この発明は、電子部品が搭載
される回路基板に関する。The present invention relates to a circuit board on which electronic components are mounted.
【０００２】[0002]
【従来の技術】一般に、電子部品が搭載される回路基板
の外周部（以下、基板エッジという）には、同回路基板
がプレスによる打ち抜き加工によって成形されることに
起因する、図６に示すような毛羽立ったささくれ部２２
が形成される。そして、このささくれ部２２には、回路
基板２１に電子部品をはんだ付けするフローはんだ工程
等において、同図６に示すように、はんだカス（酸化し
たはんだ）２３が付着することが多い。そこで、通常は
上記フローはんだ工程等の後、基板洗浄工程等を通じて
その付着したはんだカス２３を除去するようにしてい
る。2. Description of the Related Art Generally, as shown in FIG. 6, an outer peripheral portion of a circuit board on which electronic components are mounted (hereinafter referred to as a board edge) is formed by punching the circuit board by pressing. Nap part 22
Is formed. As shown in FIG. 6, solder scum (oxidized solder) 23 often adheres to the raised portions 22 in a flow soldering step of soldering electronic components to the circuit board 21. Therefore, usually, after the flow soldering step or the like, the attached solder residue 23 is removed through a substrate cleaning step or the like.
【０００３】[0003]
【発明が解決しようとする課題】ところで、上記基板洗
浄工程等を通じて回路基板２１の洗浄を行うことで、そ
の基板エッジのささくれ部２２に付着したはんだカス２
３もある程度は除去されるようになる。しかし、この除
去されたはんだカス２３は、同基板洗浄工程において洗
浄液中に浮遊するなどにより、自らのあるいは他の回路
基板に付着することがある。また、この洗浄工程にて除
去しきれなかったはんだカス２３は、回路基板２１の移
動中や使用時等において落下して他の回路基板に付着し
たりすることもある。このようにはんだカス２３の付着
が起こった場合、その付着箇所が回路基板に搭載された
の電子部品の微細端子間などであったりすると同微細端
子間を電気的に短絡させることともなり、同回路基板の
動作不良の原因ともなる。By cleaning the circuit board 21 through the above-described board cleaning step or the like, the solder residue 2 adhered to the bulging portion 22 at the edge of the board is removed.
3 is also removed to some extent. However, the removed solder residue 23 may adhere to its own or another circuit board by floating in the cleaning liquid in the substrate cleaning step. In addition, the solder residue 23 that cannot be completely removed in the cleaning step may fall during the movement of the circuit board 21 or during use, and may adhere to another circuit board. When the solder residue 23 adheres in this manner, if the adhered portion is between fine terminals of an electronic component mounted on a circuit board or the like, the fine terminals may be electrically short-circuited. This may cause a malfunction of the circuit board.
【０００４】この発明は、このような実情に鑑みてなさ
れたものであり、その目的とするところは、上記はんだ
カスの他の回路部への付着を好適に抑制することができ
る回路基板を提供することにある。The present invention has been made in view of such circumstances, and an object of the present invention is to provide a circuit board capable of suitably suppressing the adhesion of the above-mentioned solder residue to other circuit portions. Is to do.
【０００５】[0005]
【課題を解決するための手段】上記の目的を達成するた
めに、請求項１に記載の回路基板では、電子部品が搭載
される回路基板において、その外周エッジ部にはんだと
の親和性の良い金属材料からなるダミー配線を設けたこ
とをその要旨とする。According to a first aspect of the present invention, there is provided a circuit board on which electronic components are mounted, the outer peripheral edge of which has good affinity with solder. The point is that dummy wirings made of a metal material are provided.
【０００６】また、請求項２に記載の回路基板では、請
求項１記載の回路基板において、前記ダミー配線は前記
外周エッジ部に所定間隔にて多数設けられた半円筒状の
スルーホールであることをその要旨とする。According to a second aspect of the present invention, in the circuit board according to the first aspect, the dummy wirings are semi-cylindrical through-holes provided at predetermined intervals on the outer peripheral edge portion. Is the gist.
【０００７】上記請求項１及び請求項２の構成によれ
ば、従来、フローはんだ工程等において同回路基板の外
周エッジ部のささくれ部に付着しその後落下する可能性
のあるはんだカスは、前記はんだとの親和性の良いダミ
ー配線あるいは半円筒状のスルーホール部に選択的に付
着して溶着されるようになる。その結果、上記落下する
可能性のあるはんだカスの数が減少し、ひいては同はん
だカスが他の回路部へ付着する可能性も大幅に抑制され
るようになる。According to the first and second aspects of the present invention, in the conventional flow soldering process, the solder scum that may adhere to the bulging portion of the outer peripheral edge of the circuit board and then fall is removed by the solder. And is selectively adhered and welded to a dummy wiring or a semi-cylindrical through-hole portion having a good affinity for. As a result, the number of the solder chips that may fall is reduced, and the possibility that the solder chips adhere to other circuit parts is greatly reduced.
【０００８】[0008]
【発明の実施の形態】以下、本発明を具体化した回路基
板の一実施形態を図１〜２に基づき詳細に説明する。な
お、図２は図１に示す回路基板１の同図１における中央
下端部の拡大図である。DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of a circuit board embodying the present invention will be described below in detail with reference to FIGS. FIG. 2 is an enlarged view of the lower end of the center of the circuit board 1 shown in FIG. 1 in FIG.
【０００９】図１及び図２に示すように回路基板１の外
周部（基板エッジ）には、所定間隔で半円筒状のスルー
ホール２が多数設けられている。この半円筒状のスルー
ホール２は通常の周知のスルーホール形成プロセスで形
成されるもので、そのプロセスの記載は省略する。な
お、同スルーホール２は銅スルーホールであってもよい
し、はんだメッキされたはんだスルーホールであっても
よい。また、回路基板１は、例えばプレスによる、周知
の円筒状のスルーホールの中心線（直径）に沿った打ち
抜き加工によって成形されるものとする。As shown in FIGS. 1 and 2, a large number of semi-cylindrical through holes 2 are provided at predetermined intervals on the outer peripheral portion (board edge) of the circuit board 1. The semi-cylindrical through-hole 2 is formed by an ordinary well-known through-hole forming process, and the description of the process is omitted. The through hole 2 may be a copper through hole or a solder plated solder through hole. Further, the circuit board 1 is formed by, for example, punching along a center line (diameter) of a well-known cylindrical through hole by pressing.
【００１０】次に、上記構成の回路基板１による作用を
説明する。回路基板１に電子部品を実装する工程中の、
例えばフローはんだ工程において、回路基板１がはんだ
槽（図示せず）に浸かるとき、はんだカス３が同はんだ
槽に浮遊していると、このはんだカス３が回路基板１の
ささくれ部（図示せず）に付着する可能性がある。とこ
ろが、本実施の形態の回路基板１のエッジ部には、図１
及び図２に示すように所定間隔で、はんだとの親和性の
良い、すなわちはんだぬれ性の良い上記銅やはんだ等の
金属材料からなる半円筒状のスルーホール２が多数設け
られている。そのため、前記フローはんだ工程中におい
て、はんだ槽にはんだカス３が浮遊している場合であ
れ、同はんだカス３は、図２に示すようにそれらスルー
ホール２の壁面に選択的に付着するとともに同壁面に溶
着されるようになる。その結果、その後の実装工程中、
あるいは実装工程後において前記はんだカス３が回路基
板１のエッジ部から落下したり離脱したりするようなこ
とを抑制することができるようになる。そしてこのた
め、同はんだカス３が回路基板上の電子部品の微細端子
間に付着してこれを電気的に短絡させてしまうなどの不
都合が生じる可能性も大幅に抑制されるようになる。Next, the operation of the circuit board 1 having the above configuration will be described. During the process of mounting electronic components on the circuit board 1,
For example, in the flow soldering process, when the circuit board 1 is immersed in a solder bath (not shown) and the solder scum 3 is floating in the solder bath, the solder scum 3 is displaced by a raised portion (not shown) of the circuit board 1. ). However, the edge of the circuit board 1 of the present embodiment is
As shown in FIG. 2, a large number of semi-cylindrical through holes 2 made of a metal material such as copper or solder having good affinity with solder, that is, good solder wettability, are provided at predetermined intervals. Therefore, during the flow soldering process, even when the solder residue 3 is floating in the solder bath, the solder residue 3 selectively adheres to the wall surfaces of the through holes 2 as shown in FIG. It becomes welded to the wall. As a result, during the subsequent mounting process,
Alternatively, it is possible to prevent the solder waste 3 from dropping or detaching from the edge of the circuit board 1 after the mounting process. For this reason, the possibility that the solder scum 3 adheres to the fine terminals of the electronic component on the circuit board and causes an electrical short circuit is greatly reduced.
【００１１】以上説明した実施の形態によって得られる
効果について、以下に記載する。 ・本実施の形態によれば、はんだカス３が回路基板１の
エッジ部から落下したり離脱したりするようなことを抑
制することができ、同はんだカス３の他の回路部等への
付着も併せて抑制することができる。The effects obtained by the embodiment described above will be described below. According to the present embodiment, it is possible to prevent the solder residue 3 from dropping or detaching from the edge portion of the circuit board 1, and to adhere to the other circuit portion or the like of the solder residue 3. Can also be suppressed.
【００１２】なお、この発明は、次のように変更して具
体化することも可能である。 ・本実施の形態においては、前記半円筒状のスルーホー
ル２を個々に分離して設けたが、図３に示すように個々
のスルーホール２を全て回路基板１の外周部に設けられ
たＧＮＤ（アース）パターン４と接続するように設けて
もよい。The present invention can be embodied with the following modifications. In the present embodiment, the semi-cylindrical through-holes 2 are separately provided. However, as shown in FIG. (Earth) It may be provided so as to be connected to the pattern 4.
【００１３】・本実施の形態においては、前記スルーホ
ール２を回路基板１のエッジ部に所定間隔で設けたが同
スルーホール２の設置間隔及びパターンはこれに限定さ
れるものではない。例えば図４に示すように回路基板１
のエッジ部の４隅に集中するように同スルーホール２を
設けてもよい。In the present embodiment, the through holes 2 are provided at predetermined intervals at the edge of the circuit board 1, but the installation intervals and patterns of the through holes 2 are not limited thereto. For example, as shown in FIG.
The through-holes 2 may be provided so as to be concentrated at the four corners of the edge portion.
【００１４】・本実施の形態においては、前記スルーホ
ール２の形状を半円筒状としたがこれに限定されるもの
ではない。同スルーホール２の形状としては、他に例え
ば図５に示すように、半直方筒状２ａ、半ひし形筒状２
ｂ、半楕円筒状２ｃ等も適宜採用することができる。ま
た同一の回路基板１にこれら様々な形状のスルーホール
２が混在するように設けてもよい。In the present embodiment, the shape of the through hole 2 is a semi-cylindrical shape, but is not limited to this. As the shape of the through hole 2, as shown in FIG. 5, for example, a semi-rectangular cylindrical shape 2a, a semi-diamond cylindrical shape 2
b, semi-elliptical cylindrical shape 2c, etc. can also be appropriately adopted. Also, through holes 2 of various shapes may be provided on the same circuit board 1 so as to be mixed.
【００１５】・本実施の形態及び上記他の実施の形態に
おいては、ダミー配線としてスルーホールを設けた例を
示したがこれに限定されるものではない。要は、ダミー
配線としてはんだとの親和性の良い金属材料から構成さ
れるものであればよい。In this embodiment and the other embodiments described above, an example in which through holes are provided as dummy wirings has been described, but the present invention is not limited to this. In short, any dummy wiring may be used as long as it is made of a metal material having a good affinity for solder.
【００１６】その他、前記実施の形態から把握できる請
求項以外の技術的思想について、以下にその効果ととも
のに記載する。請求項１または請求項２記載の回路基板
において、前記ダミー配線は、全てが当該基板の外周部
に設けられたＧＮＤ（アース）パターンに電気的に接続
されてなることを特徴とする回路基板。In addition, technical ideas other than the claims that can be grasped from the embodiment will be described below together with their effects. 3. The circuit board according to claim 1, wherein all of the dummy wirings are electrically connected to a GND (earth) pattern provided on an outer peripheral portion of the board.
【００１７】上記構成によれば、回路基板のエッジ側面
がＧＮＤ（アース）電位となるため、同回路基板の磁気
シールド効果も併せて向上される。According to the above configuration, since the edge side surface of the circuit board is at the GND (earth) potential, the magnetic shielding effect of the circuit board is also improved.
【００１８】[0018]
【発明の効果】この発明によれば、回路基板のエッジ部
から落下する可能性のあるはんだカスの数を減少させる
ことができ、ひいては同はんだカスが他の回路部へ付着
する可能性も大幅に抑制されるようになる。According to the present invention, it is possible to reduce the number of solder spills that may fall from the edge of the circuit board, and the possibility that the same solder scum adheres to other circuit parts is greatly increased. Will be suppressed.
【図１】この発明の回路基板の一実施の形態を示す斜視
図。FIG. 1 is a perspective view showing one embodiment of a circuit board of the present invention.
【図２】同じくその拡大図。FIG. 2 is an enlarged view of the same.
【図３】この発明の他の実施の形態を示す拡大図。FIG. 3 is an enlarged view showing another embodiment of the present invention.
【図４】同じく他の実施の形態を示す斜視図。FIG. 4 is a perspective view showing another embodiment.
【図５】同じく他の実施の形態を示す拡大図。FIG. 5 is an enlarged view showing another embodiment.
【図６】従来の回路基板のエッジ部を拡大して示す略
図。FIG. 6 is an enlarged schematic view showing an edge portion of a conventional circuit board.
１…回路基板、２…半円筒状のスルーホール、３…はん
だカス３、４…ＧＮＤ（アース）パターン。DESCRIPTION OF SYMBOLS 1 ... Circuit board, 2 ... Semi-cylindrical through hole, 3 ... Solder residue 3, 4 ... GND (earth) pattern.
Claims (2)
て、 その外周エッジ部にはんだとの親和性の良い金属材料か
らなるダミー配線を設けたことを特徴とする回路基板。1. A circuit board on which electronic components are mounted, wherein a dummy wiring made of a metal material having good affinity for solder is provided on an outer peripheral edge portion thereof.
定間隔にて多数設けられた半円筒状のスルーホールであ
ることを特徴とする請求項１記載の回路基板。2. The circuit board according to claim 1, wherein the dummy wirings are semi-cylindrical through-holes provided at predetermined intervals on the outer peripheral edge.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16150997A JPH118445A (en) | 1997-06-18 | 1997-06-18 | Circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16150997A JPH118445A (en) | 1997-06-18 | 1997-06-18 | Circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH118445A true JPH118445A (en) | 1999-01-12 |
Family
ID=15736421
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16150997A Pending JPH118445A (en) | 1997-06-18 | 1997-06-18 | Circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH118445A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6906411B1 (en) | 2000-06-29 | 2005-06-14 | Mitsubishi Denki Kabushiki Kaisha | Multilayer substrate module and portable wireless terminal |
| US7015574B2 (en) * | 2001-11-13 | 2006-03-21 | International Business Machines Corporation | Electronic device carrier adapted for transmitting high frequency signals |
| JP2016529729A (en) * | 2013-08-28 | 2016-09-23 | キュベイコン リミテッド | Semiconductor die and package jigsaw submount |
-
1997
- 1997-06-18 JP JP16150997A patent/JPH118445A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6906411B1 (en) | 2000-06-29 | 2005-06-14 | Mitsubishi Denki Kabushiki Kaisha | Multilayer substrate module and portable wireless terminal |
| US7015574B2 (en) * | 2001-11-13 | 2006-03-21 | International Business Machines Corporation | Electronic device carrier adapted for transmitting high frequency signals |
| JP2016529729A (en) * | 2013-08-28 | 2016-09-23 | キュベイコン リミテッド | Semiconductor die and package jigsaw submount |
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