JPH118331A - Semiconductor device and integrated semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance reliability for connection of stacked semiconductor devices. SOLUTION: A through-hole is cut at such point as separated into almost halves, so a plurality of recessed parts 2 whose cross sections are almost semicircular are provided on a side end surface of a substrate 1, while an outer lead 3 is formed at each of the recessed parts 2. A counterbore part 4 is formed on the one side surface of the substrate 1, where an opening part 5 opened to both surfaces of the substrate 1 is provided. A circuit 6 connected to the outer lead 3 is formed on the surface of the substrate 1, on the side opposite to a surface where the counterbore part 4 is provided. A semiconductor element 7 is mounted on the counterbore part 4, and a wire 8 is bonded between the semiconductor element 7 and the circuit 6 through the opening part 5. While are semiconductor element 7 mounted in the counterbore part 4 does not protrude above the surface of the substrate 1, the connection between the outer loads 3 provided on the substrate 1, with the substrate 1 being directly jointed, allows the electrically connection of a semiconductor device which is loaded.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a QFN (quad
flat non-leaded package)
And the like and semiconductor devices and integrated semiconductor devices.

[0002]

2. Description of the Related Art In a semiconductor device A, a large number of outer leads 3 are provided along the end of an electrically insulating substrate 1 and a radial circuit 6 is provided on the surface of the substrate 1 by being connected to each outer lead 3. A semiconductor device 7 is mounted on the surface of the substrate 1 and a wire 8 is bonded and connected between the semiconductor device 7 and the circuit 6. Is sealed with a sealing resin 17.

[0003] In mounting such a semiconductor device A on the motherboard 18, an integrated semiconductor device in which a plurality of semiconductor devices A are stacked and mounted is proposed in order to increase the mounting density of the semiconductor device A. 2952
No. 66 and Japanese Patent Application Laid-Open No. 6-140738. FIG. 9 shows an example. here,
As described above, the semiconductor device A is formed by mounting the semiconductor element 7 on the surface of the substrate 1 and further sealing the sealing resin 17 thereon. The stop resin 17 protrudes. Therefore, when stacking a plurality of semiconductor devices A, it is necessary to secure a space for housing the protruding semiconductor element 7 and the sealing resin 17 between the vertically adjacent semiconductor devices A.
9, a sealing frame 20 is provided on the upper surface of the substrate 1 so as to surround the semiconductor element 7, and the sealing resin 1 is placed in the sealing frame 20.
7 and the substrate 1 of the semiconductor device A is vertically joined via the sealing frame 20.

[0004]

However, when the substrate 1 of the semiconductor device A is vertically joined through the sealing frame 20 in this manner, the outer portion continuous from the substrate 1 is also provided at the sealing frame 20. Semiconductor device A provided with leads 3 and mounted
It is necessary to enable the mutual electrical connection of the semiconductor devices A, and the processing steps become complicated, and the mutual connection of the adjacent semiconductor devices A is deteriorated. There was a problem that reliability was lowered.

[0005] The present invention has been made in view of the above points, and it is an object of the present invention to obtain a highly reliable connection of stacked semiconductor devices.

[0006]

According to a first aspect of the present invention, there is provided a semiconductor device, wherein a plurality of recesses each having a substantially semicircular cross-section are formed on a side end surface of a substrate by cutting a through hole at a position where the through hole is cut in half. In addition, an outer lead 3 is formed in the concave portion 2, a counterbore concave portion 4 is formed on one side surface of the substrate 1, and an opening portion 5 which is open at both sides of the substrate 1 at the location of the counterbore concave portion 4 is provided. A circuit 6 connected to the outer lead 3 is formed on the surface of the substrate 1 on the surface opposite to the surface where the counterbore 4 is provided, and the semiconductor element 7 is mounted in the counterbore 4 and the semiconductor element 7 is passed through the opening 5. And a circuit 6 is bonded to the wire 8.

The integrated semiconductor device according to claim 2 of the present invention is characterized in that the substrate 1 is stacked on the integrated semiconductor device.
The semiconductor device A ₁ is characterized in that comprising a plurality loading. According to a third aspect of the present invention, there is provided a semiconductor device comprising:
By cutting the through hole at a position where the through hole is cut in half, a concave portion 2 having a substantially semicircular cross section is provided on the side end surface of the substrate 1 and an outer lead 3 is formed in the concave portion 2.
A counterbore recess 4 is formed on one side of the substrate 1, a circuit 6 connected to the outer lead 3 is formed on the surface of the substrate 1, and a semiconductor element 7 is mounted on a surface opposite to the surface on which the counterbore recess 4 is formed. And the semiconductor device 7 and the circuit 6 are connected.

The integrated semiconductor device according to claim 4 of the present invention is characterized in that the substrate 1 is stacked on the integrated semiconductor device.
The semiconductor device A ₂ is characterized in that comprising a plurality loading. According to a fifth aspect of the present invention, there is provided a semiconductor device comprising:
By cutting the through hole at a position where the through hole is cut in half, a concave portion 2 having a substantially semicircular cross section is provided on the side end surface of the substrate 1 and an outer lead 3 is formed in the concave portion 2.
Counterbore recesses 4a. 4b, a circuit 6 connected to the outer leads 3 is formed on the surface of the substrate 1, and either one of the counterbore recesses 4a. 4
b, the semiconductor element 7 is mounted and the semiconductor element 7 and the circuit 6 are connected.

The integrated semiconductor device according to claim 6 of the present invention is characterized in that the substrate 1 is stacked on the integrated semiconductor device.
The semiconductor device A ₃ is characterized in that comprising a plurality loading. Integrated semiconductor device according to claim 7 according to the present invention, by stacking the substrate 1, the semiconductor device A ₁ according to claim 1, the semiconductor device according to claim 3 A ₂
When and it is characterized by comprising a plurality stacked semiconductor device of the two or more of the semiconductor device A ₃ according to claim 5.

According to the integrated semiconductor device of the present invention, the stacked semiconductor devices A ₁ , A ₂ and A ₃ are joined and electrically connected by stacking the substrates 1 via the conductive material 9. It is characterized by comprising.

[0011]

Embodiments of the present invention will be described below. FIG. 1 shows an example of an embodiment of the semiconductor device A1 of the _first aspect. The substrate 1 is made of an electrically insulating material such as a resin laminate and is formed in a square shape.
The surface on one side has a square counterbore recess 4 formed by spot facing. At the center of the substrate 1 where the counterbore recess 4 is provided, a rectangular opening 5 having an area smaller than that of the counterbore recess 4 and opening on both sides of the substrate 1 is formed. As shown in FIG. 2, a plurality of recesses 2 each having a substantially semicircular cross section are provided along the edge on each side end surface of the substrate 1, and the inner circumference of the recess 2 and the recesses 2 on both surfaces of the substrate 1 are provided.
The outer leads 3 are formed by plating the edges of the openings. The outer lead 3 has a side electrode 3a on the inner periphery of the concave portion 2, a lower electrode 3c on the side of the substrate 1 on which the counterbore recess 4 is provided, and an opposite side to the side of the substrate 1 on which the counterbore recess 4 is provided. The upper electrode 3b has a surface. Further, a circuit 6 is formed on the surface of the substrate 1 by plating the surface of the substrate 1 opposite to the surface on which the counterbore recess 4 is provided. The circuit 6 is formed radially so that one end is connected to the outer lead 3 and the other end is located near the opening 5, and the end of the circuit 6 near the opening 5 is the inner lead 6 a It is what becomes. The outer lead 3 and the circuit 6 are made of, for example, three-layer plating films of Cu, Ni, and Au.

The manufacture of the substrate 1 as described above can be performed as follows. For example, a large number of through holes (not shown) are drilled in a matrix board (not shown) having a size of about 1 m × 1 m in a rectangular frame arrangement, and the through holes are formed by performing electroless plating, electrolytic plating, or the like. After plating the inner periphery of the hole and the surface of the substrate 1 to form the outer lead 3 and the circuit 6, further processing the counterbore recess 4 and the opening 5, a portion where each through hole is cut in substantially half. By punching and cutting the mother substrate along a die along the edge, a substrate 1 having a large number of recesses 2 each having a substantially semicircular cross section along the edge can be obtained at each end surface.

Then, the semiconductor element 7 such as an IC memory is mounted on the substrate 1 thus manufactured by bonding the semiconductor element 7 such as an IC memory into the counterbore recess 4 with an adhesive 15. The semiconductor element 7 has an area smaller than the counterbore recess 4 but larger than the opening 5, and uses a center pad semiconductor element 7 provided with an electrode pad 16 at the center of the surface. Things. When the semiconductor element 7 of the center pad is mounted in the counterbore recess 4, the electrode pad 16 provided at the center of the semiconductor element 7 is located in the opening 5, and as shown in FIG. By bonding a wire 8 such as a gold wire between the electrode pad 16 and the inner lead 6a of the circuit 6 on the surface of the substrate 1 through the portion 5, the semiconductor element 7 and the circuit 6 can be electrically connected. Things. Furthermore, in order to protect the wire 8 and the inner lead 6a, by sealing with the sealing resin 17 so as to cover, in which it is possible to obtain the semiconductor device A _1. The semiconductor element 7 is further firmly fixed to the substrate 1 by the sealing resin 17.

[0014] The semiconductor device A ₁ which is manufactured as described above can be used and mounted on the motherboard 18. When mounting the semiconductor device A ₁ on the motherboard 18, as shown in FIG.
a and the lower electrode 3c are connected to a circuit (not shown) provided on the motherboard 18 by solder 19 and fixed.

FIG. 3 shows an embodiment of the integrated semiconductor device according to claim 2.
This shows an example of the form, and is a duplicate produced as described above.
Number of semiconductor devices A₁Is loaded. Sand
And the lower semiconductor device A₁Of the outer leads 3 of the substrate 1
On the upper electrode 3b, the upper semiconductor device A₁Substrate 1
The lower electrode 3c of the lead 3
When the upper and lower substrates 1 are mechanically joined with the conductive material 9
By electrically connecting the upper and lower substrates 1 together, a plurality of semiconductor devices are connected.
Place A₁Is loaded. This conductive material 9
Then, an anisotropic conductive adhesive can be used. this
As described above, two or more semiconductor devices A₁Stacking
The semiconductor device is a semiconductor device A at the lower end. ₁In the case of FIG.
By soldering 19 to the motherboard 18 in the same manner as
It can be mounted on the motherboard 18
is there.

By stacking a plurality of semiconductor devices A ₁ to form an integrated semiconductor device as described above, it becomes possible to mount the semiconductor devices A ₁ on the motherboard 18 at high density. Also in the semiconductor device A _1, for the semiconductor device 7 is mounted within counterbore recess 4 of the substrate 1, without projecting from the surface of the substrate 1, hence the gap top and bottom to pay semiconductor element 7 without the need to form between the substrates 1, so as to bond the substrate 1 directly are those capable of stacking a plurality of semiconductor devices a _1, it is possible to reduce the bulk of the stack, bonding the substrate 1 directly adjacent becomes possible to perform the connection of the semiconductor device a ₁ by, those capable of enhancing the reliability of the interconnections of the semiconductor device a _1. Here, when the sealing resin 17 protrudes from the surface of the substrate 1, the depth of the counterbore concave portion 4 provided in the substrate 1 is determined by adjusting the depth of the semiconductor element 7 and the adhesive 15.
In addition to the above, it is formed to have a size to accommodate the sealing resin 17.

FIG. 4 shows an example of an embodiment of the semiconductor device A _{2 according to} the third aspect of the present invention, in which a counterbore process is performed on one surface of the substrate 1 to form a square counterbore recess 4. 1
The circuit 6 is formed on the surface on the side opposite to the surface on which the counterbore recess 4 is provided. Other configurations of the substrate 1 is substantially the same as the substrate 1 of the semiconductor device A ₁ of FIG. 1 except for the omission of the opening 5.

In this case, the semiconductor element 7 is mounted on the substrate 1 by adhering as necessary to the surface of the substrate 1 opposite to the surface on which the counterbore recess 4 is provided. Uses a semiconductor element 7 of an edge pad provided with an electrode pad 16 on the periphery of the surface.
The semiconductor element 7 and the circuit 6 can be electrically connected by bonding a wire 8 such as a gold wire between the electrode pad 16 and the inner lead 6a of the circuit 6 on the surface of the substrate 1. There is one further semiconductor device 7 and the wire 8 by sealing with the sealing resin 17, it is possible to obtain a semiconductor device a _2.

The semiconductor device A ₂ manufactured as described above can be mounted on the motherboard 18 and used. When mounting the semiconductor device A ₂ on the motherboard 18, as shown in FIG.
a and the lower electrode 3c are connected to a circuit (not shown) provided on the motherboard 18 by solder 19 and fixed.

[0020] FIG. 5 shows an example of an embodiment of an integrated semiconductor device according to claim 4, are to be stacked a plurality of semiconductor devices A ₂ prepared as described above. That is, on the upper electrode 3b of the outer leads 3 of the substrate 1 of the semiconductor device A ₂ below, the conductivity of the lower electrode 3c of the outer leads 3 of the substrate 1 of the semiconductor device A ₂ above such anisotropic conductive adhesive Again through the material 9, the upper and lower substrates 1 with a conductive material 9 electrically connects the substrate 1 and below the well as mechanically bonding, are to be stacked a plurality of semiconductor devices a _2. The integrated semiconductor device on which the two or more semiconductor devices A ₂ are thus mounted is mounted on the mother board 18 by soldering the lower semiconductor device A ₂ to the mother board 18 as in the case of FIG. Is what you can do.

As described above, a plurality of semiconductor devices A_TwoLoading
Motherboard by integrating it into an integrated semiconductor device
18 to semiconductor device A_TwoCan be mounted at high density
It becomes. The semiconductor device A_TwoIn half
On the surface opposite to the surface on which the conductive element 7 is mounted,
Is formed with a plurality of semiconductors because the counterbore recess 4 is formed.
Device A_TwoIs loaded, the adjacent semiconductor devices A_Twosmell
And one of the semiconductor devices A _TwoSemiconductor element 7 is the other semiconductor
Body device A_TwoTo be placed in the counterbore recess 4 of the substrate 1
become. Therefore, the gap for accommodating the semiconductor element 7 is formed between the upper and lower substrates.
The substrate 1 can be directly bonded without the need to form
And a plurality of semiconductor devices A_TwoCan also be loaded
And that the stacking volume can be reduced.
The substrate 1 is directly bonded to the semiconductor device.
Place A_TwoOf the semiconductor device A
_TwoCan increase the reliability of the interconnection between
You. Here, when the sealing resin 17 is provided,
The depth of the counterbore recess 4 to be provided is a dimension for accommodating the sealing resin 17.
It is formed by law.

[0022] FIG. 6 shows an example of an embodiment of a semiconductor device A ₃ according to claim 5, countersunk recess 4a of the square and 4b are formed by applying a respective pocket machining on both sides of the substrate 1, A circuit 6 is formed on one surface of the substrate 1. The counterbore recess 4a provided on the substrate 1 on the surface on which the circuit 6 is formed has a smaller area than the counterbore recess 4b provided on the substrate 1 on the opposite surface. Other configurations of the substrate 1 is substantially the same as the substrate 1 of the semiconductor device A ₂ in FIG. 4 except that the counterbore recesses 4a, 4b are provided on both sides.

In this embodiment, the semiconductor element 7 is mounted in the counterbore recess 4a provided on the side where the circuit 6 is formed, of the counterbore recesses 4a and 4b provided on both surfaces of the substrate 1. As the semiconductor element 7, the electrode pad 1
The semiconductor device 7 of the edge pad provided with 6 is used. The semiconductor element 7 and the circuit 6 can be electrically connected by bonding a wire 8 such as a gold wire between the electrode pad 16 and the inner lead 6a of the circuit 6 on the surface of the substrate 1. There is one further semiconductor device 7 and the wire 8 by sealing with the sealing resin 17, it is possible to obtain a semiconductor device a _3.

The semiconductor device A ₃ which is prepared as described above can be used and mounted on the motherboard 18. When mounting the semiconductor device A ₃ on the motherboard 18, as shown in FIG.
a and the lower electrode 3b are connected to a circuit (not shown) provided on the motherboard 18 by solder 19 and fixed.

[0025] FIG. 7 shows an example of an embodiment of an integrated semiconductor device according to claim 6, are to be stacked a plurality of semiconductor devices A ₃ prepared as described above. That is, on the upper electrode 3b of the outer leads 3 of the substrate 1 of the semiconductor device A ₃ below, the conductivity of the lower electrode 3c of the outer leads 3 of the substrate 1 of the semiconductor device A ₃ above such as anisotropic conductive adhesive Again through the material 9, the upper and lower substrates 1 with a conductive material 9 electrically connects the substrate 1 and below the well as mechanically bonding, are to be stacked a plurality of semiconductor devices a _3. Thus it is loaded with an integrated semiconductor device 2 or more the plurality of semiconductor devices A _3, by soldering 19 attached to the motherboard 18 as in FIG. 6 of the semiconductor device A ₃ at the lower end, mounted on a mother board 18 Is what you can do.

As described above, by stacking a plurality of semiconductor devices A ₃ to form an integrated semiconductor device, it becomes possible to mount the semiconductor devices A ₃ on the motherboard 18 at high density. Also in the semiconductor device A _3, the semiconductor device 7 is housed in the counterbore recess 4a of one side of the substrate 1, moreover to counterbore recess 4a to other side of the substrate 1 are formed a plurality in carrying stacked semiconductor device a _3, the sealing resin 17 for sealing is not necessary to form between the substrates 1 of the upper and lower gaps, also the semiconductor element 7 of one of the semiconductor devices a ₃ to pay semiconductor element 7, is accommodated in the other of the substrate 1 of the semiconductor device a ₃ countersunk recess 4b. Therefore, so as to bond the substrate 1 directly are those capable of stacking a plurality of semiconductor devices A _3, the semiconductor device adjacent by it is possible to reduce the bulk of the stack, bonding the substrate 1 directly it is possible to perform the connection of a _3, it is capable of enhancing the reliability of the interconnections of the semiconductor device a _3.

Here, the counterbore recess 4b of the substrate 1 needs to contain the sealing resin 17 for sealing the semiconductor element 7 mounted on the counterbore recess 4a. Are formed with a large area. Substrate 1
The depth of the counterbore recesses 4a and 4b provided in the semiconductor element 7
And a size for accommodating the sealing resin 17.

FIG. 8 shows an embodiment of the integrated semiconductor device according to claim 7.
It shows an example of the form, and the half produced as above
Conductor device A₁And the semiconductor device A_TwoAnd the semiconductor device A_Threeof
At least two types of semiconductor devices A₁, A_Two, A_ThreeMultiple
It is designed to be loaded. Adjacent semiconductor device A₁,
A_Two, A_ThreeBonding is performed in the same manner as in FIGS. 3, 5, and 7.
And integration on motherboard 18
The mounting of the semiconductor device is performed in the same manner as in FIGS. 3, 5, and 7.
Can be done. Thus, the semiconductor device A ₁,
A_Two, A_ThreeBy combining and loading
Semiconductor element 7 of the touch pad and the semiconductor element of the edge pad
7 can be used in combination.
This increases the degree of freedom of dressing.

In the example of FIG. 8, the semiconductor device A ₁ and the semiconductor device A ₂ are combined to form an integrated semiconductor device. However, the combination of the semiconductor device A ₁ and the semiconductor device A ₃ , and the semiconductor device A ₂ and the semiconductor device A ₃ the combination of a _3, it is also possible to form an integrated semiconductor device in combination of the semiconductor device a ₁ and the semiconductor device a ₂ and the semiconductor device a _3. Further, a semiconductor device A conventionally used as shown in FIG.
Can be combined.

[0030]

As described above, in the semiconductor device according to the first aspect of the present invention, a plurality of recesses having a substantially semicircular cross section are provided on the side end surface of the substrate by cutting the through hole at a position where the through hole is cut into substantially half. Also, outer leads are formed in the recesses, counterbore recesses are formed on one side of the substrate, and openings are provided on both sides of the substrate at the locations of the counterbore recesses, and the opposite side to the surface on which the counterbore recesses are provided. A circuit to be connected to the outer lead was formed on the surface of the substrate on the surface of the substrate, the semiconductor element was mounted in the counterbore recess, and a wire was bonded between the semiconductor element and the circuit through the opening. The semiconductor element mounted inside does not protrude from the surface of the substrate, and there is no need to form a gap between the substrates to accommodate the semiconductor element. The device can be mounted, and the mounted semiconductor devices can be electrically connected by connecting the outer leads provided on the substrate, and the reliability of the mutual connection of the semiconductor devices is improved. An integrated semiconductor device as claimed in claim 2 can be obtained. In addition, when the semiconductor element is mounted in the counterbore, the center of the semiconductor element can be exposed in the opening, and the semiconductor element and the circuit can be wire-bonded using the semiconductor element in the center pad. It becomes something.

In the semiconductor device according to a third aspect of the present invention, the through hole is cut at a location where the through hole is cut in substantially half, so that a recess having a substantially semicircular cross section is provided on the side end surface of the substrate, and the outer lead is provided in the recess. Forming, forming a counterbore on one side of the substrate, forming a circuit connected to the outer lead on the surface of the substrate, mounting the semiconductor element on the surface opposite to the surface on which the counterbore is formed, and mounting the semiconductor. Since the element and the circuit are connected, when loading a plurality of semiconductor devices, the semiconductor element of one of the adjacent semiconductor devices is placed in the counterbore recess of the substrate of the other semiconductor device, and the semiconductor element is placed. A plurality of semiconductor devices can be stacked by directly bonding the substrates without the need to form a gap between the substrates, and the semiconductor devices can be stacked by connecting the outer leads provided on the substrates. And it is one capable of electrically connecting a semiconductor device, in which it is possible to obtain an integrated semiconductor device as according to claim 4 that increases the reliability of mutual connection of the semiconductor device.

In a semiconductor device according to a fifth aspect of the present invention, a through-hole is cut at a location where the through-hole is cut in half so that a recess having a substantially semicircular cross section is provided on the side end surface of the substrate, and an outer lead is provided in the recess. Forming, forming counterbore recesses on both sides of the substrate, forming a circuit connected to outer leads on the surface of the substrate, mounting the semiconductor element in one of the counterbore recesses on both sides of the substrate, and mounting the semiconductor element And the circuit are connected, so that multiple semiconductor devices can be stacked with the semiconductor element housed in the counterbore recess of the substrate, and there is no need to form a gap between the substrates to accommodate the semiconductor element, and the substrates are directly joined. A plurality of semiconductor devices can be stacked in this manner, and the stacked semiconductor devices can be electrically connected by connecting outer leads provided on the substrate. A is one in which it is possible to obtain an integrated semiconductor device as according to claim 6 that increases the reliability of mutual connection of the semiconductor device.

According to a seventh aspect of the present invention, there is provided an integrated semiconductor device comprising two or more types of the semiconductor device according to the first aspect, the third aspect, and the fifth aspect by stacking substrates. Since a plurality of semiconductor devices are stacked, each semiconductor device can be directly bonded and stacked without needing to form a gap for accommodating a semiconductor element between the substrates. It is possible to electrically connect the stacked semiconductor devices by connecting the outer leads, and to obtain an integrated semiconductor device in which the reliability of the mutual connection of the semiconductor devices is improved.

In the integrated semiconductor device according to claim 8 of the present invention, the stacked semiconductor devices are joined and electrically connected by stacking the substrates via the conductive material. Thereby, the bonding and the electrical connection of the substrate can be performed at the same time, so that the assembly of the integrated semiconductor device is facilitated and the bulk of the integrated semiconductor device can be reduced.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an example of an embodiment of the present invention.

FIG. 2 is a perspective view of a part of the above substrate.

FIG. 3 is a sectional view showing an example of the embodiment of the invention according to claim 2;

FIG. 4 is a sectional view showing an example of the embodiment of the third invention.

FIG. 5 is a sectional view showing an example of the embodiment of the invention according to claim 4;

FIG. 6 is a sectional view showing an example of the embodiment of the invention of claim 5;

FIG. 7 is a sectional view showing an example of the embodiment of the invention according to claim 6;

FIG. 8 is a sectional view showing an example of the embodiment of the invention according to claim 7;

FIG. 9 is a sectional view of a conventional example.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Substrate 2 Depression 3 Outer lead 4 Counterbore 4a Counterbore 4b Counterbore 5 Opening 6 Circuit 7 Semiconductor element 8 Wire 9 Conductive material A ₁ Semiconductor device A ₂ Semiconductor device A ₃ Semiconductor device

Claims (8)

[Claims] 1. A plurality of recesses having a substantially semicircular cross section are formed in a side end surface of a substrate by cutting a through hole at a position where the through hole is cut into substantially half, and outer leads are formed in the recesses. A counterbore is formed, and an opening is formed on both sides of the substrate at the location of the counterbore. A circuit is formed on the surface of the substrate opposite to the side where the counterbore is provided, and the circuit is connected to the outer lead. And
A semiconductor device comprising a semiconductor element mounted in a spot facing recess and a wire bonded between the semiconductor element and a circuit through the opening. 2. An integrated semiconductor device comprising a plurality of semiconductor devices according to claim 1, stacked on a substrate. 3. A through-hole is cut at a location where the through-hole is cut in half, thereby forming a recess having a substantially semicircular cross section on the side end surface of the substrate and forming an outer lead in the recess.
A counterbore is formed on one side of the substrate, a circuit connected to the outer lead is formed on the surface of the substrate, and a semiconductor element is mounted on a surface opposite to the surface on which the counterbore is formed, and the semiconductor element and the circuit are mounted. And a semiconductor device. 4. An integrated semiconductor device comprising a plurality of semiconductor devices according to claim 3, stacked on a substrate. 5. A recess having a substantially semicircular cross section is formed on a side end surface of the substrate by cutting the through hole at a position where the through hole is cut in substantially half, and an outer lead is formed in the recess.
A counterbore recess is formed on each side of the substrate, a circuit connected to the outer lead is formed on the surface of the substrate, and a semiconductor element is mounted on one of the counterbore recesses on both sides of the substrate, and the semiconductor element and the circuit are mounted. A semiconductor device, comprising: 6. An integrated semiconductor device comprising a plurality of semiconductor devices according to claim 5, stacked on a substrate. 7. A semiconductor device according to claim 1, a semiconductor device according to claim 3, and a plurality of semiconductor devices of at least two types among the semiconductor devices according to claim 5 by stacking substrates. An integrated semiconductor device characterized by being loaded. 8. The semiconductor device according to claim 2, wherein the stacked semiconductor devices are joined and electrically connected by stacking the substrates via a conductive material. Item 8. The integrated semiconductor device according to any one of Items 7.