JPH1175365A - Driving method of control circuit of dc-dc converter, control circuit of dc-dc converter, dc-dc converter and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the control circuit of a DC-DC converter which can practice soft start securely and can supply a stable output voltage. SOLUTION: A short-circuit transistor 31 is connected between the output terminal of an error amplification circuit 15 and a ground GND. The short- circuit transistor 31 is kept in an ON-state until a release signal SG3 of an L-level is outputted from an initial malfunctioning preventive circuit 12, i.e., until a triangular wave oscillation circuit 13 is made to start an oscillation operation, to keep the error output signal SG6 of the error amplification circuit 15 at 0 volt. A PWM comparison circuit 17 generates a duty ratio control signal SG7 in accordance with the triangular wave signal SG3 of the triangular wave oscillation circuit 13 which starts the oscillation operation normally and the error output signal SG6 which is obtained by amplifying a differential voltage between a charging voltage Vsof and an output voltage Vout which are compared with each other by the error amplification circuit 15 in a normal state.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a central processing unit (CPU), a storage device (RAM,
The present invention relates to a method of driving a control circuit of a DC-DC converter that supplies operating power to various semiconductor integrated circuit devices (ICs) such as a ROM, a control circuit of a DC-DC converter, a DC-DC converter, and electronic equipment. .

[0002] Electronic devices are equipped with a large number of semiconductor integrated circuit devices (ICs). Each of these semiconductor integrated circuit devices requires an operating power supply individually. Generally, the operating power is generated by a DC-DC converter. When the operating power is supplied to each semiconductor integrated circuit device, a malfunction occurs between each semiconductor integrated circuit device unless a stable operating power is supplied and a power-on sequence between the semiconductor integrated circuit devices is not performed accurately. Cause. So D
With respect to the supply of operating power to each semiconductor integrated circuit device by the C-DC converter, it is required to supply power with high accuracy.

[0003]

2. Description of the Related Art In general, a DC power source obtained by converting a commercial power source by a power source circuit (AC-DC inverter circuit) is used as a power source for various electronic devices. The converted DC power is converted into an operation power corresponding to each semiconductor integrated circuit device by a DC-DC converter. The operating power generated by the DC-DC converter is supplied to each corresponding semiconductor integrated circuit device. That is, as shown in FIG. 10, the electronic device 100 includes a central processing unit (CPU), chip select, semiconductor integrated circuit devices 101 such as storage devices (RAM, ROM, etc.), a power supply circuit 102, and a DC-DC converter 1. It is installed. Then, the power supply circuit 102
Converts the commercial power supply VA into various DC power supplies Vcc and Vin. The DC-DC converter 1 steps down the converted DC power supply Vin to provide a stable operation power supply (output voltage Vou).
The data is supplied to each semiconductor integrated circuit device 101 as t).

FIG. 8 shows an electric circuit of a general DC-DC converter 1. The DC-DC converter 1 includes a control circuit 2 formed on a one-chip semiconductor integrated circuit device and a plurality of external elements. The output signal SG1 of the control circuit 2 is supplied to the gate of an output transistor 3 composed of an enhancement type N-channel MOS transistor. The DC power supply voltage Vin is supplied to the drain of the output transistor 3 from the power supply circuit 102 in FIG.
The source of the output transistor 3 is connected to the output terminal 5 via the output coil 4. The output terminal 5 is connected to each semiconductor integrated circuit device 101 as a load.

[0005] The source of the output transistor 3 is connected to the cathode of a flywheel diode 6 composed of a Schottky diode. The anode of the flywheel diode 6 is connected to the ground GND. The output coil 4 and the output terminal 5 are connected to a ground GND via a capacitor 7. The output coil 4 and the capacitor 7 form a smoothing circuit. The output coil 4 and the output terminal 5 are connected to the control circuit 2 via the resistor 8 and output the output voltage Vout at that time to the control circuit 2.

The control circuit 2 includes a reference voltage generation circuit 11, an initial malfunction prevention circuit 12, a triangular wave oscillation circuit 13, a dead time circuit 14, an error amplification circuit 15, a constant current circuit 16,
WM comparison circuit 17, output circuit 18, two first and second
Transistors 19 and 20 are provided.

[0007] The reference voltage generation circuit 11
02, a drive power supply voltage Vcc is supplied, and a control signal SG2 from an external device (not shown) is input via an external control input terminal 21. The reference voltage generation circuit 11 includes a band gap reference circuit, and responds to the rise of the control signal SG2 from the L level (low potential) to the H level (high potential) based on the drive power supply voltage Vcc as a first reference voltage. A reference voltage Vref (<Vcc) is generated. As shown in FIG. 9, when the control signal SG2 rises to the H level at time t0, the reference voltage Vref rises with a constant slope, reaches the specified voltage value Vref1 (<Vcc) after the time t2, and thereafter, the specified voltage value Vref1 To maintain.

The initial malfunction prevention circuit 12 is supplied with a drive power supply voltage Vcc from the power supply circuit 102,
The reference voltage Vref from the reference voltage generation circuit 11 is input as a bias voltage. Initial malfunction prevention circuit 12
As shown in FIG. 9, the reference voltage Vref which is increasing toward the specified voltage value Vref1 is a predetermined voltage value Vref.
ref2, that is, the reference voltage Vref becomes the operable bias voltage (= Vref) of the prevention circuit 12.
At time t1 when the time reaches 2), a release signal SG3 that falls from the H level to the L level is output.

[0009] The triangular wave oscillation circuit 13 is
2 supplies the drive power supply voltage Vcc, and inputs the reference voltage Vref from the reference voltage generation circuit 11 as a bias voltage. The triangular wave oscillation circuit 13 sets the reference voltage Vref to a predetermined voltage value Vref3 (> Vref2).
, That is, as shown in FIG. 9, the reference voltage V
The time t1 and the time t2 when ref reaches a bias voltage (= Vref3) at which the oscillation circuit 13 can oscillate.
The oscillatory operation is started during the time between and a triangular wave signal SG4 of a triangular wave having an amplitude in a certain voltage value range is output.

The dead time circuit 14 is composed of a voltage dividing circuit in which a plurality of resistors are connected in series. The dead time circuit 14 receives the reference voltage Vref from the reference voltage generation circuit 11, divides the reference voltage Vref, and outputs the divided voltage as a limit signal SG5. Therefore, as shown in FIG. 9, when the control signal SG2 rises to the H level at the time t0, the limit signal SG5 rises with a constant gradient similarly to the reference voltage Vref, and after the time t2, the rated voltage Vk (<Vref1). , And thereafter maintains the rated voltage value Vk. The rated voltage value Vk of the limit signal SG5 is set to a value slightly lower than the maximum value of the triangular wave signal SG4 by adjusting the voltage dividing ratio of the resistor in the dead time circuit 14. More specifically, when the triangular wave signal SG4 and the limit signal SG5 are compared by the PWM comparison circuit 17, the rated voltage Vk is set to a value at which the duty ratio of the pulse signal of the output signal SG1 becomes 90%. .

The error amplifying circuit 15 has an inverting input terminal as a detected voltage input terminal and first and second non-inverting input terminals as first and second reference voltage input terminals. The output voltage Vout is input to the inverting input terminal of the error amplifier circuit 15 via the resistor 8. The error amplifier circuit 15 is supplied with a drive power supply voltage Vcc from the power supply circuit 102. The error amplifier 15 receives the reference voltage Vref from the reference voltage generator 11 as a bias voltage.

A first non-inverting input terminal of the error amplification circuit 15 receives the reference voltage Vref from the reference voltage generation circuit 11. The second non-inverting input terminal of the error amplifier circuit 15 is connected to the ground GND via an external soft start capacitor 22. The capacitor 22 is connected to the reference voltage Vref applied from the reference voltage generation circuit 11.
Is supplied from the constant current circuit 16 that operates based on the current. The capacitor 61 is connected to the constant current circuit 1
6, the charging voltage Vsof rises and reaches the reference voltage Vref. That is, the charging voltage Vsof is equal to the reference voltage Vref as the first reference voltage.
Form a second reference voltage, and a reference voltage generation circuit 11,
The charging voltage Vsof is generated by the capacitor 22 or the like.

The second non-inverting input terminal is connected to the collector of a first transistor 19 as a soft start transistor, and the emitter of the first transistor 19 is connected to ground GND. First transistor 1
9 is based on the release signal S of the initial malfunction prevention circuit 12.
Enter G3. Therefore, at time t1, the release signal SG3 falls from the H level to the L level and the first transistor 1
When 9 is turned off from on, the capacitor 22 starts charging the constant current circuit 16 with a constant current. As a result, the charging voltage Vsof starts increasing from time t1, as shown in FIG.

An external capacitor 23 and a resistor 2 are connected between the output terminal of the error amplifier circuit 15 and the inverting input terminal.
4 are connected to prevent oscillation of the error amplifier circuit 15.

The error amplifying circuit 15 has a smaller one of the reference voltage Vref inputted to the first non-inverting input terminal and the charging voltage Vsof inputted to the second non-inverting input terminal, and the output inputted to the inverted input terminal. The output voltage Vout of the terminal 5 is compared with the output voltage Vout. Then, the error amplifier circuit 15 outputs the error output signal SG6 obtained by amplifying the difference voltage between the two voltages to be compared to the next stage P
Output to the WM comparison circuit 17.

Further, the error amplification circuit 15 operates until the reference voltage Vref, which is rising toward the specified voltage value Vref1, reaches a predetermined voltage value, as shown in FIG. Until the time t1 at which the difference prevention circuit 12 outputs the L-level release signal SG3, the output voltage SG6 according to the reference voltage Vref is output without performing the comparative amplification operation. That is, the error amplification circuit 15
And at least one of the second non-inverting input terminals is 0
Since the logic is inverted near volts, the error output signal SG6 that becomes the bias voltage, that is, the reference voltage Vref
Is output.

After the time t1, the error amplification circuit 15
Performs a comparison operation between the output voltage Vout input to the inverting input terminal and the smaller of the reference voltage Vref input to the first non-inverting input terminal or the charging voltage Vsof input to the second non-inverting input terminal. Then, the operation shifts to an operation of amplifying the difference voltage.

The PWM comparison circuit 17 includes the power supply circuit 102
Supplies a drive power supply voltage Vcc. The PWM comparison circuit 17 has an inverting input terminal and first and second non-inverting input terminals. The inverting input terminal of the PWM comparison circuit 17 inputs the triangular wave signal SG4 from the triangular wave oscillation circuit 13. A first non-inverting input terminal of the PWM comparison circuit 17 receives the error output signal SG6 from the error amplification circuit 15. The second non-inverting input terminal of the PWM comparison circuit 17 receives the limit signal SG5 from the dead time circuit 14.

The PWM comparison circuit 17 outputs the smaller one of the error output signal SG6 input to the first non-inverting input terminal and the limit signal SG5 input to the second non-inverting input terminal, and the above-mentioned signal input to the inverting input terminal. A comparison is made with the triangular wave signal SG4 of the triangular wave oscillation circuit 13. Then, the PWM comparing circuit 17 is at the L level when the triangular wave signal SG4 is larger in the comparison, and the same or the triangular wave signal SG in the comparison.
When the value of 4 is smaller, a pulse signal which becomes H level is output to the output circuit 18 as the duty control signal SG7.

The output terminal of the PWM comparison circuit 17 is connected to the collector of the second transistor 20, and the emitter of the second transistor 20 is connected to the ground GND. The base of the second transistor 20 receives the release signal SG3 of the initial malfunction prevention circuit 12. Therefore, when the release signal SG3 falls from the H level to the L level at the time t1, and the second transistor 20 is turned off from the on state, the duty control signal SG7 is supplied to the output circuit 18 at the next stage. The output circuit 18 is supplied with a drive power supply voltage Vcc from the power supply circuit 102. The output circuit 18 supplies the duty control signal SG7 to the gate of the output transistor 3 as the output signal SG1.

The DC-DC converter 1 configured as described above is provided with a drive power supply voltage Vc from the power supply circuit 102 of FIG.
c is each of the circuits 11 to 13, 15, 17, 1 in the control circuit 2.
8, the operation is stopped when the L-level control signal SG2 is supplied to the reference voltage generation circuit 11 from an external device.

That is, the reference voltage Vref of the reference voltage generation circuit 11 is 0 volt. Therefore, the error amplification circuit 15
0 volt reference voltage Vref
Is supplied. The initial malfunction prevention circuit 12 is supplied with a reference voltage Vref of 0 volt. Accordingly, the release signal SG3 is at the H level, and the first and second transistors 19 and 20 are on. As a result, the first non-inverting input terminal of the error amplifier 15 is at 0 volt.
Further, since the second transistor 20 is also in the ON state, the output signal SG1 is at the L level. Therefore, the output transistor 3 is off, and the output voltage Vout is 0 volt.

Then, when an H-level control signal SG2 is supplied from the external device to the reference voltage generation circuit 11 at time t0, the DC-DC converter 1 starts operating. In response to the H-level control signal SG2, the reference voltage generation circuit 11 generates a reference voltage Vref based on the drive power supply voltage Vcc. At this time, as shown in FIG. 9, the reference voltage Vref increases to the specified voltage value Vref1 with a constant slope. The gradually increasing reference voltage Vref is supplied to the initial malfunction prevention circuit 12, the triangular wave oscillation circuit 13, the dead time circuit 14, the first non-inverting input terminal of the error amplification circuit 15, and the constant current circuit 16.

At this time, the rising reference voltage Vref is supplied to the first non-inverting input terminal of the error amplifier circuit 15.
The charging voltage Vsof input to the second non-inverting input terminal of the error amplifier circuit 15 is 0 volt. Therefore, the error output signal SG6 of the error amplification circuit 15 increases the reference voltage Vre.
It increases at the same voltage value of f. Further, the dead time circuit 14 outputs a limit signal S relative to the rising reference voltage Vref.
G5 is supplied to the PWM comparison circuit 17.

Accordingly, the PWM comparison circuit 17 compares the limit signal SG5 of the dead time circuit 14 with the triangular wave signal SG4 of the triangular wave oscillation circuit 13. At this time, the triangular wave oscillation circuit 13 has not started oscillating yet, and the triangular wave signal SG4
Is 0 volts. As a result, the PWM comparison circuit 17
A level duty control signal SG7 is output. However, since the second transistor 20 is on, the H level duty control signal SG7 disappears and goes to the L level. Therefore, the output signal SG1 of the output circuit 18 still maintains the L level, so that the output transistor 3 remains off.

At time t1, the L-level release signal SG3 is output from the initial malfunction prevention circuit 12 to the bases of the first and second transistors 19 and 20, and both transistors 19 and 20 are turned off. When the first transistor 19 is turned off, the capacitor 22 starts charging, and the charging voltage Vsof is changed to the second voltage of the error amplifier circuit 15.
Supply to non-inverting input terminal. Since the charging voltage Vsof is lower than the reference voltage Vref, the error amplifying circuit 15 compares the output voltage Vout at that time with the charging voltage Vsof, amplifies the difference voltage, and outputs the amplified error output signal SG6 to the PWM comparison circuit 17. I do. Immediately after the time t1, the output voltage Vout is 0 volt and the charging voltage Vsof is slightly higher than 0 volt. Therefore, the difference voltage between the charging voltage Vsof and the output voltage Vout is small, so that the error output signal SG6 of the error amplifier circuit 15 decreases. I will do it. At time t1, the triangular wave oscillation circuit 13 has not yet started oscillating.

Therefore, the PWM comparison circuit 14 outputs the error output signal SG6 of the error amplification circuit 15 to the dead time circuit 14
Until the limit signal SG5 becomes smaller than the limit signal SG5.
G5 is compared with the triangular wave signal SG4. The PWM comparison circuit 14 outputs the error output signal SG6 of the error amplification circuit 15
Is smaller than the limit signal SG5, the error output signal SG6 is compared with the triangular wave signal SG4. However, the triangular wave oscillation circuit 13 has not started oscillating yet, and the triangular wave signal SG4 is at 0 volt. As a result, the PWM comparison circuit 1
7 outputs an H level duty control signal SG7.

At this time, since the second transistor 20 is off, the H level duty control signal SG7 is output to the output circuit 18. Therefore, the output signal SG1 of the output circuit 18 becomes H level, and the output transistor 3 turns on. As a result, the power supply voltage Vin is supplied to the output terminal 5 via the output coil 4, and the output voltage Vout increases from 0 volt toward the power supply voltage Vin. The rising output voltage Vout is supplied to the error amplifier circuit 15.

Eventually, the triangular wave oscillating circuit 13 oscillates and outputs a triangular wave signal SG4. When the triangular wave signal SG4 becomes larger than the error output signal SG6, the duty control signal SG7 of the PWM comparison circuit 17 goes low. The output signal SG1 of the output circuit 18 becomes L level, and the output transistor 3 turns off. As a result, the supply of the power supply voltage Vin is cut off, the charge of the capacitor 7 is discharged, and the output voltage Vout decreases.

The error amplifier 15 compares the decreasing output voltage Vout with the charging voltage Vsof and outputs an error output signal SG6 to the PWM comparator 17. Since the falling output voltage Vout is higher than the charging voltage Vsof, the error output signal SG6 of the error amplifier circuit 15 is smaller than the triangular wave signal SG4. Therefore, the duty control signal SG7 of the PWM comparison circuit 17 maintains the L level. That is,
The output transistor 3 remains off and the output voltage Vout
Keeps falling.

Eventually, the output voltage Vout becomes the charging voltage Vs
When the voltage value becomes smaller than the voltage value, the voltage value of the error output signal SG6 of the error amplification circuit 15 increases. Then, the rising error output signal SG6 reaches the amplitude range of the triangular wave signal SG4. When the error output signal SG6 reaches the amplitude range of the triangular wave signal SG4, the PWM comparison circuit 17
It outputs a duty control signal SG7 which becomes H level when G6 is larger than the triangular wave signal SG4, and becomes L level when the error output signal SG6 is smaller than the triangular wave signal SG4.

Thereafter, the DC-DC converter 1 controls the output voltage Vout so as to be the rising charging voltage Vsof. When the charging voltage sof reaches the specified voltage value Vref1, the DC-DC converter 1
Controls the output voltage Vout to maintain the reference voltage Vref, that is, the specified voltage value Vref1.

That is, in the steady state, in the DC-DC converter 1, the error amplification circuit 15 compares the reference voltage Vref (specified voltage value Vref1) with the output voltage Vout, and outputs an error output signal SG6 to the PWM comparison circuit 17. PWM
The comparison circuit 17 outputs the error output signal SG6 and the triangular wave signal S
G4 is compared to generate a duty control signal SG7 to control the duty of the output transistor 3. Therefore, the output voltage Vout becomes the specified voltage value Vref1 (the reference voltage Vr).
ef).

When the power is turned on (when the H-level control signal SG2 is input), the DC-DC converter 1 gradually increases the output voltage Vout without increasing the output voltage Vout to a prescribed voltage value Vref1 of the reference voltage Vref. Perform a soft start. That is, the DC-DC converter 1 converts the output voltage Vout to the charging voltage Vsof by a soft start circuit including the first transistor 19, the capacitor 22, the error amplifier circuit 15, and the constant power supply circuit 16.
Is raised to the reference voltage Vref in accordance with the rise of the reference voltage Vref. By this soft start, the output voltage Vout is instantaneously reduced to the specified voltage value Vref1 of the reference voltage Vref.
To prevent the output transistor 3 from being kept on, which occurs when the output transistor 3
Is prevented beforehand.

[0035]

However, the above D
During the soft start of the C-DC converter, when the L-level release signal SG3 is output from the initial malfunction prevention circuit 12, the duty control signal SG7 immediately goes to the H level regardless of the charging voltage Vsoff. Then, the output transistor 3 is immediately turned on. That is, the soft start function does not work temporarily. This is because the triangular wave oscillation circuit 13 does not oscillate even if the release signal SG3 goes to L level.

Therefore, since the output transistor 3 is temporarily turned on before the soft start function is activated, there is a problem that an overcurrent flows through the output transistor 3 to deteriorate the transistor 3.

Moreover, the output voltage Vout suddenly rises and becomes unstable due to the rapid turning on of the output transistor 3. This unstable output voltage Vout is supplied to each semiconductor integrated circuit device as an operation power source, and causes a malfunction with each semiconductor integrated circuit device. In particular, there is a problem when a certain timing (sequence) is required between the semiconductor integrated circuit devices 101 based on the operation power supply.

In some cases, the PWM comparison circuit 17 outputs an H-level duty control signal SG7 due to an undefined input. In this case, there is a similar problem. A first object of the present invention is to ensure that soft start is performed and to provide a stable output voltage.
Driving method of control circuit of C-DC converter, DC-DC
A converter control circuit, a DC-DC converter, and
An object of the present invention is to provide an electronic device including the DC-DC converter.

A second object of the present invention is to control a stable operation power-on timing for a plurality of semiconductor integrated circuit devices and prevent a malfunction with each semiconductor integrated circuit device due to a shift in the applied timing. And an electronic device provided with the DC-DC converter.

[0040]

According to a first aspect of the present invention, there is provided a reference voltage input terminal for inputting a reference voltage for maintaining a specified voltage value after a change over time toward a specified voltage value, and an output transistor. A detected voltage input terminal for inputting an output voltage generated based on the ON / OFF operation of the detected voltage as a detected voltage, comparing the reference voltage and the detected voltage, amplifying a difference voltage between the reference voltages and an error output signal, An error amplifying circuit to be output, a control for comparing the magnitude of the triangular wave signal output from the triangular wave oscillation circuit and the error output signal, and turning on / off the output transistor to bring the detected voltage closer to the reference voltage. In a method for driving a control circuit of a DC-DC converter comprising a PWM comparison circuit for generating a signal and outputting the signal to the output transistor, the triangular wave oscillation circuit performs an oscillation operation. Until start and to hold the output transistor in an off state.

According to a second aspect of the present invention, in the method for driving a control circuit of a DC-DC converter according to the first aspect, the reference voltage is a first voltage for controlling the detected voltage to the specified voltage value. A reference voltage and a second reference voltage whose voltage value changes with time toward the first reference voltage, wherein the reference voltage input terminal of the error amplifier circuit is connected to the first reference voltage;
A first reference voltage input terminal for inputting a reference voltage;
A second reference voltage input terminal for inputting a reference voltage.

According to a third aspect of the present invention, a detected voltage input terminal for inputting an output voltage generated based on an on / off operation of an output transistor as a detected voltage, and setting the detected voltage to a specified voltage value A first reference voltage input terminal for inputting a first reference voltage for control, and a second reference voltage input terminal for inputting a second reference voltage whose voltage value changes with time toward the first reference voltage. The second reference voltage is compared with the output voltage while the second reference voltage changes with time, and the difference voltage is amplified and output as an error output signal.
When the reference voltage does not change with time, an error amplifier circuit that compares the first reference voltage with the output voltage, amplifies the difference voltage and outputs it as an error output signal, and a triangular wave signal output from the triangular wave oscillation circuit. PWM comparison for comparing a magnitude with the error output signal, generating a control signal for turning on / off the output transistor to bring the detected voltage closer to the first and second reference voltages, and outputting the control signal to the output transistor And a circuit for driving a control circuit of a DC-DC converter, the second reference voltage input terminal of the error amplification circuit is grounded until the triangular wave oscillation circuit starts an oscillating operation. After at least one output terminal of the PWM comparison circuit is grounded and the triangular wave oscillation circuit starts oscillating, the grounded second reference voltage input terminal And an output terminal was to be released from the ground. The invention according to claim 4 is based on a reference voltage input terminal for inputting a reference voltage that keeps the specified voltage value after changing over time toward the specified voltage value, and an on / off operation of the output transistor. A detected voltage input terminal for inputting an output voltage to be detected as a detected voltage,
An error amplifier circuit that compares the reference voltage and the detected voltage, amplifies the difference voltage and outputs the difference output signal as an error output signal, compares the magnitude of the triangular wave signal output from the triangular wave oscillation circuit with the error output signal, PWM for generating a control signal for turning on / off an output transistor to bring the detected voltage closer to the reference voltage and outputting the control signal to the output transistor
In a DC-DC converter control circuit including a comparison circuit, a holding circuit for holding the output transistor in an off state until the triangular wave oscillation circuit starts oscillating operation is provided.

According to a fifth aspect of the present invention, in the control circuit of the DC-DC converter according to the fourth aspect, the holding circuit is connected to at least one of the output terminal of the error amplifier circuit and the PWM comparison circuit with a ground. And a short-circuit transistor that is connected between the triangular wave oscillation circuit and turned off until the triangular wave oscillation circuit starts oscillating, and a reference voltage input terminal of the error amplification circuit. And a soft-start transistor connected between the triangular wave oscillation circuit and ground, and turned off after the triangular wave oscillation circuit starts oscillating operation.

According to a sixth aspect of the present invention, in the control circuit of the DC-DC converter according to the fifth aspect, the holding circuit circuit includes the short-circuit and soft-start circuit until the triangular wave oscillation circuit starts oscillating. And an initial malfunction prevention circuit that generates a release signal that turns off the transistors for turning on the transistors and turns off both transistors after the triangular wave oscillation circuit starts oscillating.

According to a seventh aspect of the present invention, in the control circuit of the DC-DC converter according to the fifth aspect, the control circuit includes a triangular wave oscillation circuit for generating a triangular wave signal output to the PWM comparison circuit. .

According to an eighth aspect of the present invention, in the control circuit of the DC-DC converter according to the fifth aspect, the control circuit includes a reference voltage generating circuit for generating the reference voltage. According to a ninth aspect of the present invention, a detected voltage input terminal for inputting an output voltage generated based on an on / off operation of an output transistor as a detected voltage, and controlling the detected voltage to a specified voltage value. A first reference voltage input terminal for inputting a first reference voltage, and a second reference voltage input terminal for inputting a second reference voltage whose voltage value changes with time toward the first reference voltage. While the second reference voltage is changing with time, the second reference voltage is compared with the output voltage, the difference voltage is amplified and output as an error output signal, and the second reference voltage is changed with time. When the change is stopped, the first reference voltage is compared with the output voltage, the difference voltage is amplified, and an error output signal is output as an error output signal. Compare large and small A control circuit for a DC-DC converter, comprising: a PWM comparison circuit that generates a control signal for turning on / off a transistor to bring the detected voltage closer to the first and second reference voltages and outputs the control signal to the output transistor. A triangular wave oscillation circuit that generates the triangular wave signal, and a reference voltage that generates the first and second reference voltages and supplies the first reference voltage to both circuits as a bias voltage of a triangular wave oscillation circuit and an error amplifier circuit. A generation circuit; a short-circuit transistor connected between at least one output terminal of the error amplification circuit and the PWM comparison circuit and a ground;
A soft start transistor connected between a reference voltage input terminal and a ground, and a first reference voltage generated by the reference voltage generation circuit are input as a bias voltage, and the triangular wave oscillation circuit starts oscillating. An initial malfunction prevention circuit that turns on the short-circuit and soft-start transistors and generates a release signal that turns off the short-circuit and soft-start transistors after the triangular wave oscillation circuit starts oscillating. Equipped.

According to a tenth aspect of the present invention, a reference voltage input terminal for inputting a reference voltage for maintaining a specified voltage value after a change over time toward a specified voltage value, and an on / off operation of an output transistor. A detected voltage input terminal for inputting an output voltage generated based on the detected voltage as a detected voltage, an error amplifier circuit that compares the reference voltage and the detected voltage, amplifies the difference voltage thereof, and outputs the amplified voltage as an error output signal; Comparing the magnitude of the triangular wave signal output from the triangular wave oscillation circuit with the error output signal and turning on the output transistor.
A control signal for generating a control signal for turning off the detected voltage to approach the reference voltage and outputting the control signal to the output transistor;
In a control circuit of a DC-DC converter provided with a WM comparison circuit, a reference voltage generation circuit for generating the reference voltage, and a reference voltage of the reference voltage generation circuit being supplied as a bias voltage and oscillating at a voltage less than the specified voltage value A triangular wave oscillation circuit that outputs the triangular wave signal to a PWM comparison circuit; a reference voltage determination circuit that determines whether a reference voltage generated by the reference voltage generation circuit has reached the specified voltage value; And a stop circuit for turning off the output transistor while the voltage determination circuit determines that the reference voltage does not satisfy the specified voltage value.

According to an eleventh aspect of the present invention, in the control circuit of the DC-DC converter according to the tenth aspect, the stop circuit includes a short-circuit transistor connected between an output terminal of the error amplifier circuit and ground. Have.

According to a twelfth aspect of the present invention, in the control circuit of the DC-DC converter according to the tenth aspect, the stop circuit includes a short-circuit transistor for cutting off the supply of drive power to the error amplifier circuit. .

According to a thirteenth aspect of the present invention, in the control circuit for a DC-DC converter according to the tenth aspect, the reference voltage is a first reference voltage for controlling the detected voltage to the specified voltage value. A second reference voltage whose voltage value changes with time toward the first reference voltage, wherein a reference voltage input terminal of the error amplifier circuit has a first reference voltage input terminal for inputting the first reference voltage; And a second reference voltage input terminal for inputting the second reference voltage.

According to a fourteenth aspect of the present invention, there is provided a smoothing circuit comprising an output coil and a capacitor; an output transistor which is turned on / off to generate an output voltage at an output terminal via the smoothing circuit; Voltage input terminal for inputting an output voltage generated based on the on / off operation of the device as a voltage to be detected, and a first reference for inputting a first reference voltage for controlling the voltage to be detected to a specified voltage value A voltage input terminal; and a second reference voltage input terminal for inputting a second reference voltage whose voltage value changes with time toward the first reference voltage, wherein the second reference voltage changes with time. During the period, the second reference voltage is compared with the output voltage, the difference voltage is amplified and output as an error output signal. When the second reference voltage stops changing with time, the second reference voltage is compared with the first reference voltage. Output voltage and An error amplifier circuit for comparing and amplifying the difference voltage and outputting the error voltage as an error output signal; a first reference voltage generating circuit for generating the first reference voltage; A second reference voltage generating circuit for generating a second reference voltage whose voltage value changes with time; and a reference voltage of the first reference voltage generating circuit being supplied as a bias voltage and oscillating at a voltage lower than the specified voltage value. A triangular wave oscillating circuit for outputting a triangular wave signal, comparing the magnitude of the triangular wave signal with the error output signal, and turning on / off the output transistor to bring the detected voltage closer to the first and second reference voltages. And a PWM comparison circuit for generating a control signal of
The C-DC converter further includes a holding circuit for holding the output transistor in an off state until the triangular wave oscillation circuit starts oscillating.

According to a fifteenth aspect of the present invention, in the DC-DC converter according to the fourteenth aspect, the holding circuit is connected between at least one output terminal of the error amplifier circuit and the PWM comparator circuit and a ground. A short-circuit transistor connected thereto, a soft-start transistor connected between a second reference voltage input terminal of the error amplifier circuit and ground, and a first reference voltage generated by the first reference voltage generation circuit. Input as a voltage, until the triangular wave oscillation circuit starts oscillating operation, turn on the short-circuit and soft-start transistor,
After the triangular wave oscillation circuit starts the oscillating operation, an initial malfunction prevention circuit for generating a release signal for turning off the short-circuit and soft-start transistors is provided.

According to a sixteenth aspect of the present invention, in the DC-DC converter according to the fourteenth aspect, in the holding circuit, the first reference voltage generated by the first reference voltage generation circuit has reached the specified voltage value. A reference voltage determination circuit for determining whether or not the output transistor is turned off while the first reference voltage determination circuit determines that the first reference voltage does not satisfy a specified voltage value. And a circuit.

According to a seventeenth aspect of the present invention, there is provided a reference voltage input terminal for inputting a reference voltage for maintaining a specified voltage value after a change over time toward a specified voltage value, and an on / off operation of an output transistor. A detected voltage input terminal for inputting an output voltage generated based on the detected voltage as a detected voltage, an error amplifier circuit that compares the reference voltage and the detected voltage, amplifies the difference voltage thereof, and outputs the amplified voltage as an error output signal; Comparing the magnitude of the triangular wave signal output from the triangular wave oscillation circuit with the error output signal and turning on the output transistor.
A control signal for generating a control signal for turning off the detected voltage to approach the reference voltage and outputting the control signal to the output transistor;
DC- having a plurality of control circuits including a WM comparison circuit
The DC converter further includes a holding circuit for holding the output transistors in an off state until all output control signals for driving and controlling the corresponding output transistors for the respective control circuits are output.

According to an eighteenth aspect of the present invention, in the DC-DC converter control circuit according to the seventeenth aspect, the holding circuit includes at least one of an output terminal of the error amplifying circuit and the PWM comparison circuit and a ground. A transistor for soft start connected between a reference voltage input terminal of the error amplifier circuit and the ground, and an output for each control circuit provided in one of the control circuits. A determination circuit configured to determine whether all control signals have been output and to control the short-circuit and soft-start transistors based on the determination result;

According to a nineteenth aspect of the present invention, there is provided an electronic apparatus including the DC-DC converter according to any one of the fourteenth to eighteenth aspects. (Operation) According to the first aspect of the present invention, the output transistor is kept off until the triangular wave oscillation circuit starts oscillating, and the control by the error amplifier circuit and the PWM comparison circuit is stopped. Therefore, the DC-DC converter can reliably execute the soft start, and can supply a stable output voltage.

According to the second aspect of the present invention, in addition to the operation of the first aspect, the error amplifier circuit compares the second reference voltage with the detected voltage to output an error output signal for performing a soft start. And compares the first reference voltage with the detected voltage to output an error output signal for causing the detected voltage to have a specified voltage value.

According to the third aspect of the present invention, the second reference voltage input terminal of the error amplifier circuit is grounded until the triangular wave oscillation circuit starts oscillating operation. It is done after starting. Similarly, the output terminal of at least one of the error amplification circuit and the PWM comparison circuit is grounded until the triangular wave oscillation circuit starts oscillating, so that the error output signal of the error amplification circuit or the control signal of the PWM comparison circuit is Will be lost. Therefore, the DC-DC converter can reliably execute the soft start, and can supply a stable output voltage.

According to the fourth aspect of the present invention, the holding circuit holds the output transistor in the off state until the triangular wave oscillation circuit starts oscillating operation.
The control of the output transistor by the comparison circuit is stopped.
Therefore, the DC-DC converter can reliably execute the soft start, and can supply a stable output voltage.

According to the fifth aspect of the present invention, the soft start transistor is turned on until the triangular wave oscillation circuit starts the oscillating operation, so that the soft start is performed after the triangular wave oscillating circuit starts the oscillating operation. Similarly,
The shorting transistor is turned on until the triangular wave oscillation circuit starts oscillating, and the error output signal of the error amplifier circuit or the control signal of the PWM comparison circuit disappears. Therefore, the DC-DC converter can reliably execute the soft start, and can supply a stable output voltage.

According to the invention of claim 6, the initial malfunction prevention circuit controls the short-circuit and soft-start transistors based on the release signal. Therefore, the soft start is performed after the triangular wave oscillation circuit starts the oscillating operation, and the error output signal of the error amplifier circuit or the control signal of the PWM comparison circuit is lost until the triangular wave oscillating circuit starts the oscillating operation. As a result, the DC-DC converter can reliably execute the soft start, and can supply a stable output voltage.

According to the invention of claim 7, the triangular wave oscillation circuit is formed as a part of the control circuit. The soft start is performed after the triangular wave oscillating circuit starts the oscillating operation, and the error output signal of the error amplifier circuit or the PWM comparison circuit is used until the triangular wave oscillating circuit starts the oscillating operation. Are lost.
Therefore, the DC-DC converter can reliably execute the soft start, and can supply a stable output voltage.

According to the present invention, the reference voltage generation circuit is formed as a part of the control circuit. The soft start is performed after the triangular wave oscillating circuit starts the oscillating operation, and the error output signal of the error amplifier circuit or the PWM comparison circuit is used until the triangular wave oscillating circuit starts the oscillating operation. Are lost. Therefore, the DC-DC converter can reliably execute the soft start, and can supply a stable output voltage.

According to the ninth aspect of the present invention, the initial malfunction prevention circuit controls the short-circuit and soft-start transistors based on the release signal. Therefore, the soft start is performed after the triangular wave oscillation circuit starts the oscillating operation, and the error output signal of the error amplifier circuit or the control signal of the PWM comparison circuit is lost until the triangular wave oscillating circuit starts the oscillating operation. As a result, the DC-DC converter can reliably execute the soft start, and can supply a stable output voltage.

According to the tenth aspect, while the reference voltage generated by the reference voltage generation circuit is determined not to have reached the specified voltage value, the output transistor is controlled to the off state by the stop circuit. ing. Therefore, the DC-DC converter can reliably execute the soft start,
A stable output voltage can be supplied.

According to the eleventh and twelfth aspects of the present invention, while the reference voltage generated by the reference voltage generation circuit is determined not to have reached the specified voltage value, the error output of the error amplification circuit is determined by the shoot transistor. The signal is lost and the output transistor is controlled to the off state. Therefore, D
The C-DC converter can reliably execute soft start, and can supply a stable output voltage.

According to the thirteenth aspect of the present invention, the error amplifier circuit compares the second reference voltage with the detected voltage and outputs an error output signal for performing a soft start, and outputs the first reference voltage and the detected voltage. An error output signal for making the detected voltage equal to the specified voltage value is output by comparison.

According to the fourteenth aspect of the present invention, the holding circuit holds the output transistor in the off state until the triangular wave oscillation circuit starts the oscillating operation.
The control of the output transistor by the M comparison circuit is stopped. Therefore, the DC-DC converter can reliably execute the soft start, and can supply a stable output voltage.

According to the fifteenth aspect, the initial malfunction prevention circuit controls the short-circuit and soft-start transistors based on the release signal. Therefore, the soft start is performed after the triangular wave oscillation circuit starts the oscillating operation, and the error output signal of the error amplifier circuit or the control signal of the PWM comparison circuit is lost until the triangular wave oscillating circuit starts the oscillating operation. As a result, the DC-DC converter can reliably execute the soft start, and can supply a stable output voltage.

According to the sixteenth aspect, while the first reference voltage generated by the reference voltage generation circuit is determined not to reach the specified voltage value, the output transistor is turned off by the stop circuit. Is controlled. Therefore, DC-DC
The converter can reliably execute soft start, and can supply a stable output voltage.

According to the seventeenth aspect, the holding circuit holds the output transistors in the off state until all the output control signals for driving and controlling the corresponding output transistors for each control circuit are output. From that
The control by the error amplifier circuit and the PWM comparison circuit is stopped. Therefore, it is possible to control a stable output voltage input timing for a plurality of semiconductor integrated circuit devices, and to prevent a malfunction with each semiconductor integrated circuit device due to a shift in the input timing.

According to the eighteenth aspect of the present invention, the determination circuit controls the short-circuit and soft-start transistors based on the output control signal for each control circuit. Therefore, the soft start is performed after all the output control signals are output, and the error output signal of the error amplifier circuit or the control signal of the PWM comparison circuit disappears before the output control signal is output. Therefore, it is possible to control a stable output voltage input timing for a plurality of semiconductor integrated circuit devices, and to prevent a malfunction with each semiconductor integrated circuit device due to a shift in the input timing.

According to the nineteenth aspect of the present invention, the DC-DC converter reliably executes the soft start from the C-DC converter and supplies a stable output voltage to each semiconductor integrated circuit device. An output voltage can be supplied to the device at an optimal closing timing.

[0074]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) FIG. 1 shows a DC-DC converter according to a first embodiment of the present invention. In the present embodiment, FIG.
Was applied to the conventional DC-DC converter shown in FIG.
Therefore, the same components as those of the conventional example are denoted by the same reference numerals, and description thereof will be omitted.

The feature of this embodiment is as shown in FIG.
A short-circuit transistor 31 composed of a bipolar transistor is newly connected between the output terminal of the error amplifier circuit 15 and the ground GND. More specifically, the collector of the shorting transistor 31 is connected to the output terminal of the error amplifier circuit 15, and the emitter is connected to the ground GND. The release signal SG3 from the initial malfunction prevention circuit 12 is input to the base of the shorting transistor 31. Accordingly, the shorting transistor 31 outputs the release signal S
It turns on when G3 is at H level and turns off when it is at L level.

In the present embodiment, the timing at which the release signal SG3 of the initial malfunction prevention circuit 12 falls from the H level to the L level is delayed as compared with the conventional case. That is, the initial malfunction prevention circuit 12 is adjusted so that the release signal SG3 falls from the H level to the L level after the triangular wave oscillation circuit 13 starts the normal oscillation operation.

The initial malfunction prevention circuit 12 has a reference voltage Vr
ef is input as a bias voltage and the specified voltage value Vre
When the reference voltage Vref that is rising toward f1 reaches a predetermined voltage value Vref2, it is determined that the reference voltage Vref has reached the operable bias voltage of the prevention circuit 12, and the reference voltage Vref is changed from H level to L level.
A release signal SG3 falling to the level is output. In the present embodiment, the reference voltage Vref supplied to the initial malfunction prevention circuit 12 is divided by a voltage dividing circuit provided in the prevention circuit 12, and the divided voltage is used as a bias voltage. When the divided voltage reaches a bias voltage (= Vref2) at which the prevention circuit 12 can operate, a release signal SG3 that falls from the H level to the L level.
Has been generated. That is, the time required to reach the operable bias voltage of the prevention circuit 12 is increased by the divided voltage of the reference voltage Verf, and the timing at which the release signal SG3 falls from the H level to the L level is delayed as compared with the conventional case. I have.

In this embodiment, the divided voltage is a bias voltage (= Vref2) at which the initial malfunction prevention circuit 12 can operate.
The reference voltage Vref (= Vref2a) when
Is a voltage value V at which the triangular wave oscillation circuit 13 oscillates.
It is set to be higher than ref3. Therefore, after the triangular wave oscillation circuit 13 starts oscillating, the release signal S
G3 falls from the H level to the L level.

In this embodiment, a holding circuit is constituted by the shorting transistor 31 and the initial malfunction prevention circuit 12. Next, the DC-DC configured as described above
The operation of the converter 1 will be described.

When the drive power supply voltage Vcc is supplied to each of the circuits 11 to 13, 15, 17, and 18 in the control circuit 2, an L-level control signal SG2 is supplied to the reference voltage generation circuit 11 from an external device. When the level is at the level, the DC-DC converter 1 stops operating.

Therefore, the reference voltage Vref of the reference voltage generation circuit 11 is 0 volt. As a result, the error amplification circuit 1
5. The PWM comparison circuit 17 and the output circuit 18 stop operating. Further, the operation of the triangular wave oscillation circuit 13 and the dead time circuit 14 is also stopped.

Further, the initial malfunction prevention circuit 12 is supplied with a reference voltage Vref of 0 volt. Accordingly, the release signal SG3 is at the H level, and the first and second transistors 19 and 20 and the shorting transistor 31 are in the ON state. As a result, the error output signal SG6 of the error amplifier circuit 15 and the charging voltage Vsof of the capacitor 22 become zero.
It is a bolt. Further, the duty control signal SG7 of the PWM comparison circuit 17 is also at 0 volt, that is, at the L level. Further, the output signal SG1 of the output circuit 18 also becomes L level.
Therefore, the output transistor 3 is off, and the output voltage Vout is 0 volt.

When an H-level control signal SG2 is supplied from the external device to the reference voltage generation circuit 11 at time t0 in FIG. 2, the DC-DC converter 1 starts operating.
In response to the H-level control signal SG2, the reference voltage generation circuit 11 generates a reference voltage Vref based on the drive power supply voltage Vcc. At this time, as shown in FIG. 2, the reference voltage Vref has a predetermined voltage value Vre with a constant slope.
It rises to f1. Reference voltage V gradually increasing
ref is the initial malfunction prevention circuit 12, the triangular wave oscillation circuit 1
3, the dead time circuit 14, the first non-inverting input terminal of the error amplifier circuit 15, and the constant current circuit 16. At this time, the initial malfunction prevention circuit 12 sets the release signal SG3 to H since the bias voltage has not reached the operable voltage.
Remains at the level.

Further, based on the rising reference voltage Vref, the error amplification circuit 15, the PWM comparison circuit 17, and the output circuit 1
8 shifts to an operable state. At this time, the error amplification circuit 15
Is supplied to the second non-inverting input terminal, the error output signal SG6 of the error amplifying circuit 15 tries to increase at the same voltage value of the rising reference voltage Vref. Since the transistor 31 is on, the voltage is kept at 0 volt. In addition, the dead time circuit 14 is supplied with the limit signal SG5 relative to the rising reference voltage Vref to the PWM comparison circuit 17.

Therefore, the PWM comparison circuit 17 outputs the error output signal SG6 held at 0 volt to the triangular wave oscillation circuit 13
Is compared with the triangular wave signal SG4. At this time, the triangular wave oscillation circuit 13 has not started oscillating yet, and the triangular wave signal SG
4 is 0 volts. As a result, the PWM comparison circuit 17 outputs the L level duty control signal SG7. Moreover, since the second transistor 20 is in the ON state, the duty control signal SG7 is reliably held at the L level.
Therefore, the output signal SG1 of the output circuit 18 still maintains the L level, so that the output transistor 3 remains off.

The triangular wave oscillation circuit 13 starts oscillating, and outputs a triangular wave signal SG4 to the PWM comparison circuit 17.
That is, the level of the triangular wave signal SG4 crosses the level of the limit signal SG5. However, since the shorting transistor 31 is still in the ON state, the error output signal SG6 is maintained at 0 volt. Therefore, the PWM comparison circuit 17 outputs the duty control signal SG7 which is still at the L level.

At time t1a, the release signal SG3 of the initial malfunction prevention circuit 12 falls to L level.
The first and second transistors 19 and 20 and the shorting transistor 31 are turned off. The capacitor 22 starts charging and supplies the charging voltage Vsof to the second non-inverting input terminal of the error amplifier circuit 15. Since the charging voltage Vsof is lower than the reference voltage Vref, the error amplification circuit 15
Compares the output voltage Vout at that time with the charging voltage Vsof, amplifies the difference voltage, and outputs the amplified difference voltage to the PWM comparison circuit 17 as an error output signal SG6. Time t
After 1a, since the charging voltage Vsof gradually increases, the output voltage SG6 of the error amplifier circuit 15 is changed to the triangular wave signal SG4 in order to make the output voltage Vout follow this.
Rise to a level within the amplitude range of.

Therefore, the output voltage SG6 becomes the triangular wave signal SG.
The duty control signal SG7 of the PWM comparison circuit 17 is at the L level until it enters the amplitude range of 4 and first crosses. Therefore, the output transistor 3 remains off.

When the error output signal SG6 reaches the amplitude range of the triangular wave signal SG4, the PWM comparison circuit 17
Is a duty control signal SG7 which becomes H level when the error output signal SG6 is larger than the triangular wave signal SG4, and becomes L level when the error output signal SG6 is smaller than the triangular wave signal SG4.
Is output.

Thereafter, the DC-DC converter 1 controls the soft start, that is, the output voltage Vout so as to become the rising charging voltage Vsof. When the charging voltage Vsof reaches the specified voltage value Vref1,
The DC-DC converter 1 controls the output voltage Vout to maintain the reference voltage Vref, that is, the specified voltage value Vref1.

Next, the features of the DC-DC converter according to the first embodiment configured as described above will be described below. (1) In this embodiment, the short-circuit transistor 31 is connected between the output terminal of the error amplifier circuit 15 and the ground GND. Then, the short-circuit transistor 31 is switched from the initial malfunction prevention circuit 12 to the L-level release signal SG3.
Is output, that is, until the triangular wave oscillation circuit 13 starts oscillating, the error output signal SG6 of the error amplification circuit 15 is kept at 0 volt.

That is, at the time of soft start, PW
The M comparing circuit 17 compares the triangular wave signal SG3 of the triangular wave oscillating circuit 13 that has normally started the oscillation operation and the error output signal SG6 of the error amplifying circuit 15 (the charging voltage Vsof and the output voltage Vout are compared in a normal state, and The duty control signal S based on the amplified error output signal SG6)
G7 can be generated. As a result, the release signal SG3 of the initial malfunction prevention circuit 12 is set to the L level before the triangular wave oscillation circuit 13 performs the oscillation operation as in the related art.
The output transistor 3 is turned on based on the comparison result of the PWM comparison circuit 17, and no overcurrent is temporarily caused to flow to the output transistor 3. Therefore, the output transistor 3 does not deteriorate.

(2) In this embodiment, as soon as the release signal SG3 of the initial malfunction prevention circuit 12 becomes L level as in the conventional case, the charging output voltage Vout and the output voltage Vout at that time are immediately changed.
Voltage control based on out, that is, soft start is executed. Therefore, since a stable output voltage Vout is supplied to each semiconductor integrated circuit device as an operation power supply, malfunctions with each semiconductor integrated circuit device upon turning on the operation power supply are reduced.

(3) In this embodiment, the error output signal SG6 of the error amplifier circuit 15 is
Since the voltage is held at 0 volts at 1, the problem that the indeterminate input is input to the PWM comparison circuit 17 and the duty control signal SG7 at the H level is output as in the related art is solved.

In this embodiment, the shorting transistor 31 is connected between the output terminal of the error amplifier circuit 15 and the ground GND.
1, the release signal SG of the initial malfunction prevention circuit 12 of the first embodiment in which the triangular wave oscillation circuit 13 starts the oscillation operation.
3 may be output to the first and second transistors 19 and 20. In this case, the error amplification circuit 15 outputs the error output signal SG6 corresponding to the reference voltage Vref until the L-level release signal SG3 is output, but the first and second transistors 20 output the triangular wave oscillation circuit 1
3 does not turn on until the oscillation operation starts. Therefore, the first
Also, when the second transistor 20 is turned on, the triangular wave signal SG4 has already been oscillating at a substantially normal value, so that the error output signal SG6 of the error amplifier circuit 15 reaches the amplitude range of the triangular wave signal SG3 in a very short time. Therefore, the soft start can be executed in a short time without the output transistor 3 being kept on as compared with the related art.

(Second Embodiment) FIG. 3 shows a DC-DC converter according to a second embodiment of the present invention. This embodiment is applied to the conventional DC-DC converter shown in FIG. Therefore, the same components as those of the conventional example are denoted by the same reference numerals, and description thereof will be omitted.

The feature of this embodiment is as shown in FIG.
Between the output terminal of the error amplification circuit 15 and the ground GND, a short-circuit transistor 41 composed of a bipolar transistor constituting a stop circuit was connected. More specifically, the collector of the shorting transistor 41 is connected to the output terminal of the error amplifier circuit 15, and the emitter is connected to the ground G.
Connected to ND. The base of the shorting transistor 41 is connected to the second release signal S from the reference voltage determination circuit 42.
G3a is input. The base of the first transistor 19 is provided with a release signal SG from the initial malfunction prevention circuit 12.
3, the second release signal SG3a is supplied. Therefore, the shorting transistor 41 and the first transistor 19 are turned on when the second release signal SG3a is at the H level, and turned off when the second release signal SG3a is at the L level.

The reference voltage judging circuit 42 is composed of a comparator, and is supplied with the driving voltage Vcc from the power supply circuit 102. When the reference voltage Verf generated by the reference voltage generation circuit 11 reaches the specified voltage value Verf1, the reference voltage determination circuit outputs a second release signal SG3a from H level to L level. That is, after the triangular wave oscillation circuit 13 starts the oscillating operation, the reference voltage determination circuit 42 outputs the second release signal SG from the H level to the L level.
3a is output. More specifically, as described above, the triangular wave oscillation circuit 13 inputs the reference voltage Vref as a bias voltage, and the reference voltage Vref is set to the specified voltage value Vref.
This is because the oscillation operation is started before reaching 1 and after the conventional initial malfunction prevention circuit 12 shown in FIG. 8 outputs the L level release signal SG3.
Accordingly, the short-circuit transistor 41 and the first transistor 19 have the reference voltage Verf set to the specified voltage value Verf.
1 (before the triangular wave oscillation circuit 13 starts the oscillating operation), and turns off when the reference voltage Verf reaches the specified voltage value Verf1 (after the triangular wave oscillating circuit starts the oscillating operation).

The second transistor 20 is provided with a release signal SG3 from the conventional initial malfunction prevention circuit 12 shown in FIG.
Enter Therefore, in the second embodiment, the timing at which the release signal SG3 of the initial malfunction prevention circuit 12 falls from the H level to the L level is earlier than in the first embodiment. That is, the release signal SG3 falls from the H level to the L level before the triangular wave oscillation circuit 13 starts a normal oscillation operation.

Next, the operation of the DC-DC converter 1 configured as described above will be described. Now, the drive power supply voltage Vcc is applied to each of the circuits 11 to 13, 15, 1 in the control circuit 2.
7, 1842, the reference voltage generation circuit 1
1, when the control signal SG2 at the L level from the external device is at the L level, the DC-DC converter 1 stops operating. Therefore, the reference voltage Vr of the reference voltage generation circuit 11
ef is 0 volt. As a result, the error amplifier circuit 15,
The operation of the PWM comparison circuit 17 and the output circuit 18 is stopped. Further, the triangular wave oscillation circuit 13 and the dead time circuit 1
4 also stops operating.

Further, the initial malfunction prevention circuit 12 and the voltage judgment circuit 42 are supplied with a reference voltage Vref of 0 volt. Therefore, the release signal SG3 and the second release signal SG
3a is at the H level, and the first and second transistors 19 and 20 and the shorting transistor 41 are on. As a result, the error output signal S of the error amplifier 15
The charging voltage Vsof of G6 and the capacitor 22 is 0 volt. Further, the duty control signal SG7 of the PWM comparison circuit 17 is also at 0 volt, that is, at the L level. Further, the output signal SG1 of the output circuit 18 also becomes L level. Therefore,
The output transistor 3 is off, and the output voltage Vou
t is 0 volt.

When the H-level control signal SG2 is supplied from the external device to the reference voltage generation circuit 11 at time t0 in FIG. 4, the DC-DC converter 1 starts operating.
In response to the H-level control signal SG2, the reference voltage generation circuit 11 generates a reference voltage Vref based on the drive power supply voltage Vcc. At this time, as shown in FIG. 4, the reference voltage Vref has a predetermined slope with a predetermined slope.
It rises to f1. Reference voltage V gradually increasing
ref is the initial malfunction prevention circuit 12, the triangular wave oscillation circuit 1
3. Dead time circuit 14, first non-inverting input terminal of error amplifier circuit 15, constant current circuit 16, reference voltage determination circuit 42
Supplied to At this time, since the initial malfunction prevention circuit 12 does not reach the operable voltage of the bias voltage, the release signal SG3 remains at the H level.

Further, based on the rising reference voltage Vref, the error amplification circuit 15, the PWM comparison circuit 17, and the output circuit 1
8 shifts to an operable state. At this time, the error amplification circuit 15
Is supplied to the second non-inverting input terminal, the error output signal SG6 of the error amplifying circuit 15 tries to increase at the same voltage value of the rising reference voltage Vref. Since the transistor 41 is on, the voltage is kept at 0 volt. In addition, the dead time circuit 14 is supplied with the limit signal SG5 relative to the rising reference voltage Vref to the PWM comparison circuit 17.

Therefore, the PWM comparison circuit 17 outputs the error output signal SG6 held at 0 volt to the triangular wave oscillation circuit 13
Is compared with the triangular wave signal SG4. At this time, the triangular wave oscillation circuit 13 has not started oscillating yet, and the triangular wave signal SG
4 is 0 volts. As a result, the PWM comparison circuit 17 outputs the L level duty control signal SG7. Moreover, since the second transistor 20 is in the ON state, the duty control signal SG7 is reliably held at the L level.
Therefore, the output signal SG1 of the output circuit 18 still maintains the L level, so that the output transistor 3 remains off.

When the reference voltage Vref reaches a bias voltage at which the operation of the initial malfunction prevention circuit 12 is enabled, the initial malfunction prevention circuit 12 releases the low-level release signal S.
G3 is output. The second transistor 20 turns on in response to the L-level release signal SG3. At this time, PWM
The comparison circuit 17 outputs the L level duty control signal SG7 because the triangular wave oscillation circuit 13 has not started the oscillation operation yet and the error output signal SG6 is held at 0 volt.

Eventually, the triangular wave oscillating circuit 13 starts oscillating and outputs the triangular wave signal SG4 to the PWM comparing circuit 17.
That is, the level of the triangular wave signal SG4 crosses the level of the limit signal SG5. However, since the shorting transistor 41 is still in the ON state, the error output signal SG6 is maintained at 0 volt. Therefore, the PWM comparison circuit 17 outputs the duty control signal SG7 which is still at the L level.

Then, at time t2, the reference voltage Ve
When the time t2 at which rf reaches the specified voltage value Vref1 is reached, the reference voltage determination circuit 42 lowers the second release signal SG3 to L level. The first transistor 19 and the shorting transistor 41 are turned off. Capacitor 22
Starts charging and supplies the charging voltage Vsof to the error amplifier 1
5 to the second non-inverting input terminal. This charging voltage Vs
of is lower than the reference voltage Vref, the error amplification circuit 15 outputs the output voltage Vout and the charging voltage Vsof at that time.
, And amplifies the difference voltage, and outputs the amplified difference voltage as an error output signal SG6 to the PWM comparison circuit 17.
After the time t2, the charging voltage Vsof gradually increases, so that the error output signal SG6 of the error amplifying circuit 15 reaches a level that falls within the amplitude range of the triangular wave signal SG4 so that the output voltage Vout follows the charging voltage Vsof. Going up.

Therefore, the output voltage SG6 becomes the triangular wave signal SG.
The duty control signal SG7 of the PWM comparison circuit 17 is at a level until it first enters the amplitude range of 4 and intersects. Therefore, the output transistor 3 remains off.

When the error output signal SG6 reaches the amplitude range of the triangular wave signal SG4, the PWM comparison circuit 17
Is a duty control signal SG7 which becomes H level when the error output signal SG6 is larger than the triangular wave signal SG4, and becomes L level when the error output signal SG6 is smaller than the triangular wave signal SG4.
Is output.

Thereafter, the DC-DC converter 1 controls the output voltage Vout so that the output voltage Vout becomes the rising charging voltage Vsof. When the charging voltage sof reaches the specified voltage value Vref1, the DC-DC converter 1
Controls the output voltage Vout to maintain the reference voltage Vref, that is, the specified voltage value Vref1.

Next, the features of the DC-DC converter according to the second embodiment configured as described above will be described below. (1) In the present embodiment, the short-circuit transistor 41 is connected between the output terminal of the error amplifier circuit 15 and the ground GND. Further, a reference voltage determination circuit 42 for determining whether the reference voltage Vref generated by the reference voltage generation circuit 11 has become the specified voltage Verf1 is provided. Then, the short-circuit transistor 41 is turned on until the L-level second release signal SG3 is output from the reference voltage determination circuit 42, that is, until the triangular wave oscillation circuit 13 starts oscillating operation, and the error amplification circuit 15 The error output signal SG6 was kept at 0 volt.

That is, at the time of soft start, PW
The M comparing circuit 17 compares the triangular wave signal SG3 of the triangular wave oscillating circuit 13 that has started the oscillation operation normally and the error output signal SG6 of the error amplifying circuit 15 (the charging voltage Vsof and the output voltage Vout are compared in a normal state, and And an error output signal SG6) obtained by amplifying the duty control signal SG6), the duty control signal SG7 can be generated. As a result, as before, before the triangular wave oscillation circuit 13 performs the oscillation operation, the PWM
The output transistor 3 based on the comparison result of the comparison circuit 17
Is turned on to temporarily prevent an overcurrent from flowing to the output transistor 3. Therefore, the output transistor 3 does not deteriorate.

(2) In the present embodiment, as soon as the second release signal SG3a of the reference voltage determination circuit 42 goes to L level, the charging output voltage Vout and the output voltage Vout at that time.
Is performed, that is, soft start is executed.
Therefore, since a stable output voltage Vout is supplied to each semiconductor integrated circuit device as an operation power supply, malfunctions with each semiconductor integrated circuit device upon turning on the operation power supply are reduced.

(3) In this embodiment, the error output signal SG6 of the error amplifier circuit 15 is
Since the voltage is held at 0 volts at 1, the problem that the indeterminate input is input to the PWM comparison circuit 17 and the duty control signal SG7 at the H level is output as in the related art is solved.

In this embodiment, the short-circuit transistor 41 is connected between the output terminal of the error amplifier circuit 15 and the ground GND. However, the short-circuit transistor 41 may be omitted and the embodiment may be implemented as shown in FIG. That is, in FIG. 5, the error amplifier circuit 15 supplies the drive power supply voltage V
cc is supplied. Then, the reference voltage Vref is supplied to the driving transistor 44. The base of the driving transistor 44 and the ground G
A short-circuit transistor 45 constituting a stop circuit is connected to the ND. The second release signal SG3a of the reference voltage determination circuit 42 is input to the base of the shorting transistor 45.

Therefore, the drive power supply voltage Vcc is applied to the error amplifier circuit 15 until the second release signal SG3a of the reference voltage determination circuit 42 falls to the L level, that is, until the triangular wave oscillation circuit 13 starts oscillating. It will not be applied. Therefore, also in this case, the same operation and effect as in the second embodiment can be obtained. Third Embodiment FIG. 6 shows a DC-DC converter 1 according to a third embodiment of the present invention. DC of this embodiment
The -DC converter 1 includes two first and second DC-DC converter units 1A and 1B.

The first DC-DC converter section 1A is configured by modifying the control circuit 2 of the DC-DC converter 1 of the first embodiment shown in FIG. The control circuit 2A of the first DC-DC converter section 1A does not include the initial malfunction prevention circuit 12, but includes an external input terminal 51 for inputting the release signal SG3 instead. The release signal SG3 is supplied only to the base of the second transistor 20.

The control circuit 2A outputs an external output terminal 52 for outputting the reference voltage Verf generated by the reference voltage generation circuit 11 to the second DC-DC converter 1B, and a triangular wave signal SG4 generated by the triangular wave oscillation circuit 13. Second DC-
An external output terminal 53 for outputting to the DC converter unit 1B;
The limit signal SG5 generated by the dead time circuit 14 is
External output terminal 5 for outputting to DC-DC converter section 1B
4 is provided.

Further, the control circuit 2A includes an output control circuit 5
5 are provided. The output control circuit 55 is connected to a first external device (not shown) via an external output control input terminal 56.
The output control signal SG11 is input. The external device is the DC
-To output the first output control signal SG11 at H level when the DC converter 1A is to be activated. Control circuit 2A
Outputs the first output control signal SG11 to the external output terminal 57 as a first internal output control signal SG11a. The first internal output control signal SG11a is
Output to DC-DC converter section 1B.

Further, the control circuit 2A inputs the third release signal SG3b output from the second DC-DC converter section 1B from the external input terminal 58, and outputs the third release signal SG3b.
To the first transistor 19 and the shorting transistor 3
1 base.

On the other hand, the second DC-DC converter section 1B
Similarly, the DC-DC of the first embodiment shown in FIG.
The control circuit 2 of the converter 1 is modified.
The control circuit 2B of the second DC-DC converter section 1B does not include the reference signal generation circuit 11, the triangular wave oscillation circuit 13, and the dead time circuit 14, and instead includes the first D
External input terminals 61, 62, and 63 for inputting the reference voltage Vref, the triangular wave signal SG4, and the limit signal SG5 from the C-DC converter section 1A are provided.

The initial malfunction prevention circuit 12 formed in the control circuit 2B has an external output terminal 64 for outputting the release signal SG3 to the first DC-DC converter 1A. The release signal SG3 is supplied only to the base of the second transistor 20 in the control circuit 2B.

Further, the control circuit 2B includes an output control circuit 6
5 are provided. The output control circuit 65 is connected to a second external device (not shown) via an external output control input terminal 66.
The output control signal SG12 is input. The external device is the second device.
When the DC-DC converter 1B is to be activated, the second output control signal SG12 at H level is output. Control circuit 2
B outputs the second output control signal SG12 to the NAND circuit 68 as a second internal output control signal SG12a.

The NAND circuit 68 constituting the discriminating circuit is a NAND circuit having two input terminals. One input terminal receives the second internal output control signal SG12a, and the other input terminal receives an external signal provided in the control circuit 2B. 1D through input terminal 69
The control circuit 2A of the C-DC converter 1A sends the first
The internal output control signal SG11a is input. Therefore, the output signal of the NAND circuit 68 is the first internal output control signal SG1
When both the signal 1a and the second internal output control signal SG12a are at the H level, the signal goes to the L level. Otherwise, the signal goes to the H level. The output signal of the NAND circuit 58 is used as the third release signal SG3b as the first transistor 19 of the control circuit 2B.
And the base of the shorting transistor 31. The third release signal SG3b is output to the control circuit 2A of the first DC-DC converter 1A via the external output terminal 70 provided in the control circuit 2B.

In this embodiment, each control circuit 2
A holding circuit is constituted by the first transistor 19 and the shorting transistor 31 provided in A and 2B and the NAND circuit 68 provided in the control circuit 2B.

Next, the operation of the DC-DC converter 1 configured as described above will be described. As shown in FIG. 7, now, at time t0, the first DC-DC converter unit 1A
When an H-level control signal SG2 is supplied from an external device to the reference voltage generation circuit 11 of the control circuit 2A, the reference voltage generation circuit 11 starts generation of the reference voltage Vref, and Supply to the circuit. Similarly, the generated reference voltage Vref is supplied to each circuit of the control circuit 2B of the second DC-DC converter 1B.
As a result, the first and second DC-DC converter sections 1A, 1
B starts its operation.

At this time, since the initial malfunction prevention circuit 12 does not reach the operable voltage of the bias voltage, the release signal SG3 remains at the H level. Also, the first and second D
H from an external device is supplied to the C-DC converter units 1A and 1B.
The level first and second output control signals SG11 and SG12 are not input. Therefore, the third release signal SG3b is H
Remains at the level.

When the H-level output control signal SG11 is input to the first DC-DC converter section 1A prior to the second output control signal SG12, the NAND circuit 68 outputs the second output control signal SG12.
Since the output control signal SG12 is not at the H level, the third release signal SG3b remains at the H level. Therefore,
Each of the first and second DC-DC converter sections 1A, 1B
The transistor 19 and the shorting transistor 31 are both in the ON state.

When the reference voltage Vref reaches a bias voltage at which the operation of the initial malfunction prevention circuit 12 is enabled, the initial malfunction prevention circuit 12 releases the low-level release signal S.
G3 is output. The second transistor 20 turns on in response to the L-level release signal SG3. At this time, PWM
The comparison circuit 17 outputs the L level duty control signal SG7 because the triangular wave oscillation circuit 13 has not started the oscillation operation yet and the error output signal SG6 is held at 0 volt.

Eventually, the triangular wave oscillation circuit 13 starts oscillating, and outputs a triangular wave signal SG4 to the PWM comparison circuit 17.
That is, the level of the triangular wave signal SG4 crosses the level of the limit signal SG5. However, since the shorting transistor 31 is still in the ON state, the error output signal SG6 is maintained at 0 volt. Therefore, the PWM comparison circuit 17 outputs the duty control signal SG7 which is still at the L level.

After a while, at time t3 in FIG.
An H-level output control signal S is supplied to the C-DC converter 1B.
When G12 is input, the NAND circuit 68 changes the third release signal SG3b from H level to L level. Accordingly, the first transistor 19 and the shorting transistor 31 of the first and second DC-DC converter sections 1A and 1B are both turned off.

As a result, the soft start capacitors 22 of the first and second DC-DC converter sections 1A and 1B are provided.
Starts charging and supplies the charging voltage Vsof to the error amplifier 1
5 to the second non-inverting input terminal. This charging voltage Vs
of is lower than the reference voltage Vref, the error amplification circuit 15 outputs the output voltage Vout and the charging voltage Vsof at that time.
, And amplifies the difference voltage, and outputs the amplified difference voltage as an error output signal SG6 to the PWM comparison circuit 17.
After the time t3, the charging voltage Vsof gradually increases, so that the error output signal SG6 of the error amplifying circuit 15 reaches a level within the amplitude range of the triangular wave signal SG4 in order to make the output voltage Vout follow this. Going up.

Therefore, PW is maintained until the error output voltage SG6 falls within the amplitude range of the triangular wave signal SG4 and first intersects.
The duty control signal SG7 of the M comparison circuit 17 is at the level. Therefore, the output transistor 3 remains off.

Eventually, when the error output signal SG6 reaches the amplitude range of the triangular wave signal SG4, the PWM comparison circuit 17
Is a duty control signal SG7 which becomes H level when the error output signal SG6 is larger than the triangular wave signal SG4, and becomes L level when the error output signal SG6 is smaller than the triangular wave signal SG4.
Is output.

Thereafter, the first and second DC-DC converter sections 1A and 1B control the output voltage Vout so as to be the rising charging voltage Vsof. When the charging voltage sof reaches the specified voltage value Vref1, the first and second DC-DC converters 1A and 1B control the output voltages Vout to maintain the reference voltage Vref, that is, the specified voltage value Vref1. It is supplied to each corresponding semiconductor integrated circuit device 101.

Next, the features of the DC-DC converter 1 of the third embodiment configured as described above will be described below. (1) In the present embodiment, the second DC-DC converter unit 1
The NAND circuit 68 is provided in the B control circuit 2B. And
The NAND circuit 68 includes the first and second DC-DC converters 1.
A, 1B for the first and second output control signals SG11, SG12 (internal output control signal SG11, respectively).
a, SG12a), the respective short-circuit transistors 31 of the first and second DC-DC converter units 1A and 1B.
Were turned on at the same time.

That is, the first and second DC-DC converters 1A and 1B simultaneously supply the output voltages Vout generated to the corresponding semiconductor integrated circuit devices 101 at the same timing while simultaneously starting the soft start. be able to.

Therefore, since a stable output voltage Vout is simultaneously supplied to each semiconductor integrated circuit device as an operation power supply, malfunctions between the semiconductor integrated circuit devices and the semiconductor integrated circuit devices due to a shift in the operation power supply timing are eliminated. Will be. In particular, the first and second output control signals SG11, SG12
Are the same, and one of the DC-DC
This is particularly effective when the signal is input to the converter with a delay.

(2) Also in this embodiment, as in the prior art, before the triangular wave oscillation circuit 13 performs the oscillation operation, the PWM is performed.
The output transistor 3 based on the comparison result of the comparison circuit 17
Is not turned on, so that an overcurrent does not flow to the output transistor 3 temporarily. Therefore, the output transistor 3 does not deteriorate.

(3) Also in this embodiment, as soon as the third release signal SG3b becomes L level, the voltage control based on the charging output voltage Vout and the output voltage Vout at that time,
That is, a soft start is executed. Therefore, since a stable output voltage Vout is supplied to each semiconductor integrated circuit device as an operation power supply, malfunctions with each semiconductor integrated circuit device upon turning on the operation power supply are reduced.

(4) Also in this embodiment, the error output signal SG6 of the error amplifier circuit 15 is held at 0 volt by the shorting transistor 31, so that PW
The problem that the indeterminate input is input to the M comparison circuit 17 and the H level duty control signal SG7 is output is solved.

The embodiments of the present invention are not limited to the above embodiments, but may be implemented as follows. In the above embodiments, the error amplification circuit 15 is connected to the first non-inverting input terminal by the reference voltage Vr from the reference voltage generation circuit 11.
ef, and the specified voltage value Vre is input to the second non-inverting input terminal.
The charging voltage Vsof rising to f1 is input. This may be performed by omitting the first non-inverting input terminal. That is, the error amplifier circuit 15 includes an input terminal for inputting the charging voltage Vsof rising to the specified voltage value Vref1 of the reference voltage Vref, and an input terminal for inputting the output voltage Vout, and a difference voltage between the charging voltage Vsof and the output voltage Vout. And outputs an error output signal SG6.

In the above embodiments, the error amplification circuit 15
Although the output voltage Vout is directly input to the inverting input terminal of, the voltage divided by the voltage dividing circuit may be input. In this case, the control value of the output voltage Vout can be appropriately changed according to the voltage dividing ratio of the voltage dividing circuit.

In the above embodiments, the output transistor 3 is implemented by an N-channel MOS transistor.
It may be implemented by a channel MOS transistor. In this case, for example, in the output circuit 18, it is necessary to generate an output signal SG1 obtained by inverting the duty control signal SG7. Further, the output transistor 3 may be constituted by a bipolar transistor.

In the above embodiments, the output circuit 18 is provided, but this may be omitted. A short-circuit transistor is connected between the output terminal of the output circuit 18 described in each embodiment and the ground GND, and the release signal SG3, the second release signal SG3a, or the third release signal SG3b is input to the base of the transistor. You may implement in this way. Also in this case, the same effects as those of the above embodiments can be obtained. In addition, P described in the claim
The short-circuit transistor connected between the output terminal of the WM comparison circuit and the ground is a general concept including a short-circuit transistor between the output terminal of the output circuit 18 and the ground GND.

In the first embodiment, the first and second transistors 19 and 20 are replaced by the reference voltage judgment circuit 42 shown in the second embodiment instead of the initial malfunction prevention circuit 12.
Alternatively, the shorting transistor 31 may be controlled.

In the second embodiment and the modification of the second embodiment, the first transistor 19 and the short-circuiting circuit using the initial malfunction prevention circuit 12 shown in the first embodiment instead of the reference voltage determination circuit 42 are used. Transistors 41 and 45
May be controlled.

The waveform of the triangular wave oscillation signal SG4 of the triangular wave oscillation circuit 13 may be a sawtooth triangular wave signal. ○ Bipolar transistors 1 shown in each embodiment
9, 20, 31, 41, 44, and 45 may be implemented in place of MOS transistors.

In the above embodiments, the control circuit 2 formed on a one-chip semiconductor integrated circuit device includes a reference voltage generation circuit 11, an initial malfunction prevention circuit 12, a triangular wave oscillation circuit 1
3, the dead time circuit 14, the error amplification circuit 15, the constant current circuit 16, the PWM comparison circuit 17, the output circuit 18, the two first and second transistors 19 and 20, the shorting transistors 31 and 41, and the like. However, the control circuit 2 may be formed by appropriately forming the triangular wave oscillation circuit 13 on a plurality of semiconductor integrated circuit devices, such as forming the triangular wave oscillation circuit 13 on another semiconductor integrated circuit device, and electrically connecting them. Good.

[0150]

According to the invention described in claims 1 to 16,
The soft start in the DC-DC converter can be reliably executed, a stable output voltage can be supplied, and a malfunction between each semiconductor integrated circuit device can be prevented.

According to the seventeenth and eighteenth aspects of the present invention, it is possible to control the timing of applying a stable output voltage to a plurality of semiconductor integrated circuit devices, and to control the timing of each semiconductor integrated circuit device due to a shift in the application timing. Malfunction can be prevented.

According to the nineteenth aspect of the present invention, the DC-DC converter performs a soft start reliably for each semiconductor integrated circuit device to supply a stable output voltage, or provides an output to each semiconductor integrated circuit device. The voltage can be supplied at the optimal closing timing.

[Brief description of the drawings]

FIG. 1 is an electric circuit diagram of a DC-DC converter according to a first embodiment.

FIG. 2 is a waveform chart for explaining the operation of the DC-DC converter.

FIG. 3 is an electric circuit diagram of a DC-DC converter according to a second embodiment.

FIG. 4 is a waveform chart for explaining the operation of the DC-DC converter.

FIG. 5 is an electric circuit diagram of a DC-DC converter showing a modification of the second embodiment.

FIG. 6 is an electric circuit diagram of a DC-DC converter according to a third embodiment.

FIG. 7 is a waveform chart for explaining the operation of the DC-DC converter.

FIG. 8 is an electric circuit diagram of a conventional DC-DC converter.

FIG. 9 is a waveform chart for explaining the operation of a conventional DC-DC converter.

FIG. 10 is a block diagram illustrating an operation power supply system for an electronic device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 DC-DC converter 2, 2 A, 2 B control circuit 3 output transistor 4 output coil 7, 22 capacitor 11 reference voltage generation circuit, 12 initial malfunction prevention circuit 13 triangular wave oscillation circuit 15 error amplification circuit 16 constant current circuit 17 PWM comparison circuit 19 , 20 First and second transistors 22 Capacitors 31, 41, 45 Shorting transistor 100 Electronic device 101 Semiconductor integrated circuit device SG2 Control signal SG3 Release signal SG4 Triangular wave signal SG6 Error output signal SG7 Duty control signal Vout Output voltage Vref Reference voltage Vref1 Specified voltage value Vsof charging voltage

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Takashi Matsumoto 2-1844-2 Kozoji-cho, Kasugai-shi, Aichi Prefecture Inside Fujitsu VSI Co., Ltd. (72) Inventor Toshiyuki Matsuyama 2-1844-2 Kozoji-cho, Kasugai-shi, Aichi Fujitsu VLSI Corporation

Claims (19)

[Claims] 1. A reference voltage input terminal for inputting a reference voltage for maintaining a specified voltage value after a change over time toward a specified voltage value, and an output voltage generated based on an on / off operation of an output transistor. And a detected voltage input terminal for inputting the detected voltage as a detected voltage, an error amplifier circuit that compares the reference voltage and the detected voltage, amplifies a difference voltage between the input voltages, and outputs the amplified voltage as an error output signal. A PWM comparison circuit that compares the magnitude of the triangular wave signal with the error output signal, generates a control signal for turning on and off the output transistor to bring the detected voltage closer to the reference voltage, and outputs the control signal to the output transistor. In the method for driving a control circuit of a DC-DC converter, the output transistor is turned off until the triangular wave oscillation circuit starts oscillating. It was to be held in a state DC-
A method for driving a control circuit of a DC converter. 2. The method of driving a control circuit of a DC-DC converter according to claim 1, wherein the reference voltage is a first reference voltage for controlling the detected voltage to the specified voltage value, and A second reference voltage whose voltage value changes with time toward one reference voltage, wherein the reference voltage input terminal of the error amplifier circuit is a first reference voltage input terminal for inputting the first reference voltage; A second reference voltage input terminal for inputting the second reference voltage. 3. A detected voltage input terminal for inputting an output voltage generated based on an on / off operation of an output transistor as a detected voltage, and a first reference for controlling the detected voltage to a specified voltage value. A first reference voltage input terminal for inputting a voltage, and a second reference voltage input terminal for inputting a second reference voltage whose voltage value changes with time toward the first reference voltage, wherein the second reference voltage is While changing over time, the second reference voltage is compared with the output voltage, the difference voltage is amplified and output as an error output signal, and when the second reference voltage no longer changes over time, it is compared with the first reference voltage. An error amplifier circuit that compares the output voltage and amplifies the difference voltage and outputs the difference output signal as an error output signal; and compares the magnitude of the triangular wave signal output from the triangular wave oscillation circuit with the error output signal and turns on the output transistor. Off A PWM comparison circuit that generates a control signal for bringing the detected voltage closer to the first and second reference voltages and outputs the control signal to the output transistor. Until the oscillation circuit starts the oscillation operation, the second reference voltage input terminal of the error amplification circuit is grounded, and at least one output terminal of the error amplification circuit and the PWM comparison circuit is grounded. A method of driving a control circuit of a DC-DC converter, wherein after the start of the oscillating operation, the grounded second reference voltage input terminal and output terminal are released from the ground. 4. A reference voltage input terminal for inputting a reference voltage that keeps the specified voltage value after changing over time toward a specified voltage value, and an output voltage generated based on an on / off operation of an output transistor. And a detected voltage input terminal for inputting the detected voltage as a detected voltage, an error amplifier circuit that compares the reference voltage and the detected voltage, amplifies a difference voltage between the input voltages, and outputs the amplified voltage as an error output signal. A PWM comparison circuit that compares the magnitude of the triangular wave signal with the error output signal, generates a control signal for turning on and off the output transistor to bring the detected voltage closer to the reference voltage, and outputs the control signal to the output transistor. A control circuit for the DC-DC converter, comprising: DC-DC converter control circuit having a holding circuit for. 5. The control circuit for a DC-DC converter according to claim 4, wherein the holding circuit is connected between at least one output terminal of the error amplifier circuit and the PWM comparison circuit and a ground, A short-circuit transistor that is turned on until the triangular wave oscillation circuit starts oscillating operation, and is turned off after the triangular wave oscillation circuit starts oscillating operation, between the reference voltage input terminal of the error amplifier circuit and ground; And a soft-start transistor that is turned on until the triangular wave oscillation circuit starts oscillating, and is turned off after the triangular wave oscillating circuit starts oscillating. 6. The control circuit for a DC-DC converter according to claim 5, wherein said holding circuit circuit keeps said short-circuit and soft-start transistors on until said triangular wave oscillation circuit starts oscillating. After the triangular wave oscillation circuit starts oscillating, an initial malfunction prevention circuit for generating a release signal for turning off both transistors is provided. 7. The DC-DC converter control circuit according to claim 5, wherein the control circuit includes a triangular wave oscillation circuit that generates a triangular wave signal output to the PWM comparison circuit. 8. The control circuit for a DC-DC converter according to claim 5, wherein the control circuit includes a reference voltage generation circuit that generates the reference voltage. 9. A detected voltage input terminal for inputting an output voltage generated based on an on / off operation of an output transistor as a detected voltage, and a first reference for controlling the detected voltage to a specified voltage value. A first reference voltage input terminal for inputting a voltage, and a second reference voltage input terminal for inputting a second reference voltage whose voltage value changes with time toward the first reference voltage, wherein the second reference voltage is While changing with time, the second reference voltage is compared with the output voltage, the difference voltage is amplified and output as an error output signal, and the second reference voltage does not change with time. At the time, an error amplifier circuit that compares the first reference voltage with the output voltage, amplifies the difference voltage and outputs the error voltage as an error output signal, and compares the magnitude of the triangular wave signal output from the triangular wave oscillation circuit with the error output signal. , The output transition And a PWM comparison circuit for generating a control signal for turning on and off the detected voltage to approach the first and second reference voltages and outputting the control signal to the output transistor. A triangular wave oscillation circuit that generates the triangular wave signal; a reference voltage that generates the first and second reference voltages and supplies the first reference voltage to both circuits as a bias voltage of a triangular wave oscillation circuit and an error amplifier circuit A generating circuit; a short-circuit transistor connected between at least one output terminal of the error amplifier circuit and the PWM comparison circuit; and a ground; and a second reference voltage input terminal of the error amplifier circuit and ground. A connected soft start transistor and a first reference voltage generated by the reference voltage generation circuit are input as a bias voltage. Until the triangular wave oscillation circuit starts oscillating operation, the short-circuit and soft-start transistors are turned on, and after the triangular wave oscillation circuit starts oscillating operation, the short-circuit and soft-start transistor are turned off. A control circuit for a DC-DC converter, comprising: an initial malfunction prevention circuit that generates a release signal. 10. A reference voltage input terminal for inputting a reference voltage for maintaining a specified voltage value after changing over time toward a specified voltage value, and an output voltage generated based on an on / off operation of an output transistor. And a detected voltage input terminal for inputting the detected voltage as a detected voltage, an error amplifier circuit that compares the reference voltage and the detected voltage, amplifies a difference voltage between the input voltages, and outputs the amplified voltage as an error output signal. A PWM comparison circuit that compares the magnitude of the triangular wave signal with the error output signal, generates a control signal for turning on and off the output transistor to bring the detected voltage closer to the reference voltage, and outputs the control signal to the output transistor. A DC-DC converter control circuit comprising: a reference voltage generation circuit that generates the reference voltage; The triangular wave oscillating circuit that supplies the bias voltage and oscillates below the specified voltage value and outputs the triangular wave signal to a PWM comparison circuit; and whether the reference voltage generated by the reference voltage generation circuit has reached the specified voltage value A reference voltage determination circuit for determining whether or not the output transistor is turned off while the reference voltage determination circuit determines that the reference voltage is not at a specified voltage value. Control circuit for DC-DC converter. 11. The control circuit for a DC-DC converter according to claim 10, wherein said stop circuit includes a short-circuit transistor connected between an output terminal of said error amplifier circuit and ground. 12. The control circuit for a DC-DC converter according to claim 10, wherein the stop circuit includes a short-circuit transistor that cuts off a drive power supply to the error amplifier circuit. 13. The DC-DC converter control circuit according to claim 10, wherein the reference voltage is a first reference voltage for controlling the detected voltage to the specified voltage value, and the first reference voltage. A reference voltage input terminal of the error amplifier circuit, a first reference voltage input terminal for inputting the first reference voltage, and a second reference voltage input terminal for inputting the first reference voltage. A second reference voltage input terminal for inputting a reference voltage. 14. A smoothing circuit comprising an output coil and a capacitor, an output transistor which is turned on / off to generate an output voltage at an output terminal via the smoothing circuit, and based on an on / off operation of the output transistor. A detected voltage input terminal for inputting an output voltage generated as a detected voltage, a first reference voltage input terminal for inputting a first reference voltage for controlling the detected voltage to a specified voltage value,
A second reference voltage input terminal for inputting a second reference voltage whose voltage value changes with time toward the first reference voltage, wherein a second reference voltage is input while the second reference voltage changes with time; The voltage and the output voltage are compared and the difference voltage is amplified and output as an error output signal. When the second reference voltage does not change with time, the first reference voltage is compared with the output voltage. An error amplification circuit that amplifies the difference voltage and outputs the error voltage as an error output signal; a first reference voltage generation circuit that generates the first reference voltage; A second reference voltage generation circuit for generating a second reference voltage having a voltage value that changes with time; a reference voltage of the first reference voltage generation circuit being supplied as a bias voltage; Triangular wave oscillation circuit that outputs signals Compares the magnitude of the triangular wave signal and said error output signal,
A DC-DC converter comprising: a PWM comparison circuit that generates a control signal for turning on / off the output transistor to bring the detected voltage closer to the first and second reference voltages and outputs the control signal to the output transistor; A DC-DC converter comprising a holding circuit for holding the output transistor in an off state until the triangular wave oscillation circuit starts oscillating. 15. The DC-DC converter according to claim 14, wherein the holding circuit includes a short-circuit transistor connected between at least one output terminal of the error amplifier circuit and the PWM comparison circuit and a ground. A soft-start transistor connected between a second reference voltage input terminal of the error amplifier circuit and ground; and a first reference voltage generated by the first reference voltage generation circuit, as a bias voltage, Until the triangular wave oscillation circuit starts the oscillating operation, the short-circuit and soft-start transistor are turned on, and after the triangular wave oscillating circuit starts the oscillating operation, a release signal for turning off the short-circuit and soft-start transistor is output. And an initial malfunction prevention circuit for generating the malfunction. 16. The DC-DC converter according to claim 14, wherein the holding circuit determines whether a first reference voltage generated by the first reference voltage generation circuit has reached the specified voltage value. A reference voltage determination circuit; and a stop circuit that turns off the output transistor while the first reference voltage determination circuit determines that the first reference voltage does not satisfy a specified voltage value. . 17. A reference voltage input terminal for inputting a reference voltage for maintaining a specified voltage value after changing over time toward a specified voltage value, and an output voltage generated based on an on / off operation of an output transistor. And a detected voltage input terminal for inputting the detected voltage as a detected voltage, an error amplifier circuit that compares the reference voltage and the detected voltage, amplifies a difference voltage between the input voltages, and outputs the amplified voltage as an error output signal. A PWM comparison circuit that compares the magnitude of the triangular wave signal with the error output signal, generates a control signal for turning on and off the output transistor to bring the detected voltage closer to the reference voltage, and outputs the control signal to the output transistor. DC having a plurality of control circuits having
A DC converter comprising: a holding circuit for holding the output transistors in an off state until all output control signals for driving and controlling the corresponding output transistors for the respective control circuits are output. -DC converter. 18. The control circuit for a DC-DC converter according to claim 17, wherein the holding circuit is connected between at least one output terminal of the error amplifier circuit and the PWM comparison circuit and a ground. A short-circuit transistor, a soft-start transistor connected between a reference voltage input terminal of the error amplifier circuit and the ground, and one of the control circuits, provided that all output control signals for each control circuit have been output; And a determination circuit for controlling the short-circuit and soft-start transistors based on the determination result. 19. An electronic apparatus comprising the DC-DC converter according to claim 14.