JPH1174055A - Manufacture of electronic component - Google Patents

Manufacture of electronic component

Info

Publication number
JPH1174055A
JPH1174055A JP24595797A JP24595797A JPH1174055A JP H1174055 A JPH1174055 A JP H1174055A JP 24595797 A JP24595797 A JP 24595797A JP 24595797 A JP24595797 A JP 24595797A JP H1174055 A JPH1174055 A JP H1174055A
Authority
JP
Japan
Prior art keywords
holes
terminal pin
cell
perforated
synthetic resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24595797A
Other languages
Japanese (ja)
Inventor
Tetsuo Yumoto
哲男 湯本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sankyo Kasei Co Ltd
Original Assignee
Sankyo Kasei Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sankyo Kasei Co Ltd filed Critical Sankyo Kasei Co Ltd
Priority to JP24595797A priority Critical patent/JPH1174055A/en
Publication of JPH1174055A publication Critical patent/JPH1174055A/en
Pending legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00Nanotechnology for materials or surface science, e.g. nanocomposites
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Composite Materials (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)
  • Manufacturing Of Electrical Connectors (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide miniaturization and thinning, by forming a film of triazine thiol compound on the electroless plating surface of the internal circumference of each perforated hole, inserting a terminal pin into each perforated hole, and injecting an insulative synthetic resin for molding terminal pin holders. SOLUTION: A cavity corresponding to the outer shape of an electronic component 1 is formed in an injection molding die. Holding holes for holding terminal pins are provided at the prescribed positions within the cavity, and the whole surface is copperized, and a cell 10 provided with coating on the copperized surface within perforated holes is inserted, and the perforated holes 10a are perforated, further the terminal pins 2 are held by the holding holes and inserted, then the die is closed. An insulating ABS resin is used as an injected insulating synthetic resin. A covalent bond is formed between the coating of triazine thiol copper salt formed on the copperized surface and a butadiene component within the ABS resin, then a firm agglutination is obtained. In addition, as the film is very thin, it is suitable to miniaturization.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、例えばシールドコ
ネクタ等の電子部品の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an electronic component such as a shield connector.

【0002】[0002]

【従来の技術】近年、電子部品を介して送信される信号
の量が多くなり、また信号スピードが極めて早くなり、
信号間に混線が発生する危険性が高まっている。そのた
め、セルの壁内にシールド板を圧入して端子間シールに
より端子間に流れる電磁波を遮断していた。しかしシー
ルド板を圧入する方法では製造・組立にかかるコストを
押上げる。そこで、コストの低減とシールドの信頼性を
高めるものとして、複数の貫通孔を有する合成樹脂製の
セルの全面にシールド用の無電解めっきし、貫通孔内に
端子ピン挿着孔を有する端子ピン挿着体を合成樹脂で成
形し、端子ピンを端子ピン挿着孔に挿着したものがあ
る。
2. Description of the Related Art In recent years, the amount of signals transmitted through electronic components has increased, and the signal speed has become extremely high.
The risk of crosstalk between signals is increasing. Therefore, a shield plate is press-fitted into the wall of the cell and an electromagnetic wave flowing between the terminals is blocked by the seal between the terminals. However, the method of press-fitting the shield plate increases the manufacturing and assembly costs. Therefore, as a means of reducing cost and increasing the reliability of the shield, a terminal pin having a terminal pin insertion hole in the through hole is plated with an electroless plating for shielding over the entire surface of a synthetic resin cell having a plurality of through holes. There is a type in which an insertion body is formed of a synthetic resin and a terminal pin is inserted into a terminal pin insertion hole.

【0003】[0003]

【発明が解決しようとする課題】従来の後者のもののよ
うに、無電解めっきした貫通孔内に合成樹脂で端子ピン
挿着体を成形すると、めっきと合成樹脂との接合強度が
十分に得られず、不安定となる。このために貫通孔内面
と端子ピン挿着体の外周面との間に、例えば係止爪と係
止凹部のような抜け止めの機構が必要になる。しかし、
電子部品の一層の小型化・薄型化が求められている昨今
において、小型化・薄型化に逆行する抜け止めの機構を
設けることは不可能であるという問題点があった。更に
貫通孔内面と端子ピン挿着体の外周面との間の接合が不
十分であると、そこに隙間を生じ、水分が浸入し結露を
生じて隙間を更に大きくし、電気的な信頼性を損ねると
いう問題点があった。
When a terminal pin insert is formed of a synthetic resin in an electroless plated through-hole as in the latter conventional one, a sufficient bonding strength between the plating and the synthetic resin can be obtained. And become unstable. For this reason, it is necessary to provide a retaining mechanism such as a locking claw and a locking recess between the inner surface of the through hole and the outer peripheral surface of the terminal pin insertion body. But,
In recent years in which electronic components have been required to be further reduced in size and thickness, there has been a problem that it is impossible to provide a retaining mechanism that goes against the reduction in size and thickness. Further, if the joint between the inner surface of the through hole and the outer peripheral surface of the terminal pin insertion body is insufficient, a gap is generated therein, and moisture infiltrates to cause dew condensation, thereby further increasing the gap. There was a problem of spoiling.

【0004】そこで本発明の目的は、小型化・薄型化を
押し進めるものであると同時に、抜け止めの作用を確実
にし、電気的信頼性の高い電子部品の製造方法を提供す
ることにある。
It is an object of the present invention to provide a method of manufacturing an electronic component having high electrical reliability, while at the same time promoting the miniaturization and thinning, and at the same time, ensuring the action of retaining.

【0005】[0005]

【課題を解決するための手段】上記問題点を解決するた
めに、本発明の電子部品の製造方法は、合成樹脂を射出
して複数の貫通孔を有するセルを成形し、上記セルの全
面にシールド用の無電解めっきを形成し、上記各貫通孔
の内周面の上記無電解めっき面に、トリアジンチオール
化合物の被膜を形成し、上記各貫通孔内に端子ピンをイ
ンサートして、上記トリアジンチオール化合物と化学結
合可能な絶縁性の合成樹脂を射出して端子ピン保持体を
成形することを特徴としている。貫通孔の内周面の無電
解めっき面と端子ピン保持体とは、その間に設けた被膜
であるトリアジンチオール化合物との間で共有結合し、
強固に結合されるので抜け出ることがなく、トリアジン
チオール化合物の被膜は極めて薄くてよいので、小型化
・薄型化に適している。
In order to solve the above-mentioned problems, a method for manufacturing an electronic component according to the present invention comprises forming a cell having a plurality of through holes by injecting a synthetic resin, and forming the cell over the entire surface of the cell. Forming electroless plating for shielding, forming a coating of a triazine thiol compound on the electroless plating surface of the inner peripheral surface of each through hole, inserting a terminal pin into each of the through holes, and forming the triazine It is characterized in that an insulating synthetic resin capable of chemically bonding to a thiol compound is injected to form a terminal pin holder. The electroless plating surface on the inner peripheral surface of the through hole and the terminal pin holder are covalently bonded to a triazine thiol compound which is a film provided therebetween,
Since it is firmly bonded and does not come off, the coating of the triazine thiol compound can be extremely thin, which is suitable for miniaturization and thinning.

【0006】[0006]

【発明の実施の形態】本発明は、電子部品の一例として
図4に端子間シールドコネクタ1を示しており、このシ
ールドコネクタ1は、合成樹脂で成形されたセル(ハウ
ジング)10に2列に整列する複数の貫通孔10aが設
けてあり、このセル10の全面に無電解めっき11が施
されている。めっきが施された各貫通孔内に、絶縁製の
合成樹脂による端子ピン保持体10が二次成形されてお
り、この二次成形の際には端子ピン2をインサートして
成形する。従って各端子ピン2は無電解めっき11でシ
ールドされた状態でセル10を貫通している。そして無
電解めっき11にアースピン3を導通させている。そこ
でこのような端子間シールドコネクタ1の製造方法の一
例について、工程毎に以下に詳細に説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 4 shows an inter-terminal shield connector 1 as an example of an electronic component according to the present invention. The shield connector 1 is provided in a cell (housing) 10 formed of a synthetic resin in two rows. A plurality of aligned through holes 10a are provided, and electroless plating 11 is applied to the entire surface of the cell 10. In each plated through hole, a terminal pin holder 10 made of an insulating synthetic resin is secondarily formed, and at the time of the second forming, the terminal pin 2 is inserted and formed. Therefore, each terminal pin 2 penetrates through the cell 10 while being shielded by the electroless plating 11. The ground pin 3 is electrically connected to the electroless plating 11. Therefore, an example of a method for manufacturing such an inter-terminal shield connector 1 will be described in detail below for each process.

【0007】実施例1 (a)まず、図1に示すように、合成樹脂により一次成
形品であるセル(ハウジング)10を射出成形する。基
材としてめっきタイプのABS樹脂を用い、図示しない
射出成形金型のキャビティには、2列に整列する貫通孔
10aに対応する位置及び数の突起を突出させておく。
更に、アースピンを貫通させるための小孔10b、及び
取付孔10cに対応する突起を突出させておく。射出成
形条件の一例は 射出する材料 80℃で3時間程度予備乾燥したABS樹脂 シリンダー温度 250℃ 金型温度 80℃ 射出圧力 1,100Kg/cm2 冷却時間 30秒間 である。
Embodiment 1 (a) First, as shown in FIG. 1, a cell (housing) 10 as a primary molded product is injection-molded with a synthetic resin. A plating type ABS resin is used as a base material, and projections at positions and numbers corresponding to the through holes 10a aligned in two rows are projected in a cavity of an injection mold (not shown).
Further, projections corresponding to the small holes 10b through which the ground pins are passed and the mounting holes 10c are projected. An example of the injection molding conditions is an injection material: ABS resin pre-dried at 80 ° C. for about 3 hours Cylinder temperature 250 ° C. Mold temperature 80 ° C. Injection pressure 1,100 Kg / cm 2 Cooling time 30 seconds.

【0008】(b)次に、図2に示すように、セル10
の全面にシールド用の無電解めっき11を施す。めっき
を施すのに先立って、セル全面を脱脂し、エッチングす
る。エッチングは、クロム酸を400g/l、硫酸を4
00g/lを混合したエッチング液を用い、このエッチ
ング液を65℃に保ち、この中に10分程度浸漬する。
このエッチングによりセル10の表面及び貫通孔10
a、小孔10b及び取付孔10cの内周面が粗化され
る。この後で中和してクロム成分を除去し、キャタライ
ジング及びアクセレーティングしておく。
(B) Next, as shown in FIG.
Electroless plating 11 for shielding is applied to the entire surface of the substrate. Prior to plating, the entire surface of the cell is degreased and etched. Etching is performed with 400 g / l of chromic acid and 4 g of sulfuric acid.
Using an etching solution mixed with 00 g / l, this etching solution is kept at 65 ° C. and immersed in this for about 10 minutes.
By this etching, the surface of the cell 10 and the through hole 10 are formed.
a, the inner peripheral surfaces of the small holes 10b and the mounting holes 10c are roughened. Thereafter, the chromium component is neutralized to remove the chromium component, and is subjected to catalyzing and accelerating.

【0009】そして、このエッチングしたセル10の全
面に無電解銅めっきする。めっきに際して、奥野製薬工
業株式会社のDPC−700無電解銅めっき液を使用し
た。このめっき液は、A液を100ml/l、B液を1
00ml/l、C液を2ml/lの割合で混合したもの
である。このめっき液を25℃に保ち、上記セル10を
10時間浸漬し、全面に厚さ20μmの銅めっき11を
析出させてシールド用のめっきを形成する。この銅めっ
き11は、貫通孔10a及び小孔10b及び取付孔10
cの内周面にも析出されて銅めっき11a,11b,1
1cが施される。
Then, electroless copper plating is performed on the entire surface of the etched cell 10. At the time of plating, a DPC-700 electroless copper plating solution from Okuno Pharmaceutical Co., Ltd. was used. This plating solution is 100 ml / l for solution A and 1 for solution B.
00 ml / l and solution C were mixed at a rate of 2 ml / l. The plating solution is kept at 25 ° C., the cell 10 is immersed for 10 hours, and a copper plating 11 having a thickness of 20 μm is deposited on the entire surface to form plating for shielding. The copper plating 11 has a through hole 10a, a small hole 10b, and a mounting hole 10b.
c is also deposited on the inner peripheral surface of copper plating 11a, 11b, 1
1c is performed.

【0010】(c)次に、図3に示すように、このセル
の各貫通孔の銅めっき11a面をトリアジンチオール類
の水溶液で処理して、銅めっきの表面にトリアジンチオ
ール銅塩の被膜12を形成する。この被膜12を形成し
た銅めっき11aと、次に形成される端子ピン保持体2
0の材料であるABS樹脂との接着強度は、トリアジン
チオール類の水溶液で処理する場合の処理条件、成形条
件、ABS樹脂中のブタジエン成分の含有量に依存す
る。最適な処理条件は、溶液濃度0.8〜1×10-3 m
ol/l、処理時間10〜60sであり、80℃以上で高
い接着強度が得られ、また、ABS樹脂中のブタジエン
成分の含有量が18〜20%で最大の接着強度を示す。
(C) Next, as shown in FIG. 3, the surface of the copper plating 11a of each through hole of this cell is treated with an aqueous solution of triazine thiols, and the surface of the copper plating is coated with a triazine thiol copper salt coating 12a. To form The copper plating 11a on which the coating 12 is formed and the terminal pin holder 2 to be formed next
The adhesive strength to the ABS resin, which is the material No. 0, depends on the processing conditions, the molding conditions, and the content of the butadiene component in the ABS resin when treating with an aqueous solution of a triazine thiol. Optimum processing conditions are solution concentration 0.8-1 × 10 -3 m
ol / l, treatment time is 10 to 60 s, high adhesive strength is obtained at 80 ° C. or higher, and maximum adhesive strength is exhibited when the content of the butadiene component in the ABS resin is 18 to 20%.

【0011】(d)次に、図4に示す二次成形をする。
図示しない射出成形金型に電子部品1の外形形状に合致
するキャビティを形成する。このキャビティ内には端子
ピン2…を保持する保持孔が所定の位置に設けてあり、
また小孔10bと取付孔10cに対応する突起が形成し
てある。このキャビティ内に、全面に銅めっき11,1
1a,11b,11cが施され、貫通孔内の銅めっき1
1a面に被膜12が設けられたセル10をインサート
し、貫通孔10a…を貫通させて端子ピン2…を保持孔
に保持させてインサートして金型を閉じる。射出する絶
縁性の合成樹脂として、絶縁性のABS樹脂を用いてい
る。射出成形条件の一例は先に示した通りである。この
二次成形によって、各貫通孔10a…に端子ピン2…が
貫通する端子ピン保持体20が成形される。この二次成
形時の金型温度は先に示したように80℃に設定してあ
るので、前記したように高い接着強度を得るための条件
が満たされる。このために銅めっき11a上に形成され
たトリアジンチオール銅塩の被膜12とABS樹脂中の
ブタジエン成分との間に共有結合が形成されて、強固な
接合が得られる。
(D) Next, secondary molding shown in FIG. 4 is performed.
A cavity that matches the external shape of the electronic component 1 is formed in an injection mold (not shown). In this cavity, holding holes for holding the terminal pins 2 are provided at predetermined positions.
Also, projections corresponding to the small holes 10b and the mounting holes 10c are formed. In this cavity, copper plating 11, 1
1a, 11b, 11c, and copper plating 1 in the through hole.
The cell 10 provided with the coating 12 on the 1a surface is inserted, the terminal pins 2 are held in the holding holes through the through holes 10a, and the insertion is performed to close the mold. An insulating ABS resin is used as the insulating synthetic resin to be injected. One example of the injection molding conditions is as described above. By this secondary molding, the terminal pin holders 20 through which the terminal pins 2 pass through the through holes 10a are formed. Since the mold temperature at the time of the secondary molding is set to 80 ° C. as described above, the condition for obtaining high adhesive strength is satisfied as described above. Therefore, a covalent bond is formed between the triazine thiol copper salt coating 12 formed on the copper plating 11a and the butadiene component in the ABS resin, and a strong bond is obtained.

【0012】(e)この二次成形の後で、アースピン3
を小孔10bに挿通させると、小孔の内周面には銅めっ
き11bが形成されているので、アースピン3はセルの
全面の銅めっき11、貫通孔内周面の銅めっき11a…
と導通状態となり、各端子ピン2…はそれぞれシールド
された状態でセル10に保持される。このようにして電
子部品の一例である端子間シールドコネクタ1の製造が
完了する。
(E) After the secondary molding, the earth pin 3
Is inserted through the small hole 10b, since the copper plating 11b is formed on the inner peripheral surface of the small hole, the ground pin 3 has the copper plating 11 on the entire surface of the cell, the copper plating 11a on the inner peripheral surface of the through hole.
Are connected to each other, and the terminal pins 2 are held in the cell 10 in a shielded state. Thus, the manufacture of the terminal-to-terminal shield connector 1 as an example of the electronic component is completed.

【0013】実施例2 前記の実施例1では一次成形及び二次成形にABS樹脂
を用いているが、この実施例2では、ABS樹脂に代え
てSPS樹脂、例えば出光石油化学株式会社の製品であ
るSPS「ザレック」を用いている。一次成形ではめっ
き用のSPS「ザレック」グレードSP140を基材と
してセルを射出成形により成形する。この射出成形条件
の一例は 射出する材料 SPS樹脂「ザレック」グレードSP140 シリンダー温度 280℃ 金型温度 80℃ 射出圧力 1000Kg/cm2 冷却時間 30秒間 である。
Embodiment 2 In the above-mentioned embodiment 1, the ABS resin is used for the primary molding and the secondary molding. In this embodiment 2, an SPS resin, for example, a product of Idemitsu Petrochemical Co., Ltd. is used instead of the ABS resin. A certain SPS “Zarek” is used. In the primary molding, cells are molded by injection molding using SPS “Zarek” grade SP140 for plating as a base material. An example of the injection molding conditions is the material to be injected SPS resin “Zarek” grade SP140 Cylinder temperature 280 ° C. Mold temperature 80 ° C. Injection pressure 1000 kg / cm 2 Cooling time 30 seconds.

【0014】このセルの全面に銅めっきを施す前に脱脂
し、エッチングする。エッチング液、エッチング温度そ
の他のエッチング条件については、実施例1の条件と同
じである。この後で中和してクロムイオンを完全に除去
する。「ザレック」は触媒イオンを引き付ける極性基を
持たないために、ここで極性付与のために室温レベルの
界面活性剤水溶液に浸漬する。その後でキャタライジン
グ及びアクセレーティングしておく。セルの全面に銅め
っきを施す工程については、実施例1と同じである。銅
めっきを形成した後で強制乾燥する。「ザレック」の場
合、この強制乾燥によりめっき密着力を格段に向上させ
ることができる。
Before applying copper plating to the entire surface of the cell, the cell is degreased and etched. The etching solution, the etching temperature, and other etching conditions are the same as those of the first embodiment. Thereafter, neutralization is performed to completely remove chromium ions. Since "Zarek" does not have a polar group that attracts a catalyst ion, it is immersed in an aqueous solution of a surfactant at room temperature to impart polarity here. After that, it is catalyzed and accelerated. The step of plating the entire surface of the cell with copper is the same as in the first embodiment. After forming the copper plating, it is forcibly dried. In the case of "Zarek", this forced drying can significantly improve the plating adhesion.

【0015】次に、貫通孔内周面の銅めっき面にトリア
ジンチオール化合物の被膜を形成することも第1実施例
と同様である。この場合には、銅めっき上に形成された
トリアジンチオール銅塩の被膜とSPS樹脂中のSEB
(スチレン、エチレン、ブチレン)系のエラストマー成
分との間に化学結合が形成されて、第1実施例と同様な
強固な接着が得られるものである。
Next, a coating of a triazine thiol compound is formed on the copper plating surface on the inner peripheral surface of the through hole as in the first embodiment. In this case, the triazine thiol copper salt coating formed on the copper plating and the SEB in the SPS resin were used.
A chemical bond is formed between the (styrene, ethylene, butylene) -based elastomer component and the same strong adhesion as in the first embodiment can be obtained.

【0016】次に、この一次成形品をインサートし、更
に端子ピンをインサートして、端子ピン保持体を二次成
形する工程であるが、これも第1実施例と同様である。
用いられる合成樹脂は絶縁性のものであればABS樹
脂、SPS樹脂のいずれでもよく、この射出成形条件も
上記した通りであって、金型温度を80℃に設定してあ
るので、前記したように強固な接合が得られる。アース
ピンの取り付けについても同様であり、各端子ピンはそ
れぞれシールドされた状態でセルに保持されて端子間シ
ールドコネクタの製造が完了する。
Next, a step of inserting the primary molded product, further inserting terminal pins, and secondary molding the terminal pin holder is the same as in the first embodiment.
The synthetic resin used may be either an ABS resin or an SPS resin as long as it is insulating. The injection molding conditions are as described above, and the mold temperature is set to 80 ° C. Strong bonding is obtained. The same applies to the installation of the earth pin. Each terminal pin is held in a cell in a shielded state, and the manufacture of the terminal-to-terminal shield connector is completed.

【0017】なお、本発明は端子間シールドコネクタの
製造に限られるものでなく、シールド付き光電変換モジ
ュールその他の電子部品の製造に実施が可能である。
The present invention is not limited to the manufacture of the inter-terminal shield connector, but can be applied to the manufacture of a shielded photoelectric conversion module and other electronic components.

【0018】[0018]

【発明の効果】本発明は、以上説明したような形態で実
施され、以下に記載されるような効果を奏する。
The present invention is embodied in the form described above and has the following effects.

【0019】貫通孔の内周面の無電解めっきの面にトリ
アジンチオール化合物の被膜を形成しているので、無電
解めっきの面と端子ピン保持体とは、トリアジンチオー
ル化合物との間で共有結合し、強固に結合され、端子ピ
ン保持体が抜け出ることがなく、トリアジンチオール化
合物の被膜は極めて薄いので、小型化・薄型化に極めて
有効である。無電解めっきの面と端子ピン保持体とが強
固に結合されるので、その間に隙間を生じることがな
く、従って電気的な信頼性が高い電子部品を提供でき
る。
Since the triazine thiol compound film is formed on the electroless plating surface on the inner peripheral surface of the through hole, the electroless plating surface and the terminal pin holder are covalently bonded to the triazine thiol compound. However, since the terminal pin holder is firmly bonded and the terminal pin holder does not come off, and the coating of the triazine thiol compound is extremely thin, it is very effective for miniaturization and thinning. Since the surface of the electroless plating and the terminal pin holder are firmly connected to each other, there is no gap between them, and an electronic component having high electrical reliability can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】コネクタの一次成形品の一部切欠斜視図であ
る。
FIG. 1 is a partially cutaway perspective view of a primary molded product of a connector.

【図2】図1の一次成形品にシールド用無電解めっきを
施した状態の一部切欠斜視図である。
FIG. 2 is a partially cutaway perspective view showing a state in which electroless plating for shielding is applied to a primary molded article of FIG. 1;

【図3】図2の貫通孔内周面に被膜を形成した状態の拡
大断面図である。
FIG. 3 is an enlarged sectional view showing a state where a coating is formed on the inner peripheral surface of the through hole of FIG. 2;

【図4】コネクタの完成品の一部切欠斜視図である。FIG. 4 is a partially cutaway perspective view of a completed connector.

【符号の説明】[Explanation of symbols]

1 電子部品(端子間シールドコネクタ) 10 セル 10a 貫通孔 11,11a 無電解めっき 12 被膜 2 端子ピン 20 端子ピン保持体 DESCRIPTION OF SYMBOLS 1 Electronic component (shield connector between terminals) 10 Cell 10a Through hole 11, 11a Electroless plating 12 Coating 2 Terminal pin 20 Terminal pin holder

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 合成樹脂を射出して複数の貫通孔を有す
るセルを成形し、 上記セルの全面にシールド用の無電解めっきを形成し、 上記各貫通孔の内周面の上記無電解めっき面に、トリア
ジンチオール化合物の被膜を形成し、 上記各貫通孔内に端子ピンをインサートして、上記トリ
アジンチオール化合物と化学結合可能な絶縁性の合成樹
脂を射出して端子ピン保持体を成形することを特徴とす
る電子部品の製造方法。
1. A cell having a plurality of through holes is formed by injecting a synthetic resin, and electroless plating for shielding is formed on the entire surface of the cell, and the electroless plating on the inner peripheral surface of each of the through holes is performed. A triazine thiol compound film is formed on the surface, and a terminal pin is inserted into each of the through holes, and an insulating synthetic resin capable of chemically bonding to the triazine thiol compound is injected to form a terminal pin holder. A method for manufacturing an electronic component, comprising:
JP24595797A 1997-08-28 1997-08-28 Manufacture of electronic component Pending JPH1174055A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24595797A JPH1174055A (en) 1997-08-28 1997-08-28 Manufacture of electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24595797A JPH1174055A (en) 1997-08-28 1997-08-28 Manufacture of electronic component

Publications (1)

Publication Number Publication Date
JPH1174055A true JPH1174055A (en) 1999-03-16

Family

ID=17141371

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24595797A Pending JPH1174055A (en) 1997-08-28 1997-08-28 Manufacture of electronic component

Country Status (1)

Country Link
JP (1) JPH1174055A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005094575A (en) * 2003-09-19 2005-04-07 Audio Technica Corp Output connector of microphone
JP2012195067A (en) * 2011-03-15 2012-10-11 Sumitomo Wiring Syst Ltd Device connector

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005094575A (en) * 2003-09-19 2005-04-07 Audio Technica Corp Output connector of microphone
JP2012195067A (en) * 2011-03-15 2012-10-11 Sumitomo Wiring Syst Ltd Device connector

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