JPH1155013A - Integrated circuit, resonance circuit, bias circuit, feedback circuit, high frequency processing circuit, matching circuit and stub - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable miniaturization, to provide satisfactory characteristics and further to enable production through a simple process with a few elements. SOLUTION: A chip capacitor 4 is arranged on a microstrip conductor 3 consisting of a microstrip line. The chip capacitor 4 has a dielectric 5 and electrodes 6 and 7 provided at both terminals. The electrodes 6 and 7 of the chip capacitor 4 are connected to the microstrip conductor 3. A resonance frequency is determined from a length L of the microstrip conductor 3 between the electrodes 6 and 7 of the chip capacitor 4, the dielectric constant and thickness of a dielectric substrate 1, and the capacitance value of the chip capacitor 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an integrated circuit, a resonance circuit, a bias circuit, a feedback circuit, a high frequency processing circuit, a matching circuit, and a stub.

[0002]

2. Description of the Related Art In recent years, with the rapid development of mobile communication, radio waves of a very large number of frequencies have been required for communication, and the frequency of radio waves used in mobile communication has shifted to the microwave band. It is moving. Therefore, an amplifier used in a portable device is a monolithic microwave integrated circuit (MMI).
C) or modularized microwave integrated circuit (MIC)
It consists of.

A bias circuit for applying a predetermined DC bias to the gate and drain of a field effect transistor (FET) is used as an amplifier for amplifying a signal of a desired frequency. Further, a feedback circuit is provided to prevent oscillation of the FET in a low frequency region and improve the stability of the amplifier.

FIG. 23 is a circuit diagram showing an example of a conventional bias circuit provided in an amplifier comprising an FET.

The bias circuit shown in FIG. 23 includes a parallel resonance circuit 300 including an inductor L1 and a capacitor C1 connected in parallel. This parallel resonance circuit 30
At 0, by adjusting the inductance of the inductor L1 and the capacitance value of the capacitor C1, a DC drain bias Vd from a bias power supply can be applied to the drain of the FET 200 without passing a signal of a desired frequency.

For example, in an amplifier used in the 1.5 GHz band, the inductance of the inductor L1 is 0.4 nH
By setting the capacitance value of the capacitor C1 to 28 pF, the drain of the FET 200 has a drain bias V without causing loss of a signal having a frequency of 1.5 GHz.
d can be applied.

FIG. 24 is a circuit diagram showing another example of a conventional bias circuit provided in an amplifier comprising an FET.

The bias circuit shown in FIG. 24 is constituted by a microstrip line MSL. In this microstrip line MSL, by setting the length to ４ of the wavelength corresponding to the desired frequency, a DC drain bias Vd is applied to the drain of the FET 200 without passing the signal of that frequency. be able to.

FIG. 25 is a circuit diagram showing an example of a conventional feedback circuit provided in an amplifier comprising an FET.

The feedback circuit shown in FIG. 25 includes a capacitor C2 connected in series between the drain and the gate of the FET 200.
And a resistor R1. According to this feedback circuit, part of the high-frequency signal appearing at the drain of the FET 200 is fed back to the gate in the opposite phase. Thereby, the gain mainly at a low frequency is suppressed, and the oscillation of the FET 200 is prevented. The capacitor C2 is provided so that a DC component is not fed back to the gate of the FET 200.

[0011]

The bias circuit comprising the parallel resonance circuit 300 shown in FIG. 23 requires at least two types of elements, an inductor L1 and a capacitor C1. Therefore, when designing the amplifier, the inductor L
1 and a space for mounting the capacitor C1 must be provided.

Particularly, in the case of an MMIC operated in a high frequency region, a spiral inductor having a large occupied area is used as the inductor L1. Therefore, the area of the parallel resonance circuit formed on the dielectric substrate becomes very large.

Further, in a modularized MIC, an external component called a chip capacitor is required as the capacitor C1, and an external component called a chip inductor is required as the inductor L1. In this case, it is necessary to consider a method of mounting the chip capacitor and the chip inductor close to each other. This occupies a very large area on the substrate and adversely affects the characteristics. Also, this chip inductor is considerably more expensive than a chip capacitor.

Further, there is a wiring having a finite length for connecting the drain of the FET 200 to the bias power supply. This wiring becomes a microstrip line on the dielectric substrate. As a result, the calculated resonance frequency of the parallel resonance circuit 300 deviates from the actual resonance frequency due to the presence of the microstrip line. for that reason,
Considering microstrip line, parallel resonance circuit 300
Need to be designed.

In the bias circuit including the microstrip line MSL shown in FIG.
There is a problem that the length of L becomes long. For example, when using at a frequency of 1.5 GHz, the thickness of the dielectric substrate is set to 0.8
mm, and the dielectric constant is 9, the length of the quarter wavelength is about 20 mm.

In the feedback circuit including the resistor R1 and the capacitor C2 shown in FIG. 25, at least two types of elements are required.
In this feedback circuit, the resistance R1
When the resistance value of is decreased, the feedback amount increases and the gain decreases. Conversely, when the resistance value of the resistor R1 is increased,
The effect of feedback is reduced and stability is not improved.

Therefore, by providing a parallel resonance circuit including an inductor and a capacitor in the feedback circuit, it is possible to feed back only a signal having a frequency other than a desired frequency. Thereby, while reducing the resistance value of the resistor R1,
It is possible to suppress a decrease in gain for a signal of a desired frequency.

However, if a parallel resonance circuit composed of an inductor and a capacitor is provided, the same problem as that of the bias circuit shown in FIG. 23 occurs, and the size cannot be reduced. Further, in order to connect the drain and the gate of the FET 200, there is always a wiring having a finite length. This wiring becomes a microstrip line on the dielectric substrate as described above, and the calculated resonance frequency of the parallel resonance circuit deviates from the actual resonance frequency.

An object of the present invention is to provide an integrated circuit which can be miniaturized, has good characteristics, and can be manufactured by a simple process with a small number of elements.

Another object of the present invention is to provide a resonance circuit which can be miniaturized, has good characteristics, and can be manufactured with a small number of elements by a simple process, and a bias circuit and a feedback circuit having the same. , A high-frequency processing circuit, a matching circuit, and a stub.

[0021]

The integrated circuit according to the first invention has a microstrip line provided on a dielectric substrate and a microstrip line disposed on the microstrip line and connected to the microstrip line. And a capacitor.

A microstrip line becomes inductive and capacitive depending on its length and frequency. Therefore, in the integrated circuit according to the present invention, a parallel circuit of inductance and capacitance is configured by setting the length of the microstrip line so that the microstrip line becomes inductive at a specific frequency.

In this case, since the capacitors are arranged on the microstrip line, a parallel circuit of inductance and capacitance can be manufactured with a small occupation area and a small number of elements and with a simple process.

The microstrip line includes a microstrip conductor formed on the front surface of the dielectric substrate, and a ground conductor formed on the back surface of the dielectric substrate, and the capacitor includes a dielectric disposed on the microstrip conductor. When,
A pair of electrodes may be provided at both ends of the dielectric in the extending direction of the microstrip conductor, and the pair of electrodes may be connected to the microstrip conductor.

In this case, the resonance frequency of the parallel circuit is uniquely set by the length of the microstrip conductor between the pair of electrodes of the capacitor, the permittivity and the thickness of the dielectric substrate, and the capacitance value of the capacitor. Therefore,
The resonance frequency can be easily matched with a desired frequency.

The microstrip line includes a microstrip conductor formed on the front surface of the dielectric substrate and a ground conductor formed on the back surface of the dielectric substrate, and the capacitor is formed on the microstrip conductor. One end of the metal layer in the extending direction of the microstrip conductor may be connected to the microstrip conductor, including the insulating layer and a metal layer formed on the insulating layer.

In this case, the resonance frequency of the parallel circuit is uniquely determined by the length of the microstrip conductor under the metal layer, the dielectric constant and thickness of the dielectric substrate, and the capacitance of the capacitor. Therefore, it is possible to easily match the resonance frequency to a desired frequency.

In particular, since the capacitance value of the capacitor can be set by adjusting the thickness of the insulating layer, there is almost no limitation on the capacitance value due to the dimensions.

A resonance circuit according to a second aspect of the present invention includes a microstrip line provided on a dielectric substrate, and a capacitor disposed on the microstrip line and connected to the microstrip line.

In the resonance circuit according to the present invention, by setting the length of the microstrip line so that the microstrip line becomes inductive at a specific frequency,
A resonance circuit is formed.

In this case, since the resonance frequency is uniquely determined by the capacitance value of the capacitor and the characteristics of the microstrip line, the resonance frequency can be easily matched with the desired frequency. Thereby, good characteristics can be easily realized.

Further, since the capacitor is arranged on the microstrip line, it can be manufactured with a small occupied area and a small number of elements by a simple process.

A resonance circuit according to a third aspect of the present invention is the resonance circuit according to the second aspect, wherein the microstrip line is formed on a microstrip conductor formed on the surface of the dielectric substrate and on a back surface of the dielectric substrate. The ground conductor formed, the capacitor comprises a dielectric disposed on the microstrip conductor, and a pair of electrodes provided at both ends of the dielectric in the extending direction of the microstrip conductor, a pair of electrodes Are connected to the microstrip conductors, respectively.

In this case, the resonance frequency is uniquely determined by the length of the microstrip conductor between the pair of electrodes of the capacitor, the permittivity and thickness of the dielectric substrate, and the capacitance value of the capacitor. Therefore, it is possible to easily match the resonance frequency to a desired frequency.

The resonance circuit according to a fourth aspect of the present invention is the resonance circuit according to the second aspect, wherein the microstrip line is formed on a microstrip conductor formed on the surface of the dielectric substrate and on a back surface of the dielectric substrate. The capacitor includes an insulating layer formed on the microstrip conductor, and a metal layer formed on the insulating layer, and one end of the metal layer in the direction in which the microstrip conductor extends is formed. It is connected to a microstrip conductor.

In this case, the resonance frequency is uniquely determined by the length of the microstrip conductor under the metal layer, the dielectric constant and thickness of the dielectric substrate, and the capacitance of the capacitor. Therefore, it is possible to easily match the resonance frequency to a desired frequency.

In particular, since the capacitance value of the capacitor can be set by adjusting the thickness of the insulating layer, there is almost no limitation on the capacitance value due to the dimensions.

The resonance circuit according to a fifth aspect of the present invention is the resonance circuit according to the third aspect, wherein the capacitor connected to the microstrip conductor is so arranged that the microstrip line is inductive at a specific frequency. The length between the pair of electrodes is set.

In this case, since the microstrip line becomes inductive to a specific frequency, resonance can be generated at a desired frequency by adjusting the capacitance value of the capacitor.

A resonance circuit according to a sixth aspect of the present invention is the resonance circuit according to the fifth aspect, wherein the capacitance value of the capacitor is set so that resonance occurs at the specific frequency. This makes it possible to cause resonance at a desired frequency.

According to a seventh aspect of the present invention, in the configuration of the resonance circuit according to the fourth aspect, the metal in the extending direction of the microstrip conductor is arranged so that the microstrip line becomes inductive at a specific frequency. The length of the layer is set.

In this case, since the microstrip line becomes inductive to a specific frequency, resonance can be generated at a desired frequency by setting the capacitance value of the capacitor.

The resonance circuit according to an eighth aspect of the present invention is the resonance circuit according to the seventh aspect of the invention, wherein the capacitance value of the capacitor is set so that resonance occurs at the specific frequency. Thereby, resonance can be caused at a desired frequency.

A bias circuit according to a ninth aspect is a bias circuit for applying a bias to an electrode of a transistor, comprising: a dielectric substrate; a microstrip line provided on the dielectric substrate and connected to the electrode of the transistor. , A capacitor disposed on the microstrip line and connected to the microstrip line, and a bias is applied to a portion of the microstrip line on a side opposite to the transistor with respect to the capacitor.

In this case, the resonance circuit can be opened at a predetermined frequency by setting the capacitance value of the capacitor so that resonance occurs at a predetermined frequency in the resonance circuit formed by the microstrip line and the capacitor. . Thus, a bias can be applied to the electrode of the transistor via the microstrip line without affecting a signal of a predetermined frequency of the electrode of the transistor.

The electrode on the transistor side of the capacitor is connected to a position on the microstrip line except for a position apart from the electrode of the transistor by a distance equal to a quarter of the wavelength corresponding to the predetermined frequency. As a result, the electrode of the transistor is not short-circuited for a predetermined frequency.

A bias circuit according to a tenth aspect of the present invention is a bias circuit for applying a bias to an electrode of a transistor, comprising: a dielectric substrate; a microstrip line provided on the dielectric substrate and connected to the electrode of the transistor. A capacitor disposed on the microstrip line and connected to the microstrip line, the electrode of the capacitor on the side opposite to the transistor is grounded at high frequency, and the portion of the microstrip line on the side opposite to the transistor with respect to the capacitor is biased. Is applied.

In this case, by setting the capacitance value of the capacitor so that resonance occurs at a predetermined frequency in the resonance circuit including the microstrip line and the capacitor, the resonance circuit can have a predetermined impedance. Thus, a bias can be applied to the electrode of the transistor via the microstrip line without affecting a signal of a predetermined frequency of the electrode of the transistor.

The electrode of the capacitor on the side opposite to the transistor may be grounded via a bypass capacitor. Thereby, the electrode of the capacitor on the side opposite to the transistor is grounded in an alternating manner.

A feedback circuit according to an eleventh aspect of the present invention is a feedback circuit provided between an output electrode and an input electrode of a transistor, wherein the feedback circuit is provided on a dielectric substrate;
The microstrip line includes a microstrip line for returning a signal from an output electrode of the transistor to an input electrode, and a capacitor disposed on the microstrip line and connected to the microstrip line.

In the feedback circuit according to the present invention, a signal of a specific frequency among the signals output from the output electrode of the transistor is cut off by the resonance circuit formed by the microstrip line and the capacitor, and is fed back to the input electrode. However, signals of other frequencies are fed back to the input electrode. Thereby, the stability of the transistor is improved.

A high-frequency processing circuit according to a twelfth aspect is a high-frequency processing circuit connected to a predetermined node for suppressing a signal of a specific frequency. The high-frequency processing circuit is provided on a dielectric substrate, and provided on the dielectric substrate. A microstrip line connected to the node, and a capacitor disposed on the microstrip line and connected to the microstrip line,
The electrode of the capacitor on the side opposite to the predetermined node is grounded at a high frequency.

The capacitance value of the capacitor is set so that resonance occurs at a specific frequency. Thereby, a signal of a specific frequency is suppressed.

A matching circuit according to a thirteenth aspect is a matching circuit connected to a predetermined circuit, comprising: a dielectric substrate; a microstrip line provided on the dielectric substrate and connected to the predetermined circuit; And a capacitor arranged on the microstrip line and connected to the microstrip line.

In the matching circuit according to the present invention, the impedance of a predetermined circuit can be matched by adjusting the position of the capacitor disposed on the microstrip line.

A stub according to a fourteenth aspect is a stub that extends from a predetermined line and is open to a specific frequency, and is provided on a dielectric substrate and a dielectric substrate.
A microstrip line extending from a predetermined line,
And a capacitor arranged on the microstrip line and connected to the microstrip line.

The capacitance value of the capacitor is set so that resonance occurs at a specific frequency. Thereby, the resonance circuit constituted by the microstrip line and the capacitor is opened at a specific frequency.

A stub according to a fifteenth aspect of the present invention is a stub extending from a predetermined line and terminating the predetermined line with a predetermined impedance with respect to a specific frequency. A microstrip line extending from a predetermined line, and a capacitor disposed on the microstrip line and connected to the microstrip line. The electrode of the capacitor on the opposite side of the predetermined line has a high frequency. It is grounded.

The capacitance value of the capacitor is set so that resonance occurs at a specific frequency. Thereby, the resonance circuit constituted by the microstrip line and the capacitor has a predetermined impedance for a specific frequency.

[0060]

1 is a schematic sectional view of a resonance circuit according to a first embodiment of the present invention, FIG. 2 is a plan view of the resonance circuit of FIG. 1, and FIG. 3 is an equivalent circuit of the resonance circuit of FIG. FIG.

As shown in FIGS. 1 and 2, a ground conductor 2 is formed on the back surface of a dielectric substrate 1 made of GaAs or the like.
Microstrip conductor 3 is formed on the upper surface of dielectric substrate 1. Microstrip conductor 3, dielectric substrate 1
And the ground conductor 2 constitute a microstrip line.

A chip capacitor 4 is mounted on the microstrip conductor 3. Chip capacitor 4
Consists of a dielectric 5 and electrodes 6 and 7 formed on both ends thereof.

In this case, the electrodes 6 of the chip capacitor 4
As shown in FIG. 3, the interval between 7 is equivalently represented by the parallel connection of the capacitor C0 and the microstrip line MSL.

The microstrip line MSL becomes inductive equivalent to an inductor or capacitive equivalent to a capacitor in relation to its length and frequency. Therefore, the resonance circuit 20 can be configured by setting the length L of the microstrip line MSL between the electrodes 6 and 7 of the chip capacitor 4 so that the microstrip line MSL becomes inductive at a specific frequency. it can.

In this case, the microstrip line MSL
Becomes inductive if its length is short, so that the resonance circuit 20 can be easily configured.

The resonance frequency of the resonance circuit 20 is uniquely determined by the capacitance value of the capacitor C0 and the characteristics (length L, permittivity and thickness of the dielectric substrate 1) of the microstrip line MSL. It is easy to match the resonance frequency to the desired frequency.

As described above, since the resonance circuit of the first embodiment is configured by superposing the chip capacitor 4 on the microstrip conductor 3, an inductor is not required. Therefore, the circuit configuration is extremely simplified, the number of elements and the occupied area are reduced, and the manufacturing process is also simplified.

FIG. 4 is a schematic sectional view of a resonance circuit according to a second embodiment of the present invention, and FIG. 5 is a plan view of the resonance circuit of FIG.

As shown in FIGS. 4 and 5, a ground conductor 2 is formed on the back surface of a dielectric substrate 1 made of GaAs or the like.
The microstrip conductor 3 is formed on the surface of the dielectric substrate 1. Microstrip conductor 3, dielectric substrate 1
And the ground conductor 2 constitute a microstrip line.

On the microstrip conductor 3, the MIM
A (metal-insulator-metal) capacitor 8 is formed. The MIM capacitor 8 is connected to the microstrip conductor 3
It includes an insulating layer 9 and a metal layer 10 laminated thereon. That is, the MIM capacitor 8 includes the metal layer 10, the insulating layer 9, and the microstrip conductor 3 under the insulating layer 9.

As described above, the resonance circuit of the second embodiment is
Since the MIM capacitor 8 is formed by superimposing the MIM capacitor 8 on the microstrip conductor 3, an inductor is not required. Therefore, the circuit configuration becomes extremely simple,
The number of elements and the occupied area are reduced, and the manufacturing process is simplified.

In this case, the MIM capacitor 8 can be set to an arbitrary capacitance value by adjusting the thickness of the insulating layer 9, so that there is almost no limitation on the capacitance value depending on the size.

FIG. 6 is a circuit diagram of a bias circuit using the resonance circuit of the first or second embodiment. In the example of FIG.
The bias circuit 30 including the resonance circuit 20 of the first or second embodiment is connected to the drain of the FET 100.

This bias circuit 30 is simply constructed by superposing a capacitor C0 comprising a chip capacitor 4 or an MIM capacitor 8 on a microstrip line MSL used as a wiring, and does not require an additional area.

In this case, the resonance frequency can be easily set to a desired frequency (fundamental frequency) by setting the capacitance value of the capacitor C0 and the characteristics of the microstrip line MSL without considering the inductance of the wiring to be the microstrip line. Can be made to match.

For example, when the resonance circuit of the first embodiment is used, when the thickness of the dielectric substrate 1 is 0.8 mm, the dielectric constant is 9, and the length L of the chip capacitor 4 is 1 mm, the frequency is 1. The capacitance value required to resonate at 5 GHz is 4
6 pF. Therefore, by disposing the chip capacitor 4 having a capacitance value of 46 pF near the drain of the FET 100, the bias circuit 30 can be formed with a length of about 1 mm, and the size can be reduced.

On the other hand, the microstrip line M
In the bias circuit of FIG.
When used at GHz, the length of the microstrip line MSL needs to be about 20 mm as described above.

FIG. 7 is a circuit diagram of a feedback circuit using the resonance circuit of the first or second embodiment. In the example of FIG.
A feedback circuit 40 is connected between the drain and the gate of T100. In this feedback circuit 40, the resistance R
f, the capacitor Cf, and the resonance circuit 20 are connected in series.

The feedback circuit 40 is simply constructed by superposing the chip capacitor 4 or the MIM capacitor 8 on the microstrip line MSL used as a wiring, and does not require an additional area.

In the feedback circuit 40, a signal of a desired frequency (signal frequency) among the signals output from the drain of the FET 100 is cut off by the resonance circuit 20 and is not fed back to the gate. For example, a low-frequency signal that lacks stability is fed back to the gate. Thereby, the stability of the amplifier is improved. Further, in order to further increase the stability of the amplifier, the resistance value of the resistor Rf can be reduced.

FIG. 8 is a circuit diagram showing an example of an amplifier using a feedback circuit comprising a resonance circuit according to the first or second embodiment.

The amplifier shown in FIG. 8 has an FET 100, capacitors Cg, Cd, Cf, C0, inductors Lg, Ls, L
d, a resistor Rf and a microstrip line MSL are formed on a dielectric substrate.

The input terminal IN is grounded via a capacitor Cg and connected to an FET 10 via an inductor Lg.
0 is connected to the gate. The source of the FET 100 is grounded via the inductor Ls. FET100
Is connected to the output terminal OUT via the inductor Ld. The output terminal OUT is grounded via the capacitor Cd. Capacitor Cg, inductor L
g, the inductor Ls, the inductor Ld, and the capacitor Cd function as an impedance matching circuit.

A feedback circuit 50 is connected between the drain and the gate of the FET 100. The feedback circuit 50 includes a resistor Rf, a resonance circuit 20, and a capacitor Cf connected in series. The resonance circuit 20 includes a microstrip line MSL and a capacitor C0 connected in parallel.

The capacitors Cg and Cd and the inductor L
g and Ld are each composed of chip components, and the inductor L
s is made of a bonding wire. Also, the capacitor C
f is a chip capacitor, and the resistor Rf is a chip resistor. The wiring (microstrip line) from the gate of the FET 100 to the inductor Lg and the FE
The wiring (microstrip line) from the drain of T100 to the inductor Ld is omitted.

Here, Examples, Comparative Examples 1 and 2
The S parameter S _{twenty one}(Gain) and K
(Stability coefficient) frequency dependence and input / output power characteristics
Calculated. When K> 1, the amplifier is absolutely stable.
You.

The amplifier according to the embodiment has the circuit configuration shown in FIG. 8, and the values of each element are as follows. Capacitor Cg
Is 2 pF, the inductance of the inductor Lg is 4 nH, the capacitance of the capacitor Cd is 3 pF, the inductance of the inductor Ld is 2 nH, and the inductance of the inductor Ls is 0.1 nH. The capacitance value of the capacitor Cf in the feedback circuit 50 is 300 pF, and the resistance value of the resistor Rf is 200Ω. The capacitance value of the capacitor C0 in the resonance circuit 20 is 46 pF.

The FET 100 is a MESFET (metal-semiconductor field effect transistor) made of GaAs, and has a gate length of 0.7 μm and a gate width of 280 μm. The dielectric substrate is an alumina substrate having a dielectric constant of 10, a thickness of 0.8 mm, and tan δ = 1 × 10 ⁻³ .

The amplifier of Comparative Example 1 has the same circuit configuration as that of FIG. 8 except that it does not have the feedback circuit 50, and the values of each element are the same as those of the amplifier of the embodiment. 8 except that the amplifier of Comparative Example 2 does not have the resonance circuit 20.
And the values of each element are the same as those of the amplifier of the embodiment. That is, the amplifier of Comparative Example 2 has a resistance R
It has an RC feedback circuit consisting only of f and the capacitor Cf.

For the amplifiers of Example, Comparative Example 1 and Comparative Example 2, S _{21 at} a frequency of 0.1 GHz to 3 GHz was used.
(Gain) and K (stability factor) were calculated. In addition, input / output power characteristics at a frequency of 1.5 GHz were calculated.

The bias condition applied to the FET 100 is such that the drain voltage is 3 V and the gate voltage is -0.3 V.

FIG. 9 is a diagram showing calculation results of the frequency dependence of S ₂₁ and K for the amplifiers of Comparative Example 1 and Comparative Example 2. As shown in FIG. 9, in the amplifier of Comparative Example 2 having an RC feedback circuit, K exceeds 1 at all frequencies,
Comparative example 1 which is absolutely stable but has no feedback circuit
Compared to the amplifier, S ₂₁ at all frequencies is 3~10d
B lower. In particular, in the amplifier of the comparative example 2, S ₂₁ in comparison with the amplifier of Comparative Example 1 at a frequency 1.5GHz is 3d
B Deteriorated. Deterioration of the gain of the amplifier by 3 dB is problematic.

FIG. 10 is a diagram showing calculation results of the frequency dependence of S ₂₁ and K for the amplifiers of the embodiment and the comparative example 1. As shown in FIG. 10, in the amplifier of the embodiment having the feedback circuit 50, K exceeds 1 and is absolutely stable in a region other than the frequency range of 1.4 to 1.6 GHz. S ₂₁ compared to is lower 3~10dB. However, in the amplifier of the embodiment, the frequency 1.
K is 1 or more 4～1.6GHz, and S ₂₁ are Comparative Example 1
It is improved compared to the amplifier. In particular, in the amplifier of embodiment, in the frequency 1.5 GHz, S ₂₁ becomes 0.5dB higher than the amplifier of Comparative Example 1. Thus, it can be seen that in the amplifier of the example, the stability and the gain at 1.5 GHz are significantly improved.

FIG. 11 is a diagram showing calculation results of input / output power characteristics at a frequency of 1.5 GHz for the amplifiers of Comparative Example 1 and Comparative Example 2. As shown in FIG. 11, in the amplifier of the comparative example 2 having an RC feedback circuit, in comparison with the amplifier of the comparative example 1 without the feedback circuit, S ₂₁ are fallen by the output power amount that was decreased 3 dB. That is, it is considered that the amplifier of Comparative Example 2 does not have sufficient performance as a high-output amplifier.

FIG. 12 is a diagram showing calculation results of input / output power characteristics at a frequency of 1.5 GHz for the amplifiers of Example and Comparative Example 1. As shown in FIG.
In the amplifier of the present example having 0, compared to the amplifier of Comparative Example 1 having no feedback circuit, S ₂₁ at a frequency of 1.5 GHz was used.
Is increased by 0.5 dB, the output power is also increased. That is, the amplifier of the embodiment has sufficient performance as a high-output amplifier.

Although not shown in the calculation results, in an actual amplifier having no feedback circuit, an oscillation phenomenon often occurs when K becomes lower than 1.

From the above results, by using the resonance circuit of the present invention, the stability of the amplifier at a desired frequency,
It can be seen that it is possible to improve both the gain and the output power.

When the resonance circuit of the present invention is used, an amplifier can be configured with a small number of elements and a small occupied area, and the manufacturing process is simplified.

The resonance circuit of the present invention can be used as an open stub or a stub terminated with 50Ω in an FET bias circuit. Here, conditions when the resonance circuit of the present invention was used as an open stub and a stub terminated with 50Ω in a bias circuit were obtained from the following measurements.

In the following measurement, a dielectric substrate having a dielectric constant of 10 and a thickness of 0.635 mm was prepared using alumina (Al).
₂ O ₃ ) substrate was used. The width of the microstrip line is 0.55 mm, and the characteristic impedance is 50Ω. The capacitance value of the chip capacitor is 8 pF.

FIG. 13 shows a measuring circuit. Port P1 is
On the side of the FET, port P2 is on the opposite side of the FET. The length of the microstrip line MSL1 between the port P1 and the resonance circuit 20 is made variable, and the length of the microstrip line MSL2 between the port P2 and the resonance circuit 20 is also made variable. The measurement frequency is 1.9 GHz.

(1) Using Resonant Circuit as Open Stub First, the frequency dependence of S ₂₁ (transmission characteristic) in the measurement circuit of FIG. 13 was measured. In this measurement, ports P1, P
2 was terminated with 50Ω. FIG. 14 shows the measurement results.
From FIG. 14, since resonance occurred at 1.9 GHz,
It can be seen that transmission loss occurs at 1.9 GHz.

Next, in order to determine the position of the chip capacitor 4, the line length of the microstrip lines MSL1 and MSL2 was changed to 1.9 GHz in the measurement circuit of FIG.
We examined the change in the S ₂₁ in. FIG. 15 shows the measurement results. The horizontal axis in FIG. 15 is the microstrip line MSL1,
The line length of the MSL2 is represented by an electrical length, and the physical length is shown in parentheses. λ is a wavelength corresponding to the evaluation frequency, and α is a constant.

In FIG. 15, a diamond indicates the line length dependence of the transmission loss of the microstrip line MSL2, and a square indicates the line loss dependence of the microstrip line MSL1.

FIG. 15 shows that the transmission loss does not change regardless of the line length of the microstrip line MSL1 on the port P1 side and the microstrip line MSL2 on the port P2 side. Therefore, regardless of the position of the chip capacitor 4 on the microstrip line MSL, the resonance circuit 20 is open at the terminal of the chip capacitor 4 on the port P1 side. Further, since the resonance circuit 20 is opened at the terminal of the chip capacitor 4 on the port P1 side irrespective of the impedance on the port P2 side, an arbitrary position of the microstrip line MSL2 on the port P2 side can be grounded.

However, since the resonance circuit 20 is open at the port P1 side terminal, the resonance circuit 20
When the length is λ / 4, the port P1 is short-circuited (short-circuited to the ground potential). In that case, the resonance circuit 20 cannot be used for a bias circuit or a matching circuit of the amplifier. Therefore, the length of the microstrip line MSL1 on the port P1 side must be set to a length other than λ / 4. In order to increase the amount of transmission loss, a similar resonance circuit may be connected in series to the resonance circuit 20 described above.

(2) In the case where the resonance circuit is used as a stub terminated with 50Ω When the output impedance is sufficiently lower than 50Ω as in a high-output amplifier, the impedance of the resonance circuit 20 becomes 5Ω.
Even with 0Ω, an effect equivalent to open can be obtained. In general,
The output impedance of the high power amplifier is as low as one tenth of 50Ω, that is, about 5Ω or less.

First, the frequency dependence of S ₁₁ (reflection characteristics) in the measurement circuit of FIG. 13 was measured. In this measurement, the port P1 was terminated with 50Ω, and the port P2 was opened. FIG. 16 shows the measurement results.

FIG. 16 shows that since the resonance occurs at 1.9 GHz, reflection loss occurs at 1.9 GHz and no reflection occurs. That is, the resonance circuit 20 has 50
Ω.

Next, in order to determine the position of the chip capacitor 4, the line length of the microstrip lines MSL1 and MSL2 was changed to 1.9 GHz in the measurement circuit of FIG.
The change of the reflection characteristic at the time was examined. FIG. 17 shows the measurement results. The horizontal axis in FIG. 17 is the microstrip line MSL.
1, the line length of MSL2 is represented by an electrical length, and the physical length is shown in parentheses. λ is a wavelength corresponding to the evaluation frequency, and α is a constant.

In FIG. 17, a diamond indicates a microstrip line MSL2 of reflection loss when the terminal on the port P2 side of the chip capacitor 4 is not grounded (open).
, The square mark indicates the line length dependency of the microstrip line MSL2 of the reflection loss when the terminal on the port P2 side of the chip capacitor 4 is grounded, and the triangle mark indicates the terminal on the port P2 side of the chip capacitor 4 is grounded. The line length dependency of the microstrip line MSL1 of the reflection loss in the case of the above is shown.

As shown in FIG. 17, when the terminal on the port P2 side of the chip capacitor 4 is opened, the reflection loss of the resonance circuit 20 reduces the microstrip line MSL2 on the port P2 side.
It can be seen that there is a large change depending on the line length. That is, since the resonance state of the resonance circuit 20 changes according to the length of the microstrip line MSL2 on the port P2 side, the impedance of the resonance circuit 20 viewed from the port P1 side is:
Depending on the line length of the microstrip line MSL2 on the port P2 side, it varies in various ways, such as open, short, 50Ω, and other values, and cannot be uniquely determined.

When the terminal on the port P2 side of the chip capacitor 4 is fixed to the ground potential, it is understood that the reflection loss of the resonance circuit 20 does not depend on the line length of the microstrip line MSL2 on the port P2 side. That is, since the terminal on the port P2 side of the chip capacitor 4 serves as a reference for the impedance, the impedance of the resonance circuit 20 viewed from the port P1 side becomes the microstrip line MS on the port P2 side.
It does not depend on the line length of L2.

When the terminal on the port P2 side of the chip capacitor 4 is fixed to the ground potential, it can be seen that the reflection loss of the resonance circuit 20 does not depend on the line length of the microstrip line MSL1 on the port P1 side. Therefore, chip capacitor 4 can be arranged at an arbitrary position on microstrip line MSL.

As a result, when the resonance circuit 20 is used as an open stub for the bias circuit, the terminal of the chip capacitor 4 on the side closer to the FET is arbitrary except for a position λ / 4 away from the drain in the microstrip line MSL. And the terminal of the chip capacitor 4 on the side opposite to the FET is connected to an arbitrary position.

The resonance circuit 20 is connected to the bias circuit by 50.
When used as a stub terminated with Ω, the terminal of the chip capacitor 4 near the FET is connected to an arbitrary position of the microstrip line MSL, and the terminal of the chip capacitor 4 opposite to the FET is grounded.

When the resonance circuit 20 is actually used as a bias circuit, if the terminal on the port P2 side of the chip capacitor 4 is connected to the ground potential, no drain bias can be applied to this terminal. Therefore, the chip capacitor 4
Is grounded via a 12 pF bypass capacitor.

The chip capacitor 4 constituting the resonance circuit 20 may be provided on a linear portion of the microstrip conductor 3 as shown in FIG.
As shown in (b), the microstrip conductor 3 may be provided at a bent portion.

FIG. 19 is a diagram showing a bias circuit using a resonance circuit as an open stub. The drain of the FET 100 is connected to one end of the microstrip line MSL by a bonding wire W. Bias circuit 31
, The chip capacitor 4 is connected from the drain of the FET 100 to the λ /
It is arranged at any position except for the position 4 distances away. In this case, λ / 4 needs to include a value obtained by converting the bonding wire W to the length of the microstrip line. Microstrip line M opposite to FET 100
The drain bias Vd is applied to the portion of SL. FE
The length of the portion of the microstrip line MSL opposite to T100 is arbitrary.

In this case, the frequency at which the resonance circuit 20 is open is determined by the capacitance value of the chip capacitor 4. The terminal of the chip capacitor 4 on the side opposite to the FET 100 is preferably grounded via a bypass capacitor not shown in order to reduce noise. The output impedance is determined by the position of the chip capacitor 4 on the microstrip line MSL.

FIG. 20 is a diagram showing a bias circuit using a resonance circuit as a stub terminated with 50Ω. FET
The drain of 100 is connected to one end of the microstrip line MSL by a bonding wire W. In the bias circuit 32, the chip capacitor 4 is arranged at an arbitrary position on the microstrip line MSL. The terminal of the chip capacitor 4 on the side opposite to the FET 100 is grounded via a bypass capacitor BC. FET100
, A drain bias Vd is applied to a portion of the microstrip line MSL on the opposite side. The length of the microstrip line MSL from the drain of the FET 100 to the chip capacitor 4 is arbitrary. Further, since the terminal of the chip capacitor 4 on the side opposite to the FET 100 is fixed to the ground potential, the length of the microstrip line MSL on the side opposite to the FET 100 is arbitrary.

In this case, the frequency at which the resonance circuit 20 becomes 50Ω is determined by the capacitance value of the chip capacitor 4. The output impedance is determined by the position of the chip capacitor 4 on the microstrip line MSL.

FIG. 21 is a diagram showing a high-frequency processing circuit using a resonance circuit. In the high frequency processing circuit 60 of FIG. 21, the resonance circuit 20 is used as a stub terminated with 50Ω. The chip capacitor 4 is a microstrip line M
It is arranged at an arbitrary position of SL. The terminal of the chip capacitor 4 on the side opposite to the FET 100 is grounded. In the high-frequency processing circuit 60, an arbitrary frequency can be terminated at 50Ω by selecting the capacitance value of the chip capacitor 4. Thereby, the second harmonic, the third harmonic, the fourth harmonic,
Unwanted frequencies such as harmonics can be suppressed.

FIG. 22 is a diagram showing a matching circuit using a resonance circuit. In the matching circuit 70 of FIG. 22, the resonance circuit 20 is used as an open stub. The output impedance can be adjusted by adjusting the position of the chip capacitor 4 on the microstrip line MSL.

In the bias circuits 31 and 32, the high-frequency processing circuit 60 and the matching circuit 70, the chip capacitor 4 is used as a capacitor, but the MIM capacitor 8 shown in FIG. 4 may be used as a capacitor.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view of a resonance circuit according to a first embodiment of the present invention.

FIG. 2 is a plan view of the resonance circuit of FIG.

FIG. 3 is an equivalent circuit diagram of the resonance circuit of FIG.

FIG. 4 is a schematic sectional view of a resonance circuit according to a second embodiment of the present invention.

FIG. 5 is a plan view of the resonance circuit of FIG. 4;

FIG. 6 is a circuit diagram of a bias circuit using the resonance circuit of the first or second embodiment.

FIG. 7 is a circuit diagram of a feedback circuit using the resonance circuit of the first or second embodiment.

FIG. 8 is a circuit diagram illustrating an example of an amplifier using a feedback circuit including a resonance circuit according to the first or second embodiment.

FIG. 9 shows S for the amplifiers of Comparative Examples 1 and 2.
It is a figure showing the calculation result of the frequency dependence of ₂₁ and K.

FIG. 10 shows S for the amplifiers of Example and Comparative Example 1.
It is a figure showing the calculation result of the frequency dependence of ₂₁ and K.

FIG. 11 is a diagram illustrating calculation results of input / output power characteristics of the amplifiers of Comparative Example 1 and Comparative Example 2.

FIG. 12 is a diagram illustrating calculation results of input / output power characteristics of the amplifiers of the example and the comparative example 1.

FIG. 13 is a diagram illustrating a measurement circuit for measuring conditions when a resonance circuit is used as an open stub and a stub terminated with 50Ω in a bias circuit.

14 is a diagram illustrating a measurement result of frequency dependence of transmission characteristics in the measurement circuit of FIG. 13;

15 is a diagram showing a measurement result of a line length dependence of a microstrip line of transmission characteristics in the measurement circuit of FIG. 13;

16 is a diagram showing a measurement result of frequency dependence of a reflection characteristic in the measurement circuit of FIG.

17 is a diagram showing a measurement result of line length dependence of a microstrip line of reflection characteristics in the measurement circuit of FIG. 13;

FIG. 18 is a diagram illustrating an example in which a chip capacitor constituting a resonance circuit is provided in a linear portion of a microstrip conductor and an example in which a chip capacitor is provided in a bent portion.

FIG. 19 is a diagram showing a bias circuit using a resonance circuit as an open stub.

FIG. 20 is a diagram showing a bias circuit using a resonance circuit as a stub terminated by 50Ω.

FIG. 21 is a diagram illustrating a high-frequency processing circuit using a resonance circuit.

FIG. 22 is a diagram showing a matching circuit using a resonance circuit.

FIG. 23 is a circuit diagram showing an example of a conventional bias circuit.

FIG. 24 is a circuit diagram showing another example of a conventional bias circuit.

FIG. 25 is a circuit diagram showing an example of a conventional feedback circuit.

[Description of Signs] 1 Dielectric substrate 2 Ground conductor 3 Microstrip conductor 4 Chip capacitor 5 Dielectric 6,7 Electrode 8 MIM capacitor 9 Insulating layer 10 Metal layer 20 Resonant circuit 30 Bias circuit 40,50 Feedback circuit 100 FET MSL Micro Strip line C0 Capacitor

Claims (15)

[Claims] 1. An integrated circuit comprising: a microstrip line provided on a dielectric substrate; and a capacitor disposed on the microstrip line and connected to the microstrip line. 2. A resonance circuit, comprising: a microstrip line provided on a dielectric substrate; and a capacitor disposed on the microstrip line and connected to the microstrip line. 3. The microstrip line includes a microstrip conductor formed on a front surface of the dielectric substrate, and a ground conductor formed on a back surface of the dielectric substrate. And a pair of electrodes provided at both ends of the dielectric in a direction in which the microstrip conductor extends in a direction in which the microstrip conductor extends. 3. The resonance circuit according to claim 2, wherein: 4. The microstrip line includes a microstrip conductor formed on a surface of the dielectric substrate and a ground conductor formed on a back surface of the dielectric substrate. An insulating layer formed on the insulating layer, and a metal layer formed on the insulating layer, wherein one end of the metal layer in the extending direction of the microstrip conductor is connected to the microstrip conductor. The resonance circuit according to claim 2. 5. The length between a pair of electrodes of the capacitor connected to the microstrip conductor is set such that the microstrip line is inductive to a specific frequency. Item 3. The resonance circuit according to item 3. 6. The resonance circuit according to claim 5, wherein the capacitance value of the capacitor is set so that resonance occurs at the specific frequency. 7. The length of the metal layer in the extending direction of the microstrip conductor is set so that the microstrip line is inductive to a specific frequency. Resonance circuit. 8. The resonance circuit according to claim 7, wherein the capacitance value of the capacitor is set so that resonance occurs at the specific frequency. 9. A bias circuit for applying a bias to an electrode of a transistor, comprising: a dielectric substrate; a microstrip line provided on the dielectric substrate and connected to the electrode of the transistor; A capacitor connected to the microstrip line and disposed on the microstrip line, wherein the bias is applied to a portion of the microstrip line on a side opposite to the transistor with respect to the capacitor. 10. A bias circuit for applying a bias to an electrode of a transistor, comprising: a dielectric substrate; a microstrip line provided on the dielectric substrate and connected to the electrode of the transistor; And a capacitor connected to the microstrip line disposed thereon, wherein an electrode of the capacitor on the side opposite to the transistor is grounded at high frequency, and a portion of the microstrip line on the side opposite to the transistor with respect to the capacitor. Wherein the bias is applied to the bias circuit. 11. A feedback circuit provided between an output-side electrode and an input-side electrode of a transistor, comprising: a dielectric substrate; A feedback circuit, comprising: a microstrip line that feeds back to an input-side electrode; and a capacitor disposed on the microstrip line and connected to the microstrip line. 12. A high-frequency processing circuit connected to a predetermined node for suppressing a signal of a specific frequency, comprising: a dielectric substrate; and a microstrip provided on the dielectric substrate and connected to the predetermined node. And a capacitor disposed on the microstrip line and connected to the microstrip line, wherein an electrode of the capacitor on a side opposite to the predetermined node is grounded at a high frequency. Processing circuit. 13. A matching circuit connected to a predetermined circuit, comprising: a dielectric substrate; a microstrip line provided on the dielectric substrate and connected to the predetermined circuit; And a capacitor arranged and connected to the microstrip line. 14. A stub extending from a predetermined line and being open to a specific frequency, comprising: a dielectric substrate; and a micro stub provided on the dielectric substrate and extending from the predetermined line. A stub comprising: a strip line; and a capacitor disposed on the microstrip line and connected to the microstrip line. 15. A stub extending from a predetermined line and terminating the predetermined line with a predetermined impedance for a specific frequency, wherein the stub is provided on the dielectric substrate; And a capacitor disposed on the microstrip line and connected to the microstrip line, wherein an electrode of the capacitor on the opposite side of the predetermined line has a high frequency. A stub that is grounded.