JPH1154580A - Semiconductor evaluation unit and semiconductor production system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor evaluation unit which can analyze the impurity distribution in a sample or the surface profile of the sample accurately. SOLUTION: The semiconductor evaluation unit comprises a SCM measuring unit 1, and a control section 2. The control section 2 calibrates the initially inputted profile data at the forward end of a probe based on the SCM measurement of a reference sample and the simulation results thereof, performs an SCM measurement of a sample to be measured and estimates the impurity distribution based on the measurements. The CV characteristics of the sample to be measured are then operated based on the estimated impurity distribution. Subsequently, the impurity distribution is corrected such that the CV characteristics measured by the match the operated CV characteristics thus operating the CV characteristics again. The final impurity distribution when both CV characteristics match each other is outputted to a display or a printer. According to the arrangement, the impurity distribution can be analyzed with an accuracy finer than the dimensions at the forward end of the probe.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a technique for analyzing impurity distribution and surface shape of a semiconductor sample.

[0002]

2. Description of the Related Art One of the techniques for analyzing impurity distribution is S
There is CM (Scanning Capacitance Microscopy) measurement (J.
of Elec. Mat. vol 25, no2, p301, 1996). FIG. 30 is a block diagram showing the entire configuration of the conventional SCM measuring apparatus 1.
The SCM measuring apparatus 1 shown in FIG. 30 includes a stage 11 on which a sample 16 is placed, and an XY scanning the stage 11 in the XY directions.
A scanning circuit 12, a control circuit 13 for controlling the XY scanning circuit 12, a data storage unit 14 for storing measurement data, control data, and the like, a probe 17 whose tip 15 is in contact with the surface of a sample 16, 18 and a CV measuring device 19. The signal detected at the probe tip 15 is
After being input to the sensor 18 via the cantilever 20 at the base end and amplified, it is input to the CV measuring device 19 via the UHF transmission line L1.

[0003] The SCM measuring device 1 measures the capacitance based on the same principle as the UHF resonance capacitance sensor. When the probe tip 15 is placed on the sample 16, the probe tip 15, sensor 18, transmission line L1, and sample 16 all become part of the resonator. That is, a change in the capacitance C between the tip 15 of the probe and the sample 16 acts as a load to change the resonance frequency, and a slight change in the resonance frequency greatly changes the resonance amplitude. In this resonator, sensitivity of attofarads (10 ⁻¹⁸ F) is obtained.

[0004] The SCM measuring apparatus 1 shown in FIG. 30 gives a desired capacitance change in the sample 16 near the probe tip 15 by applying an electric field (AC bias in a kHz band) between the probe tip 15 and the sample 16. . The free carrier immediately below the probe tip 15 is attracted or repelled to the probe tip 15 by the AC bias. Such a depletion state and a storage state are equivalent to changing the distance between the capacitor flat plates. The depth change of the depletion layer, that is, the change in the distance between the flat plates of the capacitor, has three quantities: the strength of the applied electric field, the quality and thickness of the dielectric between the probe tip and the object to be measured (usually an oxide film), It is determined by the carrier concentration.

[0005] Carriers can be regarded as blocking or terminating the applied electric field. The stronger the electric field or the lower the carrier concentration, the more deeply the surface is depleted from the surface. Conversely, as the electric field is weaker or the carrier concentration is higher, the depletion electric field terminates near the surface.

If the semiconductor sample has a uniform impurity distribution and a dielectric film having two thicknesses, the depletion layer extends deeper than a thin oxide film formed on the sample surface. Similarly, for a sample having both a high carrier concentration region and a low carrier concentration region, the depletion layer becomes thicker in a region having a lower carrier concentration when compared at the same applied voltage.

[0007] The SCM measuring apparatus 1 shown in FIG. 30 measures the movement of a carrier.
Alternatively, a signal having a higher signal intensity is output as the surface oxide film is thinner. The signal obtained by the SCM measurement is dC / d
V, that is, a change in depletion layer capacitance with respect to a change in applied voltage. In the SCM measurement, since an AC voltage is applied to the sample surface, the above dV may be considered as a peak-to-peak voltage. In other words, dV can be considered as the amount of change in the entire depletion layer formed immediately below the probe tip.

The SCM measuring apparatus 1 shown in FIG. 30 outputs the relationship between the voltage V applied to the sample surface and the capacitance C in the form of a CV curve. More specifically, a capacitance modulation component dC when a constant amplitude voltage dV is applied to the sample is generated as an image. Also, the DC bias for the sample can be adjusted, and by adjusting the DC bias, the reference potential of the AC bias changes.

FIG. 31 shows a typical high-frequency CV of an n-type semiconductor.
FIG. 32 is a diagram showing characteristics, and in the case of a p-type semiconductor, the polarity of CV characteristics is opposite to that of FIG. As shown, when a positive bias voltage is applied to the gate terminal or the tip of the probe, electrons are attracted to the semiconductor surface and accumulated. In the accumulation state, it is the same as shortening the distance between the capacitor plates, and the total capacitance of the capacitor is a dielectric (often,
Oxide film).

On the other hand, as the voltage applied to the gate terminal or the tip of the probe is changed in the negative direction, the depletion layer expands and the capacitance decreases. Also, the lower the carrier concentration, the faster the depletion layer spreads, and the capacitance value sharply decreases with a change in voltage. Therefore, the lower the carrier concentration, the higher the C
The slope of the V curve increases. That is, the SCM measurement device can be considered as a CV characteristic inclination detector.

Incidentally, one of the techniques for analyzing the sample surface is AFM (Atomic Force Microscopy) measurement. FIG. 33 is a block diagram showing the overall configuration of a conventional AFM measuring device 5. As shown in FIG. The AFM measurement device 5 of FIG.
1 and a piezoelectric element (PZT) 23 on which the sample 22 is placed
XY scanning circuit 24 for scanning PZT 23 in XY directions
A control circuit 25 for controlling the XY scanning circuit 24; and a data storage unit 26 for storing measurement data, control data, and the like.
, A servo circuit 27 for controlling the PZT 23, a photodetector 28, a mirror 29, and a laser diode 30
And

The distance between the probe tip 31 and the sample 22 is 1
When changed in the range of μm to 100 angstroms, the following force acts between the probe tip 31 and the sample 22. At short distances (about 100 angstroms), interatomic forces are predominant, repulsive forces are applied up to 3-4 angstroms from the sample surface, and attractive forces are applied at distances farther than that. On the other hand, at a long distance, an electrostatic force due to an electric dipole of a charge or a polar substance or a magnetostatic force due to a magnetic charge acts as an attractive force.

In the AFM measuring apparatus 5 shown in FIG. 33, the unevenness of the sample surface is converted into the displacement of the cantilever 32 at the base end of the probe, and the displacement is detected by using the principle of optical leverage. That is, the probe tip 31 is irradiated with the laser diode 30, and the reflected light is detected by the photodetector 28. Then, the PZT2 is controlled by the servo circuit 27 so that the reflected light is focused on the central portion of the photodetector 28.
The sample 22 placed on the top 3 is moved up and down, and a signal for this up and down is converted into an image representing the shape of the sample surface.

[0014]

The SC shown in FIG.
Using the M measuring device 1, the impurity distribution in the sample can be analyzed, and using the AFM measuring device 5 in FIG. 33, the surface shape of the sample can be analyzed. However, conventional SCM measurement and AFM measurement using these devices have the following problems.

First, since the probe tip has a dimension of several hundred angstroms, it is practically impossible to measure the dimension of the probe tip to a value less than the dimension. Resolution is limited by the dimension of the probe tip in both SCM and AFM measurements. Is done. Also, SC
In the M measurement, the carrier density at the end of the depletion layer in the sample is determined assuming a parallel plate capacitor. However, in practice, since the shape of the probe tip is not large enough to be assumed to be a flat plate, an error occurs if the depletion layer end in the sample is assumed to be a parallel flat plate.

The present invention has been made in view of the above points, and has as its object to provide a semiconductor evaluation apparatus and a semiconductor manufacturing system capable of accurately analyzing the distribution of impurities in a sample and the shape of the sample surface. Is to provide.

[0017]

In order to solve the above-mentioned problems, the invention according to claim 1 comprises a capacitor C between a probe tip and a sample and a voltage V applied to the sample through the probe tip. In a semiconductor evaluation apparatus provided with an SCM measuring means for measuring a CV characteristic representing a relationship between the probe tip and the probe tip inputted in advance based on a result of measuring the CV characteristic for a reference sample having a known impurity distribution by the SCM measuring means. A probe shape calibrating means for calibrating the shape data of the probe, a comparison between a CV characteristic for the measurement sample calculated using the calibrated probe tip shape data, and a CV characteristic for the measurement sample measured by the SCM measuring means SCM simulation means for specifying the impurity distribution in the measurement sample based on the result.

According to a second aspect of the present invention, in the semiconductor evaluation apparatus according to the first aspect, as a result of performing the processing by the SCM simulation means, the impurity distribution in the measurement sample is reduced by one.
Impurity distribution specification determining means for determining whether or not the type has been specified; and SCM measurement condition correcting means for correcting the measurement conditions in the SCM measurement means when it is determined that the impurity distribution has not been specified for one type; And the SC
The M simulation means specifies an impurity distribution based on a result of comparison with a CV characteristic of the measurement sample measured by the SCM measurement means under the corrected measurement conditions.

According to a third aspect of the present invention, in the semiconductor evaluation device according to the first or second aspect, the gate-substrate capacitance, the gate-source capacitance, the gate-drain capacitance, the threshold value, the drain, An electric characteristic measuring unit for measuring electric characteristics including at least one of a current, a substrate current, and a gate current; an electric characteristic calculated based on an impurity distribution specified by the SCM simulation unit; The SCM based on the result of comparison with the electrical characteristics measured by the mechanical characteristics measuring means.
Electric characteristic simulation means for correcting the impurity distribution specified by the simulation means.

According to a fourth aspect of the present invention, in the semiconductor evaluation device according to the first or second aspect, it is determined whether or not the impurity distribution in the measurement sample is specified as one type as a result of performing the processing by the SCM simulation means. A first impurity distribution specifying determination unit that determines whether the number of corrections of the measurement condition in the SCM measurement unit is within a predetermined number of times when it is determined that the impurity distribution is not specified as one type; The measurement condition correction number determination means, and if the number of corrections is within the predetermined number of times, the measurement condition in the SCM measurement means is corrected. Board-to-board capacitance,
Electrical characteristic measuring means for measuring electrical characteristics including at least one of a gate-source capacitance, a gate-drain capacitance, a threshold value, a drain current, a substrate current, and a gate current, and the electrical characteristic measuring means And correcting the impurity distribution specified by the SCM simulation means on the basis of a comparison result between the electric characteristics measured by the SCM and the electric characteristics calculated based on the impurity distribution specified by the SCM simulation means. Characteristic simulation means, second impurity distribution specification determination means for determining whether or not the impurity distribution in the measurement sample has been specified to one type as a result of processing by the electrical characteristic simulation means; When it is determined that the impurity distribution has not been identified as one type by the impurity distribution specifying determination means, And Characteristics condition correction means for correcting the measurement conditions in the serial electrical characteristic measuring means comprises, impurity distribution is 1 by the first impurity distribution specification judging means
When it is determined that the impurity distribution is specified as the type, the impurity distribution specified by the SCM simulation unit is set as a final impurity distribution, and it is determined that the impurity distribution is not specified as one type by the first impurity distribution specification. And the impurity distribution is determined to be 1 by the second impurity distribution specifying determination means.
If it is determined that the impurity distribution is specified, the impurity distribution corrected by the electric characteristic simulation means is used as a final impurity distribution.

According to a fifth aspect of the present invention, in the semiconductor evaluation apparatus according to any one of the first to fourth aspects, the probe shape calibrating means sets a CV characteristic for the reference sample to the SC value.
Reference CV characteristic measuring means for measuring by the M measuring means, first device simulation means for calculating CV characteristics for the reference sample based on the input probe tip shape data, and measurement by the reference CV characteristic measuring means Probe tip shape used to correct the probe tip shape data used in the calculation by the first device simulation means so that the calculated CV characteristic matches the CV characteristic calculated by the first device simulation means. Correction means.

According to a sixth aspect of the present invention, in the semiconductor evaluation apparatus according to any one of the first to fifth aspects, the SCM simulating means performs measurement based on a CV characteristic of the measurement sample measured by the SCM measuring means. Impurity distribution estimating means for estimating the impurity distribution in the sample, the probe tip shape data calibrated by the probe shape calibrating means, and the CV for the measurement sample based on the impurity distribution estimated by the impurity distribution estimating means. Second device simulation means for calculating characteristics, the SCM
The CV characteristic of the measurement sample measured by the measurement means and the CV calculated by the second device simulation means
And an impurity distribution correcting means for correcting the impurity distribution estimated by the impurity distribution estimating means so that the V characteristics coincide with each other.

According to a seventh aspect of the present invention, in the semiconductor evaluation device according to any one of the first to fifth aspects, the SCM simulation means calculates an impurity distribution in the measurement sample based on predetermined manufacturing conditions. Simulation means; second device simulation means for calculating CV characteristics for the measurement sample based on the probe tip shape data calibrated by the probe shape calibration means and the impurity distribution calculated by the process simulation means; Correcting the manufacturing conditions used in the calculation by the process simulation means so that the CV characteristics of the measurement sample measured by the SCM measurement means match the CV characteristics calculated by the second device simulation means. And a PS parameter correcting means for performing the setting.

According to an eighth aspect of the present invention, there is provided a semiconductor evaluation apparatus provided with AFM measuring means for analyzing a surface shape of a sample based on a force acting between a tip of a probe placed above the sample and the sample. Based on the result of measurement of the surface shape of the sample by the AFM measurement means, the calculation was performed using probe shape calibration means for calibrating the probe tip shape data input in advance, and the calibrated probe tip shape data. AFM simulation means for specifying the surface shape of the measurement sample based on a comparison result between the surface shape of the measurement sample and the surface shape of the measurement sample measured by the AFM measurement means.

According to a ninth aspect of the present invention, in the semiconductor evaluation apparatus according to the eighth aspect, as a result of performing the processing by the AFM simulation means, it is determined whether or not the surface shape of the measurement sample is specified to one type. A shape specification determination unit; and an AFM measurement condition correction unit that corrects a measurement condition by the AFM measurement unit when it is determined that the surface shape is not specified as one type. The surface shape of the measurement sample is specified based on a comparison result with the surface shape measured by the AFM measurement unit under the measurement conditions set.

According to a tenth aspect of the present invention, in the semiconductor evaluation apparatus according to the eighth or ninth aspect, it is determined whether or not the surface of the measurement sample is flat based on a result of the measurement by the AFM measuring means. The AFM
The simulation means performs the arithmetic processing only when the surface flatness determination means determines that the surface is not flat.

According to an eleventh aspect of the present invention, in the semiconductor evaluation apparatus according to any one of the eighth to tenth aspects, the AFM simulation means includes a step of: determining a surface shape of the measurement sample measured by the AFM measurement means; A third device simulation unit for calculating a surface shape of the measurement sample based on the probe tip shape data calibrated by the calibration unit, a surface shape measured by the AFM measurement unit, and the third device simulation So that the surface shape calculated by the means matches
Surface shape correction means for correcting the surface shape data used in the calculation by the third device simulation means.

According to a twelfth aspect of the present invention, in the semiconductor evaluation device according to any one of the eighth to tenth aspects, the AFM simulation means calculates a surface shape of the measurement sample based on predetermined manufacturing conditions. Means, a surface shape measured by the AFM measuring means,
A manufacturing condition correcting unit for correcting manufacturing conditions used in the calculation by the shape simulation unit so that the surface shape calculated by the shape simulation unit matches the surface shape.

According to a thirteenth aspect of the present invention, there is provided a semiconductor manufacturing system including a semiconductor manufacturing apparatus for manufacturing a semiconductor device in lots, wherein the electrical characteristics of the semiconductor device manufactured by the semiconductor manufacturing apparatus are measured. The semiconductor evaluation device according to claim 1, wherein at least one of an impurity distribution and a surface shape is analyzed for the measuring device and the semiconductor device in which an abnormality is detected in the electric characteristics by the electric characteristic measuring device. And manufacturing conditions back-extracted based on the analysis result by the semiconductor evaluation device;
A manufacturing condition error detecting means for detecting a deviation from the manufacturing condition in the semiconductor manufacturing apparatus; and a manufacturing condition for changing the manufacturing condition in the semiconductor manufacturing apparatus based on the manufacturing condition error detected by the manufacturing condition error detecting means. Changing means.

The invention of claim 1 will be described with reference to, for example, FIGS. 1 to 5. "SCM measuring means" corresponds to the SCM measuring apparatus 1, "probe shape correcting means" corresponds to the flowchart of FIG. Simulation means ”
Corresponds to the flowchart of FIG.

The invention of claim 2 will be described with reference to FIG. 6, for example. The "impurity distribution specification determining means" corresponds to step S44 in FIG. 6, and the "SCM measurement condition correcting means" corresponds to step S45 in FIG. I do.

The invention according to claim 3 will be described with reference to FIGS. 7 to 10, for example. "Electrical characteristic measuring means" corresponds to the electric characteristic evaluation device 4, and "electric characteristic simulation means" corresponds to FIG. 10 corresponds to the flowchart of FIG.

The invention according to claim 4 will be described with reference to, for example, FIGS. 7 to 11. The "first impurity distribution specification determining means" is step S84 in FIG. 11, and the "simulation accuracy determining means" is step S85 in FIG. The "SCM measurement condition correcting means" is in step S86, the "electrical characteristic measuring means" is in the electrical characteristic evaluation device 4, the "electrical characteristic simulation means" is in step S88, and the "second impurity distribution characteristic determination". The "means" corresponds to step S89, and the "electrical characteristic condition correcting means" corresponds to step S91.

The invention of claim 5 will be described with reference to FIG. 3, for example. The "reference CV characteristic measuring means" is in step S11 in FIG. 3, the "first device simulation means" is in step S13, and the "probe "Tip shape correcting means" corresponds to step S15.

The invention according to claim 6 will be described with reference to FIG. 4, for example.
1, the "second device simulation means" goes to step S22, and the "impurity distribution correction means" goes to step S2.
4 respectively.

The invention of claim 7 will be described with reference to FIG. 5, for example. "Process simulation means" is step S31, "second device simulation means" is step S32, "PS parameter correction means"
Corresponds to step S34.

The invention of claim 8 will be described with reference to, for example, FIG. 13. "Probe shape calibration means" corresponds to step S101, and "AFM simulation means" corresponds to step S103.

The invention of claim 9 will be described with reference to, for example, FIG. 17. "Surface shape specification determining means" corresponds to step S134, and "AFM measurement condition correcting means" corresponds to step S134.
135 respectively.

The tenth aspect of the present invention will be described with reference to FIG. 19, for example.
143.

The third aspect of the invention will be described with reference to, for example, FIG. 15. "Third device simulation means" corresponds to step S111, and "surface shape correction means" corresponds to step S113.

The invention according to claim 12 will be described with reference to FIG. 16, for example. The "shape simulation means" corresponds to step S121, and the "manufacturing condition correcting means" corresponds to step S121.
124 respectively.

The invention of claim 13 is applied to, for example, FIGS.
"Electrical characteristic measuring means" corresponds to step S233 in FIG. 26, and "semiconductor evaluating means" corresponds to FIG.
7, "manufacturing condition error detecting means" corresponds to step S255 in FIG. 27, and "manufacturing condition changing means" corresponds to step S236 in FIG.

[0043]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a semiconductor evaluation apparatus and a semiconductor manufacturing system to which the present invention is applied will be specifically described with reference to the drawings.

[First Embodiment] FIG. 1 is a schematic configuration diagram of a first embodiment of a semiconductor evaluation apparatus according to the present invention.
The semiconductor evaluation device of FIG. 1 includes an SCM measurement device 1 having the same configuration as in FIG. 30, a control unit 2 that controls the SCM measurement device 1,
A data storage unit 3 for storing data measured by the SCM measuring device 1, control data for controlling the control unit 2, and the like.

FIG. 2 is a flowchart showing the main processing performed by the control unit 2. In step S1 of FIG. 2, a probe shape calibration process shown in detail in FIG. 3 is performed. In this process, the shape data of the probe tip input initially is calibrated based on the SCM measurement result for the reference sample. The calibrated data is used in an SCM simulation process described later. Details of the probe shape calibration processing will be described later.

Next, in step S2 of FIG. 2, SCM measurement is performed using the SCM measuring device 1, and the CV characteristic of the measurement sample is detected. In step S3, an SCM simulation process detailed in FIG. 4 or FIG. 5 is performed. In this process, the CV characteristic of the measurement sample is calculated based on the impurity distribution estimated based on the measurement result by the SCM measurement device 1, and the calculated CV characteristic matches the CV characteristic obtained by the SCM measurement. To correct the impurity distribution.
Next, in step S4, the corrected impurity distribution is converted into image data and numerical data, and output to a display device or a printer (not shown).

Next, the detailed operation of the probe shape calibration process in step S1 of FIG. 2 will be described with reference to the flowchart of FIG. In step S11, SCM measurement is performed on a reference sample having a known impurity distribution. Next, in step S12, initial shape data of the probe tip is input.

Next, in step S13, a device simulation process is performed. In this processing, Poisson equation, current continuous equation, and current density equation are solved using the shape of the probe tip, the shape of the reference sample, the impurity concentration in the reference sample, and the applied voltage V as input parameters. By solving these equations, the potential distribution in the probe tip, the inside of the reference sample, and the space between the probe tip and the reference sample are calculated, and the carrier concentration distribution in the reference sample is also calculated. Further, the capacitance C between the tip of the probe and the reference sample is calculated from the temporal changes of the potential distribution and the carrier concentration distribution.

As described above, in the device simulation process, the CV characteristic between the probe tip and the reference sample is calculated based on the shape data of the tip of the probe, the impurity distribution in the reference sample, and the like. That is, the SCM measurement process itself is simulated by the device simulation process.

Next, in step S14, the CV characteristic obtained by the SCM measurement in step S11 in FIG. 3 is compared with the CV characteristic calculated in step S13. Modify the shape. Here, a numerical derivative is calculated from a change amount of the capacitance C with respect to a change in the shape data of the probe tip expressed numerically, and the shape data of the probe tip is corrected by the Newton method. Alternatively, the shape of the probe tip is described in the form of a function such as a Gaussian distribution, a complementary error function, a spline function, or a Fourier series. The shape data of the probe tip is corrected by the method.

On the other hand, when the comparison results of the CV characteristics match in the process of step S14, the process of calibrating the probe tip shape ends, and the process returns to step S2 in FIG.

Next, the detailed operation of the SCM simulation processing shown in step S3 of FIG. 2 will be described with reference to the flowchart of FIG. In step S21 of FIG.
Based on the carrier concentration distribution output from the CM measurement device 1 and, for example, a constant np product condition or a charge neutralization condition,
The impurity distribution Ninit in the measurement sample is estimated. Next, in step S22, using the estimated impurity distribution Ninit, a device simulation process is performed as in step S13 in FIG. 3 to simulate the SCM measurement itself.

Next, in step S23, the CV characteristic measured by the SCM measuring device 1 is compared with the CV characteristic calculated by the device simulation processing. If the comparison results do not match, the process proceeds to step S24 in FIG. To correct the impurity distribution. Here, the impurity distribution is expressed numerically, a numerical derivative is calculated from the amount of change in the capacitance C with respect to the change in the converted impurity distribution, and the impurity distribution is corrected by the Newton method. Alternatively, a Gaussian distribution,
The impurity distribution is described by a functional form such as a complementary error function, a spline function, and a Fourier series. For example, a numerical derivative is calculated from a change amount of the capacitance C with respect to a change in the parameter of the functional form, and the impurity distribution is corrected by the Newton method.

On the other hand, if the CV characteristic measured by the SCM measuring device 1 matches the CV characteristic calculated by the device simulation processing, the process proceeds to step S4 in FIG.

FIG. 5 is a detailed flowchart showing a modification of the SCM simulation process. Step S in FIG.
At 31, a process simulation process is performed. In this process, the initial value of the impurity distribution is calculated using the manufacturing conditions as an initial input. More specifically, for example, ion implantation calculation is performed by inputting the ion implantation energy and impurity dose of the impurity, and the oxidation / diffusion time is input and the oxidation / diffusion equation is solved, so that the impurity in the measurement sample is obtained. Calculate the distribution.

Next, in step S32, a device simulation process is performed using the calculated impurity distribution in the same manner as in step S22 in FIG. 4 to simulate the SCM measurement itself.

Next, in step S33, the CV characteristic measured by the SCM measuring apparatus 1 is compared with the CV characteristic calculated by the device simulation process. If the two coincide, the process proceeds to step S4 in FIG. If they do not match, the process proceeds to step S34 to correct the input parameters (PS parameters) in the process simulation processing. Here, for example, a numerical derivative is calculated from a change amount of the CV characteristic with respect to a change of various input parameters used in the process simulation process in step S31, and the input parameters used in the process simulation process, such as diffusion temperature and diffusion, are calculated by Newton's method. The amount of correction such as the time, the amount of impurities for ion implantation, and the energy for ion implantation is determined.

As described above, in the first embodiment, the SCM
The CV characteristic measured by the measuring device 1 and the CV characteristic calculated based on the measurement result by the SCM measuring device 1 are compared, and the impurity distribution is corrected until the two coincide with each other. The impurity distribution can be detected with the following resolution. Further, since the SCM simulation process is performed after the shape data of the probe tip is calibrated, the reliability of the simulation is improved.

[Second Embodiment] In the second embodiment, S
If the impurity distribution cannot be uniquely specified even after performing the CM simulation processing, the measurement conditions are changed and the SCM measurement is performed again. FIG. 6 is a flowchart illustrating a main process of the semiconductor evaluation device according to the second embodiment. Steps S41 to S43 in FIG. 6 perform the same processing as steps S1 to S3 in FIG. In step S44,
It is determined whether the impurity distribution has been uniquely specified. That is, in step S44, when the SCM simulation processing shown in detail in FIG. 4 or FIG. 5 is performed, if the impurity distribution candidates cannot be narrowed down to one and a plurality of candidates exist, the impurity distribution is reduced. Judge that it cannot be uniquely identified.

If the impurity distribution cannot be uniquely specified, the flow advances to step S45 to correct the SCM measurement conditions. Here, the measurement conditions at the time of the SCM measurement, for example, the frequency, the voltage amplitude, and the like are changed, and the process returns to step S42 to perform the SCM measurement again. On the other hand, if the impurity distribution has been uniquely identified, the process proceeds to step S46, and a process of outputting the final impurity distribution to a display device, a printer, or the like is performed.

As described above, in the second embodiment, the SCM
If the impurity distribution cannot be uniquely specified even by performing the simulation processing, the measurement conditions at the time of the SCM measurement are changed and the SCM measurement is performed again, so that the impurity distribution can be narrowed down to one.

[Third Embodiment] In the third embodiment, S
After the impurity distribution is obtained by the CM simulation process, the electrical characteristics are measured and the simulation is performed to correct the impurity distribution.

FIG. 7 is a schematic configuration diagram of a third embodiment of the semiconductor evaluation device according to the present invention. The apparatus of FIG. 7 is characterized in that an electrical property evaluation device 4 for measuring the electrical properties of a measurement sample is newly added.

FIG. 8 is a flow chart showing the main processing in the third embodiment of the semiconductor evaluation device. In steps S51 to S53 in FIG. 8, steps S1 to S53 in FIG.
The same processing as in step 3 is performed. When the impurity distribution is calculated by the SCM simulation process in step S53, the process proceeds to step S54, where the electrical characteristic measurement process is performed. In this process, for example, the electrical characteristic evaluation device 4 uses the gate-substrate capacitance, the gate-source capacitance, the gate-drain capacitance, the threshold value, the drain current, the substrate current,
And electrical characteristics such as gate current.

Next, in step S55, FIG. 9 or FIG.
An electrical characteristic simulation process detailed in FIG. In this process, a high-resolution impurity distribution is obtained by simulating the electrical characteristics themselves measured in the electrical characteristics measurement process. The details of the electrical characteristic simulation processing will be described later. Next, step S56
Then, a process of outputting the impurity distribution obtained in step S55 to a display device, a printer, or the like is performed.

Next, the details of the electric characteristic simulation processing in step S55 in FIG. 8 will be described with reference to the flowchart in FIG. In step S61 of FIG. 9, FIG.
Using the impurity distribution NSCM obtained by the SCM simulation processing of step S53 of FIG.
In the same manner as in 3, the device simulation process is performed to calculate the electrical characteristics.

Next, in step S62, the measured values of the electrical characteristics obtained in step S54 in FIG.
Compare with the electrical characteristics calculated in step 1. If the two do not match, the process proceeds to step S63 to correct the impurity distribution, and then the device simulation process in step S61 is repeated. If the two match, the process proceeds to step S5 in FIG.
Proceed to 6 to output the impurity distribution.

FIG. 10 is a detailed flowchart showing a modification of the electric characteristic simulation process. Step S
At 71, a process simulation process is performed using the manufacturing conditions as an initial input, as in step S31 of FIG.
Calculate the initial value of the impurity distribution. Next, in step S72, a device simulation process is performed using the calculated impurity distribution to simulate the measurement of the electrical characteristics.

Next, in step S73, the electrical characteristics actually measured in step S54 in FIG. 8 are compared with the electrical characteristics calculated by the device simulation process, and if they match, the process proceeds to step S56 in FIG. If they do not match, the process proceeds to step S74, where the input parameters (PS parameters) in the process simulation processing, such as the diffusion temperature and the diffusion time, are corrected, and then the process simulation processing in step S71 is repeated.

As described above, in the third embodiment, the SCM
After the impurity distribution is obtained by the simulation process, the impurity distribution is corrected based on the measured values of the electrical characteristics and the simulation result, so that a more accurate impurity distribution can be obtained.

[Fourth Embodiment] In the fourth embodiment, the S
Only when the CM simulation process does not provide a sufficiently accurate impurity distribution, the impurity distribution is corrected based on the measurement of the electrical characteristics and the simulation result.

FIG. 11 is a flowchart showing the main processing in the fourth embodiment of the semiconductor evaluation device. FIG.
In steps S81 to S83 of FIG.
The same processing as that of S3 is performed. Next, in step S84,
It is determined whether or not the impurity distribution has been uniquely specified by the SCM simulation processing in step S83. If uniquely identified, the process proceeds to step S90 to perform a process of outputting an impurity distribution. On the other hand, if the impurity distribution cannot be uniquely specified, the process proceeds to step S85. In step S85, it is determined whether or not the number of corrections of the SCM measurement condition is within a predetermined number. If the number of corrections is within the predetermined number, the process proceeds to step S86 to change the SCM measurement conditions, such as the frequency and the voltage amplitude, and then perform the SCM measurement process in step S82 again. On the other hand, SCM
If the number of corrections of the measurement conditions exceeds a predetermined number of times, that is, if the impurity distribution cannot be uniquely specified by correcting the SCM measurement conditions within the predetermined number of times, the electric characteristic measurement processing and the electric simulation described below will be performed. Perform processing.

First, in step S87, an electrical characteristic measurement process is performed, and then, in step S88, an electrical characteristic simulation process is performed. This step S87, S
The process at 88 is the same as the process at steps S54 and S55 in FIG.

Next, in step S89, step S84
Similarly to the above, it is determined whether or not the impurity distribution has been uniquely specified. If the impurity distribution can be specified, the process proceeds to step S90, and if not, the process proceeds to step S91 to correct the electrical characteristic measurement conditions. Here, for example, the capacitance C
Correct the measurement conditions such as frequency and applied voltage for measuring
Again, the electrical characteristic measurement processing of step S87 is performed.

As described above, in the fourth embodiment, the SCM
Only when the impurity distribution cannot be uniquely identified even after performing the simulation processing, the impurity distribution is corrected based on the measurement result of the electrical characteristics and the comparison result with the simulation result, so that the final impurity distribution can be obtained. Processing time up to

[Fifth Embodiment] In the fifth embodiment, A
The shape of the sample surface is accurately extracted based on a comparison result between the shape of the measurement sample surface actually measured by the FM measurement and the shape of the measurement sample surface calculated by the simulation.

FIG. 12 is a schematic configuration diagram of a fifth embodiment of the semiconductor evaluation apparatus according to the present invention. The device of FIG.
The feature is that an AFM measuring device 5 is provided instead of the SCM measuring device 1.

FIG. 13 is a flow chart showing the main processing in the fifth embodiment of the semiconductor evaluation device. In step S101, a probe shape calibration process is performed to specify the shape of the probe tip. Here, the shape of the tip of the probe is specified based on the result of measuring the surface shape of the reference sample by the AFM measuring device 5 and the simulation result.

Next, in step S102, AFM measurement processing is performed by the AFM measurement device 5, and the result of actual measurement of the surface shape of the measurement sample is output. Next, in step S103, AFM simulation processing shown in detail in FIG. 14 or FIG. 15 is performed, and the surface shape of the measurement sample actually measured by the AFM measurement device 5 is corrected. Next, step S104
Then, the corrected surface shape is converted into image data or numerical data and output to a display device, a printer, or the like.

Next, the detailed operation of the probe shape calibration correction processing in step S101 in FIG. 13 will be described with reference to the flowchart in FIG. In step S105, AFM measurement is performed on a reference sample having a known surface shape.
Next, in step S106, initial shape data of the probe tip is input. Next, in step S107, a device simulation process is performed. In this process, the distribution of the electromagnetic field between the probe tip and the reference sample is calculated by solving the electromagnetic field equations such as Poisson's equation and Maxwell's equation using the shape of the probe tip and the surface shape of the reference sample as input parameters. Further, a force (atomic force) acting between the tip of the probe and the reference sample is calculated based on a time change of the electromagnetic field.

As described above, in the device simulation process, the interatomic force between the probe tip and the reference sample surface is calculated based on the shape data of the tip of the probe, the surface distribution of the reference sample, and the like. That is, the AFM in step S105 is performed by the device simulation process.
A simulation of the measurement itself is performed.

Next, in step S108, step S1
The atomic force obtained by the AFM measurement in 05 and the atomic force calculated in step S107 are compared, and if they do not match, the process proceeds to step S109 to correct the probe shape. Here, a numerical derivative is calculated from a change in the atomic force with respect to a change in the shape data of the probe tip expressed numerically, and the shape data of the probe tip is corrected by the Newton method. Alternatively, change the shape of the probe tip
Describe in a functional form such as Gaussian distribution, complementary error function, spline function, Fourier series, etc.For example, calculate the numerical derivative from the change in atomic force with respect to the change in the parameter of the functional form, and use the Newton method to calculate the shape of the probe tip Modify the data.

On the other hand, if the comparison results of the atomic forces match in step S108, the process of calibrating the probe tip shape ends, and the process returns to step S102 in FIG.

Next, the AF shown in step S103 of FIG.
The detailed operation of the M simulation processing will be described based on the flowchart of FIG. Step S11 in FIG.
In step 1, device simulation processing is performed as in step S107 in FIG. 14 to simulate the AFM measurement itself.

Next, in step S112, the surface shape of the measurement sample actually measured by AFM measurement is compared with step S11.
13 is compared with the surface shape of the measurement sample calculated by the device simulation process of FIG.
To S104, and if they do not match, step S1
Proceeding to 13, the surface shape of the measurement sample is corrected. Here, the surface shape of the measurement sample is represented numerically, and for example, a numerical derivative is calculated from the change in the atomic force calculated by the device simulation process for the change in the numerical value, and the device simulation process is performed by the Newton method. Modify the input parameters used.

FIG. 16 is a detailed flowchart showing a modification of the AFM simulation process. Step S12
In step 1, a shape simulation process is performed. In this shape simulation process, manufacturing conditions are used as initial inputs,
Calculate data on the surface shape of the measurement sample. Next, in step S122, a device simulation process is performed using the result of step S121 to calculate the surface shape of the measurement sample.

In step S123, similarly to step S112 of FIG. 15, the surface shape actually measured by the AFM measurement is compared with the surface shape calculated by the device simulation process in step S122. The process proceeds to step S104 of FIG. 13, and if they do not match, the process proceeds to step S124 to correct the input parameters in the shape simulation process. Here, for example, a numerical derivative is obtained from a change amount of the primitive force with respect to a change of the input parameter in the shape simulation process, and a correction amount of the input parameter is determined by the Newton method. Then, the shape simulation process is performed again in step S121 using the corrected parameters.

As described above, in the fifth embodiment, the AFM
In order to correct the sample surface shape measured by the measurement with the sample surface shape calculated by simulation,
The sample surface shape can be detected with a resolution equal to or smaller than the dimension of the probe tip.

[Sixth Embodiment] In the sixth embodiment, A
This is to determine whether or not the surface shape of the measurement sample has been uniquely specified by the FM simulation processing.

FIG. 17 is a flowchart showing the main processing in the sixth embodiment of the semiconductor evaluation device. FIG.
Steps S131 to S133 of FIG. 7 perform the same processing as steps S101 to S103 of FIG. Step S1
At 34, it is determined whether or not the surface shape of the measurement sample has been uniquely specified. That is, in step S134, FIG.
When the AFM simulation processing shown in detail in FIG. 5 or FIG. 16 is performed, if the surface shape candidates of the measurement sample cannot be narrowed down to one and there are a plurality of candidates, the surface shape cannot be uniquely specified. Judge.

If the surface shape can be uniquely specified, the process proceeds to step S135 to output the surface shape to a printer or the like. If the surface shape cannot be uniquely specified, the process proceeds to step S136 to perform AFM measurement. Modify the conditions. Here, for example, after changing the measurement conditions such as the distance between the probe tip and the sample and the speed at which the sample is moved,
Returning to step S132, the AFM measurement process is performed again.

As described above, in the sixth embodiment, the AFM
If the surface shape of the measurement sample could not be uniquely specified even after performing the simulation processing, the AFM measurement conditions were changed and the AFM measurement was performed again. The shape can be selected.

[Seventh Embodiment] In the seventh embodiment, A
While performing FM measurement and SCM measurement in combination,
If the measurement sample surface is determined to be flat by the FM measurement, the AFM simulation processing is omitted.

FIG. 18 is a schematic configuration diagram of a semiconductor evaluation device according to a seventh embodiment of the present invention. The device of FIG.
It is characterized in that it has both the SCM measuring device 1 and the AFM measuring device 5.

FIG. 19 is a flow chart showing the main processing in the seventh embodiment of the semiconductor evaluation device. FIG.
Ninth steps S141 and S142 perform the same processing as steps S101 and S102 in FIG. In the probe shape calibration process in step S141, calibration may be performed using the SCM reference sample in step S1 in FIG. 2 other than the method using the AFM measurement reference sample in step S101 in FIG.

In step S143 of FIG. 19, it is determined whether or not the surface of the measurement sample is flat based on the measurement result of the surface shape by the AFM measurement device 5. If the surface of the measurement sample is not flat, the process proceeds to step S144, and FIG.
The AFM simulation processing shown in FIG. 3 is performed. If the surface of the measurement sample is flat, the AFM simulation processing is omitted and the process proceeds to step S135.

As a criterion for judging whether or not the surface of the measurement sample is flat, for example, if the square root of the product of the height and the pitch of the irregularities on the surface of the measurement sample is smaller than the resolution of the probe, it is judged that the surface is flat. .

Thereafter, in steps S145 to S147,
As in steps S2 to S4 in FIG.
Is corrected by the SCM simulation process.

As described above, in the seventh embodiment, when the surface is not smooth, the SCM simulation in which the surface of the measurement sample is taken into account by the AFM measurement and the AFM simulation is performed. Can be done.

[Eighth Embodiment] In the eighth embodiment, A
In addition to performing the FM measurement and the SCM measurement in combination, if the simulation result in each measurement cannot be uniquely specified, the measurement conditions are changed and the measurement is performed again.

FIG. 20 is a flowchart showing the main processing in the eighth embodiment of the semiconductor evaluation apparatus. FIG.
0 in step S151, step S101 in FIG.
Similarly, the probe shape calibration process is performed. Or Figure 2
May be calibrated using the SCM reference sample in step S1. Next, in step S152, an initial AFM measurement process is performed. In this process, the surface shape of the measurement sample is actually measured by the AFM measurement device 5.

Next, in step S153, it is determined whether or not the surface of the measurement sample is flat. If the surface of the measurement sample is not flat, the process proceeds to step S154, and an AFM simulation process shown in detail in FIG. 15 or 16 is performed. Next, in step S155, it is determined whether or not the surface shape of the measurement sample has been uniquely specified. , The scanning speed of the sample, etc.), the process proceeds to step S157, and A
AFM measurement is performed by the FM measurement device 5. Then, the process returns to step S154 based on the measurement result, and AF is performed again.
Perform M simulation processing.

On the other hand, if it is determined in step S153 that the surface is flat, or if the surface shape can be uniquely specified in step S155, the flow advances to step S158 to proceed to SCM.
The SCM measurement is performed by the measurement device 1 to detect the impurity distribution in the measurement sample. Next, in step S159, FIG.
Alternatively, an SCM simulation process shown in detail in FIG. 5 is performed to detect an impurity distribution with high resolution.

Next, in step S160, it is determined whether or not the impurity distribution has been uniquely specified by the SCM simulation process.
Proceeding to 161, measurement conditions for SCM measurement (for example,
After correcting the frequency, the voltage amplitude, etc.), step S15
8 and repeat the SCM measurement process. On the other hand, if the impurity distribution can be uniquely specified by the SCM simulation process, the process proceeds to step S162 to perform a process of outputting the impurity distribution and the surface shape to a display device, a printer, or the like.

As described above, in the eighth embodiment, when the surface shape cannot be uniquely specified even by performing the AFM simulation processing, the measurement conditions are changed, the AFM measurement is performed again, and the SCM simulation processing is performed. Even if the impurity distribution cannot be uniquely specified, the measurement conditions are changed and the SCM measurement is performed again, so that both the surface shape of the measurement sample and the impurity distribution in the measurement sample can be accurately detected.

[Ninth Embodiment] In the ninth embodiment, after detecting the surface shape of the measurement sample and the impurity distribution in the measurement sample, the ninth embodiment is based on the result of the measurement of the electrical characteristics and the comparison with the simulation result. , To correct the impurity distribution.

FIG. 21 is a schematic configuration diagram of a ninth embodiment of the semiconductor evaluation apparatus according to the present invention. The device of FIG.
It is characterized by having an SCM measurement device 1, an AFM measurement device 5, and an electrical characteristic evaluation device 4.

FIG. 22 is a flowchart showing the main processing in the ninth embodiment of the semiconductor evaluation device. In steps S171 to S176, step S14 in FIG.
By performing the same processing as in steps 1 to S146, the surface shape of the sample and the impurity distribution in the sample are detected with high resolution.

Next, in steps S177 to S179, the same processing as in steps S54 to S56 in FIG. 8 is performed, and the impurity distribution is corrected based on the result of the measurement of the electric characteristics and the comparison with the simulation result. Detects a higher resolution and more accurate impurity distribution.

[Tenth Embodiment] In the tenth embodiment, it is determined whether or not a simulation result is uniquely specified in each of the AFM simulation processing, the SCM simulation processing, and the electric characteristic simulation processing. Things.

FIGS. 23 and 24 are flowcharts showing the main processing in the tenth embodiment of the semiconductor evaluation device. In steps S201 to S207 of FIG.
As in steps S151 to S157, the surface shape of the measurement sample is analyzed based on the AFM measurement and the simulation result.

In step S209 of FIG.
A CM simulation process is performed to correct the impurity distribution in the sample obtained by the SCM measurement. Next, in step S210, it is determined whether or not the impurity distribution has been uniquely specified.
Proceed to.

In step S211, similarly to step S85 in FIG. 11, it is determined whether or not the number of corrections of the SCM measurement condition is within a predetermined number. That is, if the number of corrections is within the predetermined number, the process proceeds to step S212 and S
The measurement conditions for CM measurement are changed, and the process returns to step S208. On the other hand, if the number of corrections exceeds the predetermined number, the process proceeds to step S213, and thereafter in steps S213 to S217, as in S87 to S91 of FIG. Modify the distribution.

[Eleventh Embodiment] In the eleventh embodiment, a semiconductor device is analyzed in a semiconductor device manufacturing system.

FIG. 25 is a schematic configuration diagram of a semiconductor system. The semiconductor system of FIG. 25 includes a semiconductor manufacturing line 6 for manufacturing various semiconductor devices, and a semiconductor manufacturing line 6.
, An analysis unit 7 for analyzing a semiconductor device according to an instruction from the control unit 2, and a data storage unit 3 for storing control data for controlling the control unit 2, analysis results by the analysis unit 7, and the like. Is provided.

FIG. 26 is a flowchart showing the main processing of the control unit 2 in the eleventh embodiment. In step S231, a lot including a plurality of wafers is put into the semiconductor manufacturing line 6. Next, in step S232, predetermined manufacturing conditions are set in the semiconductor manufacturing line 6 to manufacture a semiconductor device. Next, in step S233, a process for measuring the electrical characteristics of the manufactured semiconductor device is performed.
Next, in step S234, it is determined whether or not there is an abnormality in the measured electric characteristics. If there is no abnormality, the process is terminated. If there is an abnormality, the process proceeds to step S235, and details are shown in FIGS. Perform analysis processing. In this analysis process,
For example, the surface shape of the measurement sample is analyzed, and the manufacturing conditions are back-extracted from the obtained surface shape to detect a deviation from the actually manufactured conditions.

Next, in step S236, the manufacturing conditions are changed based on the detected deviation, and the process returns to step S232 to manufacture a semiconductor device under the changed manufacturing conditions.
The manufacturing conditions to be changed include, for example, diffusion temperature, diffusion time, ion implantation energy, ion implantation amount, and gas flow rate.

Next, details of the analysis processing in step S235 in FIG. 26 will be described with reference to the flowchart in FIG. In step S251, an analysis sample is created by processing the semiconductor device in which an abnormality has been detected. Next, in step S252, a probe shape calibration process similar to step S101 in FIG. 13 is performed to specify the shape of the probe tip. Next, in step S253, the surface shape of the sample is analyzed using the AFM measurement device 5. Next, step S25
In step 4, the AFM simulation processing shown in detail in FIG. 16 is performed, and the simulation conditions of the shape simulation for reproducing the result of the AFM measurement, that is, the manufacturing conditions are inversely extracted. Next, in step S255, a simulation condition in the AFM simulation process is compared with a manufacturing condition in the semiconductor manufacturing line 6 to detect a shift in the manufacturing condition.

FIG. 28 is a flowchart showing a first modification of the analysis processing. Steps S261 to S264 are common to the processing of steps S251 to S254 in FIG. In step S265, it is determined whether or not the surface shape of the sample has been uniquely specified by the AFM simulation process.
Proceeding to 6, the measurement conditions (for example, the distance between the tip of the probe and the sample, the scanning speed of the sample, etc.) at the time of the AFM measurement are corrected, and the AFM measurement process in step S263 is performed again. On the other hand, if the surface shape of the sample can be uniquely specified, a shift in the manufacturing conditions is detected as in step S255 in FIG.

FIG. 29 is a flowchart showing a second modification of the analysis processing. In steps S281 to S283, the same processing as in steps S251 to S253 in FIG. 27 is performed. Note that in the probe shape calibration processing in step S281, instead of the method using the AFM reference sample, FIG.
May be calibrated using the SCM reference sample in step S1. In step S284, it is determined whether or not the sample surface is flat based on the result of the surface shape analysis by the AFM measurement device 5. If not flat, the process proceeds to step S285 and A
An FM simulation process is performed to perform high-resolution surface shape analysis.

On the other hand, if it is determined in step S284 that the surface of the sample is flat, the AFM simulation process is omitted, and the flow advances to step S286.
6, S287, the SCM measurement and the SCM shown in detail in FIG.
Simulation conditions of process simulation for performing CM simulation and reproducing SCM measurement results,
That is, the manufacturing conditions are back-extracted. Next, step S288
Then, the simulation conditions in the AFM simulation process and the SCM simulation process are compared with the manufacturing conditions in the semiconductor manufacturing line 6 to detect a shift in the manufacturing conditions.

FIG. 30 is a flowchart showing a third modification of the analysis processing. In this flowchart, the AFM
After performing the simulation processing, it is determined whether or not the surface shape has been uniquely specified by the AFM simulation processing. If the surface shape cannot be uniquely specified, the AFM measurement conditions are corrected and the AFM measurement is performed again (step S305).
To S308). Similarly, after performing the SCM simulation processing, it is determined whether or not the impurity distribution has been uniquely specified by the SCM simulation processing. If the impurity distribution cannot be uniquely specified, the SCM measurement conditions are corrected and the SCM measurement is performed again (step S309 to S313).

As described above, in the eleventh embodiment, when there is an abnormality in the electrical characteristics of the semiconductor device manufactured by the semiconductor manufacturing line 6, the impurity distribution and the surface shape of the semiconductor device are analyzed, Semiconductor manufacturing line 6
Since the deviation of the manufacturing conditions is corrected, it is possible to quickly respond to a manufacturing defect and reduce the defect rate.

The components of the semiconductor evaluation device shown in FIGS. 1, 7, 12, and 21 and the components of the semiconductor manufacturing system shown in FIG. 25 may be integrated into one housing, but are mutually connected by a network. You may connect.

In each of the above embodiments, the control unit 2
Have been described with reference to flowcharts, these processes may be performed by software or hardware.

[0126]

As described above in detail, according to the present invention, the impurity distribution in the measurement sample and the surface shape of the measurement sample are detected based on the comparison between the actual measurement value and the simulation result. In addition, the impurity distribution and the surface shape can be analyzed with an accuracy smaller than the dimension of the probe tip.
In addition, by incorporating such an analysis method into a semiconductor manufacturing system, the failure rate of a semiconductor device can be reduced, and the time required for failure analysis can be reduced.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of a first embodiment of a semiconductor evaluation device according to the present invention.

FIG. 2 is a flowchart illustrating a main process performed by a control unit.

FIG. 3 is a detailed flowchart of a probe shape calibration process in step S1 of FIG. 2;

FIG. 4 is a detailed flowchart of an SCM simulation process in step S3 in FIG. 2;

FIG. 5 is a flowchart showing a modification of FIG. 4;

FIG. 6 is a flowchart illustrating a main process in a second embodiment of the semiconductor evaluation device.

FIG. 7 is a schematic configuration diagram of a third embodiment of the semiconductor evaluation device according to the present invention.

FIG. 8 is a flowchart showing main processing in a third embodiment of the semiconductor evaluation device.

FIG. 9 is a detailed flowchart of an electrical characteristic simulation process in step S55 of FIG. 8;

FIG. 10 is a flowchart showing a modification of FIG. 9;

FIG. 11 is a flowchart showing a main process in a fourth embodiment of the semiconductor evaluation device.

FIG. 12 is a schematic configuration diagram of a fifth embodiment of the semiconductor evaluation device according to the present invention.

FIG. 13 is a flowchart illustrating a main process in a fifth embodiment of the semiconductor evaluation device.

FIG. 14 is a flowchart showing a detailed operation of a probe shape calibration correction process in step S101 of FIG. 13;

FIG. 15 is a detailed flowchart of an AFM simulation process in step S103 of FIG. 13;

FIG. 16 is a flowchart showing a modification of FIG. 15;

FIG. 17 is a flowchart showing main processing in a sixth embodiment of the semiconductor evaluation device.

FIG. 18 is a schematic configuration diagram of a semiconductor evaluation device according to a seventh embodiment of the present invention.

FIG. 19 is a flowchart showing main processing in a seventh embodiment of the semiconductor evaluation device.

FIG. 20 is a flowchart showing a main process in the eighth embodiment of the semiconductor evaluation device.

FIG. 21 is a schematic configuration diagram of a ninth embodiment of a semiconductor evaluation device according to the present invention.

FIG. 22 is a flowchart showing main processing in a ninth embodiment of the semiconductor evaluation device.

FIG. 23 is a flowchart showing a main process in the tenth embodiment of the semiconductor evaluation device.

FIG. 24 is a flowchart following FIG. 23;

FIG. 25 is a schematic configuration diagram of a semiconductor system.

FIG. 26 is a flowchart showing main processing in the eleventh embodiment of the semiconductor system.

FIG. 27 is a detailed flowchart of an analysis process in step S235 in FIG. 26;

FIG. 28 is a flowchart showing a first modification of FIG. 27;

FIG. 29 is a flowchart showing a second modification of FIG. 27;

FIG. 30 is a flowchart showing a third modification of FIG. 27;

FIG. 31 is a block diagram showing the overall configuration of a conventional SCM measurement device.

FIG. 32 is a diagram showing typical high-frequency CV characteristics of an n-type semiconductor.

FIG. 33 is a block diagram showing the overall configuration of a conventional AFM measurement device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 SCM measuring device 2 Control part 3 Data storage part 4 Electrical characteristic evaluation device 5 AFM measuring device

Claims (13)

[Claims] 1. A semiconductor evaluation apparatus comprising SCM measuring means for measuring a CV characteristic representing a relationship between a capacitance C between a probe tip and a sample and a voltage V applied to the sample via the probe tip. Probe shape calibrating means for calibrating probe tip shape data input in advance based on the result of measuring the CV characteristic of the reference sample having a known impurity distribution by the SCM measuring means; and the calibrated probe tip shape S specifying the impurity distribution in the measurement sample based on a comparison result between the CV characteristic of the measurement sample calculated using the data and the CV characteristic of the measurement sample measured by the SCM measuring means.
And a CM simulation unit. 2. An impurity distribution specifying determining means for determining whether an impurity distribution in a measurement sample is specified as one type as a result of performing the processing by the SCM simulation means, and an impurity distribution is not specified as one type. SCM measurement condition correction means for correcting measurement conditions in the SCM measurement means when it is determined that the SCM measurement means has been measured by the SCM measurement means under the corrected measurement conditions. 2. The semiconductor evaluation apparatus according to claim 1, wherein an impurity distribution is specified based on a result of comparison with a CV characteristic of the measurement sample. 3. The capacitance between a gate and a substrate in a measurement sample,
An electric characteristic measuring unit for measuring electric characteristics including at least one of a gate-source capacitance, a gate-drain capacitance, a threshold value, a drain current, a substrate current, and a gate current; And correcting the impurity distribution specified by the SCM simulation unit based on a comparison result between the electrical characteristics calculated based on the determined impurity distribution and the electrical characteristics measured by the electrical characteristic measurement unit. 3. The semiconductor evaluation apparatus according to claim 1, further comprising: a characteristic characteristic simulation unit. 4. A first impurity distribution identification determining means for determining whether or not an impurity distribution in a measurement sample is identified as one type as a result of performing the processing by the SCM simulation means; When it is determined that the number of corrections is not specified, a measurement condition correction number determination unit that determines whether the number of corrections of the measurement condition in the SCM measurement unit is within a predetermined number; If the SCM
The measurement conditions in the measurement means are corrected, and if the number of corrections exceeds the predetermined number, the gate-substrate capacitance, the gate-source capacitance, the gate-drain capacitance, the threshold value, and the drain current in the measurement sample. Electric characteristic measuring means for measuring electric characteristics including at least one of a substrate current and a gate current; electric characteristics measured by the electric characteristic measuring means; and impurities specified by the SCM simulation means. An electric characteristic simulation unit for correcting the impurity distribution specified by the SCM simulation unit based on a comparison result with the electric characteristic calculated based on the distribution; and a result of a process performed by the electric characteristic simulation unit. , A second impurity to determine whether the impurity distribution in the measurement sample has been identified as one type Distribution specifying determining means; and electric characteristic condition correcting means for correcting the measurement condition in the electric characteristic measuring means when the second impurity distribution specifying determining means determines that the impurity distribution is not specified as one type. When the first impurity distribution identification determining unit determines that the impurity distribution is identified as one type, the SCM
The impurity distribution specified by the simulation means is used as the final impurity distribution, and it is determined that the impurity distribution is not specified as one type by the first impurity distribution specification, and the impurity distribution is determined by the second impurity distribution specification determination means. 3. The semiconductor evaluation apparatus according to claim 1, wherein when it is determined that is specified as one type, the impurity distribution corrected by the electric characteristic simulation means is used as a final impurity distribution. 4. . 5. The probe shape calibrating means includes: a reference CV characteristic measuring means for measuring a CV characteristic of the reference sample by the SCM measuring means; and a CV for the reference sample based on input probe tip shape data. First device simulation means for calculating characteristics; CV characteristics measured by the reference CV characteristics measurement means; and CV characteristics calculated by the first device simulation means.
5. A probe tip shape correcting means for correcting shape data of a probe tip used for calculation in the first device simulation means so that the V characteristics coincide with each other. The semiconductor evaluation device according to any one of the above. 6. The SCM simulating means includes a CV for a measurement sample measured by the SCM measuring means.
Impurity distribution estimating means for estimating the impurity distribution in the measurement sample based on the characteristics, based on the probe tip shape data calibrated by the probe shape calibrating means, and based on the impurity distribution estimated by the impurity distribution estimating means. And CV for the measurement sample
Second device simulation means for calculating characteristics; and CV for the measurement sample measured by the SCM measurement means.
And an impurity distribution correcting means for correcting the impurity distribution estimated by the impurity distribution estimating means so that the characteristic matches the CV characteristic calculated by the second device simulation means. The semiconductor evaluation device according to claim 1. 7. The SCM simulation means includes: a process simulation means for calculating an impurity distribution in a measurement sample based on predetermined manufacturing conditions; a shape data of a probe tip calibrated by the probe shape calibration means; A second device simulation means for calculating a CV characteristic for the measurement sample based on the impurity distribution calculated by the process simulation means; and a CV characteristic for the measurement sample measured by the SCM measurement means.
PS parameter correction means for correcting the manufacturing conditions used in the calculation by the process simulation means so that the characteristics match the CV characteristics calculated by the second device simulation means. The semiconductor evaluation device according to claim 1. 8. A semiconductor evaluation apparatus provided with AFM measuring means for analyzing a surface shape of a sample based on a force acting between a tip of a probe placed above the sample and the sample. A probe shape calibrating unit for calibrating shape data of the probe tip input in advance based on a result measured by the AFM measuring unit; and a surface shape of a measurement sample calculated using the calibrated probe tip shape data. A semiconductor evaluation device comprising: an AFM simulation unit configured to specify a surface shape of a measurement sample based on a result of comparison with a surface shape of the measurement sample measured by the AFM measurement unit. 9. As a result of performing the processing by the AFM simulation means, a surface shape specification determining means for determining whether or not the surface shape of the measurement sample is specified to one type; and that the surface shape is not specified to one type. AF that corrects the measurement condition by the AFM measuring means when it is determined
M measurement condition correction means, wherein the AFM simulation means specifies the surface shape of the measurement sample based on a comparison result with the surface shape measured by the AFM measurement means under the corrected measurement conditions. The semiconductor evaluation device according to claim 8, wherein: 10. A surface flatness judging means for judging whether or not a surface of a measurement sample is flat based on a measurement result by said AFM measuring means, wherein said AFM simulation means is provided by said surface flatness judging means. 10. The semiconductor evaluation device according to claim 8, wherein arithmetic processing is performed only when it is determined that is not flat. 11. The AFM simulation means, comprising: a surface shape of a measurement sample based on a surface shape of the measurement sample measured by the AFM measurement means and shape data of a probe tip calibrated by the probe shape calibration means. And a third device simulation means for calculating a value of the first device simulation means so that a surface shape measured by the AFM measurement means coincides with a surface shape calculated by the third device simulation means. The semiconductor evaluation apparatus according to any one of claims 8 to 10, further comprising surface shape correction means for correcting surface shape data used in the calculation in (1). 12. The AFM simulation means comprises: a shape simulation means for calculating a surface shape of a measurement sample based on predetermined manufacturing conditions; a surface shape measured by the AFM measurement means; and a calculation by the shape simulation means. 11. A manufacturing condition correcting means for correcting manufacturing conditions used for calculation by the shape simulation means so that the obtained surface shape matches the obtained surface shape. Semiconductor evaluation equipment. 13. A semiconductor manufacturing system provided with a semiconductor manufacturing apparatus for manufacturing a semiconductor device in lots, comprising: an electric characteristic measuring means for measuring an electric characteristic of the semiconductor device manufactured by the semiconductor manufacturing apparatus; 13. The semiconductor evaluation device according to claim 1, wherein at least one of an impurity distribution and a surface shape is analyzed for the semiconductor device for which an abnormality has been detected in the electric characteristics by the electric characteristic measuring means. A manufacturing condition error detecting means for detecting a difference between the manufacturing condition back-extracted based on the analysis result by the apparatus and the manufacturing condition in the semiconductor manufacturing apparatus; and a manufacturing condition error detected by the manufacturing condition error detecting means. Manufacturing condition changing means for changing manufacturing conditions in the semiconductor manufacturing apparatus based on the semiconductor device. Body manufacturing system.