JPH1151721A - Storing circuit of integrated value at the tiem of momentary service interruption time - Google Patents
Storing circuit of integrated value at the tiem of momentary service interruption timeInfo
- Publication number
- JPH1151721A JPH1151721A JP9208767A JP20876797A JPH1151721A JP H1151721 A JPH1151721 A JP H1151721A JP 9208767 A JP9208767 A JP 9208767A JP 20876797 A JP20876797 A JP 20876797A JP H1151721 A JPH1151721 A JP H1151721A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- microcomputer
- power
- signal
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Measuring Volume Flow (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】導電性の流体が磁界内を通過
するとき、その速さに比例した電圧が誘起するというフ
ァラデーの法則を用いた電磁流量計等の瞬停電時におけ
る積算値の保存に関する。BACKGROUND OF THE INVENTION The present invention relates to the preservation of integrated values at the time of momentary power failure of an electromagnetic flow meter or the like using Faraday's law that a voltage proportional to the speed of a conductive fluid is induced when passing through a magnetic field. .
【0002】[0002]
【従来の技術】図3は、電磁流量計の全体構成図であ
る。図3において、1は検出部、2は交流増幅器、3は
励磁回路、4は安定化電源回路、5は電源トランス、6
はA/D変換器、8はマイクロコンピュータ、9は出力
回路、10はE2 PROM、11は交流電源、12は定
電圧検知回路、16は励磁コイル、17は電極、18は
測定管である。測定管18に施された励磁コイル16に
励磁回路3より交流電流を流し交流磁界を発生させ、測
定管18内を流れる導電性の流体の速さに比例した電圧
を電極17によりピックアップする。この信号を交流増
幅器2により増幅し、A/D変換器6によりデジタル信
号に変換して、マイクロコンピュータ8により演算処理
し、出力回路9より単位時間当たりの流量信号あるいは
積算流量信号を出力する。運転に必要な測定範囲等の設
定値はE2 PROM10に格納されており、必要に応じ
てマイクロコンピュータ8により読み込まれて使用され
る。2. Description of the Related Art FIG. 3 is an overall configuration diagram of an electromagnetic flow meter. In FIG. 3, 1 is a detection unit, 2 is an AC amplifier, 3 is an excitation circuit, 4 is a stabilized power supply circuit, 5 is a power transformer, 6
Is an A / D converter, 8 is a microcomputer, 9 is an output circuit, 10 is an E 2 PROM, 11 is an AC power supply, 12 is a constant voltage detection circuit, 16 is an exciting coil, 17 is an electrode, and 18 is a measurement tube. . An alternating current is applied from the exciting circuit 3 to the exciting coil 16 provided in the measuring tube 18 to generate an alternating magnetic field, and a voltage proportional to the speed of the conductive fluid flowing in the measuring tube 18 is picked up by the electrode 17. This signal is amplified by the AC amplifier 2, converted to a digital signal by the A / D converter 6, processed by the microcomputer 8, and a flow rate signal per unit time or an integrated flow rate signal is output from the output circuit 9. The set values such as the measurement range necessary for the operation are stored in the E 2 PROM 10 and read and used by the microcomputer 8 as needed.
【0003】図4は、従来の電源検知回路周辺の構成を
図3より抜粋して示した図である。図4において、定電
圧検知回路12は、安定化電源回路4にて生成されたマ
イクロコンピュータ8等で用いるデジタル用5V電源を
常時監視しており、瞬停電等により5V電源が低下し
4.3Vになると、これを検知してマイクロコンピュー
タ8をリセットするリセット信号を出力する。FIG. 4 is a diagram showing a configuration around a conventional power supply detection circuit extracted from FIG. In FIG. 4, the constant voltage detection circuit 12 constantly monitors a digital 5V power supply generated by the stabilized power supply circuit 4 and used by the microcomputer 8 and the like, and the 5V power supply drops to 4.3V due to an instantaneous power failure or the like. When this happens, this is detected and a reset signal for resetting the microcomputer 8 is output.
【0004】[0004]
【発明が解決しようとする課題】上述したように、電磁
流量計は単位時間当たりの流量あるいは積算流量を計測
するための流量計である。従来の技術では、積算による
流量計測において、供給交流電源に瞬停電が発生した場
合、マイクロコンピュータをリセットすなわち計測中の
積算値を零としていた。As described above, the electromagnetic flow meter is a flow meter for measuring a flow rate per unit time or an integrated flow rate. In the related art, in the flow measurement by integration, when a momentary power failure occurs in the supplied AC power supply, the microcomputer is reset, that is, the integrated value during measurement is set to zero.
【0005】従って本発明の目的は、供給交流電源に瞬
停電が発生した場合に積算値を安定して保存する回路を
提供することにある。Accordingly, it is an object of the present invention to provide a circuit for stably storing an integrated value when a momentary power failure occurs in a supplied AC power supply.
【0006】[0006]
【課題を解決するための手段】上記課題を解決するため
に、本発明は、入力信号を積算処理する機能を有するマ
イクロコンピュータと、積算処理された信号を記憶する
E2 PROMと、供給交流電源の瞬停電による内部電源
電圧の低下を検出し前記積算処理された信号を前記E2
PROMに記憶させる処理を前記マイクロコンピュータ
に行わせるノンマスカブル割り込み信号を発生する電源
検知回路と、前記積算処理された信号が前記E2 PRO
Mに書き込み完了するまで内部電源電圧を所定の電圧以
上に保持する電源電圧保持回路と、から構成される瞬停
電時積算値保存回路を具備する。このことにより、供給
交流電源の瞬停電時に、電源電圧保持回路によって内部
電源電圧がマイクロコンピュータを含むデジタル回路の
動作可能電圧レベルまで低下する間に、瞬停電発生時点
迄の積算値をE2 PROMに書き込み、供給電源の復電
後書き込まれた積算値をE2 PROMから読みだして、
積算処理を継続することができる。In order to solve the above problems, the present invention provides a microcomputer having a function of integrating input signals, an E 2 PROM for storing the integrated signals, and a supply AC power supply. wherein said integration processing signals detected a drop in the internal power supply voltage due to instantaneous power failure of the E 2
A power supply detection circuit for generating a non-maskable interrupt signal for causing the processing to be stored in PROM to said microcomputer, the integrated processed signal the E 2 PRO
And a power supply voltage holding circuit for holding the internal power supply voltage at or above a predetermined voltage until writing to M is completed. This allows the integrated value up to the instantaneous power failure to be stored in the E 2 PROM while the internal power supply voltage is reduced to the operable voltage level of the digital circuit including the microcomputer by the power supply voltage holding circuit during the momentary power failure of the supplied AC power supply. And the integrated value written after the power supply is restored is read out from the E 2 PROM,
The integration process can be continued.
【0007】また、上記の瞬停電時積算値保存回路にお
いて、電源投入後、所定の時間経過後に前記ノンマスカ
ブル割り込み信号を解除し、さらに所定の時間経過後に
前記マイクロコンピュータのリセット信号を解除する機
能を具備する電源検知回路とする。このことにより、瞬
停電が一旦復電した後所定の時間経過する以前に再度瞬
停電するようなことが連続して複数回発生したとき、最
初の瞬停電による積算値のE2 PROMへの退避を行っ
た後は、その後の複数回の瞬停電によっても前記ノンマ
スカブル割り込み信号およびリセット信号が解除される
ことがないため、マイクロコンピュータへの割り込みお
よびリセットが行われることがなく、マイクロコンピュ
ータを含むデジタル回路の動作の安定化をはかり保存さ
れた積算値の信頼性を確保することができる。Further, the above-described integrated value storage circuit for instantaneous power failure has a function of releasing the non-maskable interrupt signal after a predetermined time has elapsed after turning on the power, and releasing the reset signal of the microcomputer after a predetermined time has elapsed. The power supply detection circuit provided. As a result, when a momentary power failure occurs again a plurality of times successively before the predetermined time elapses after the momentary power failure recovers once, the integrated value due to the first momentary power failure is saved to the E 2 PROM. Is performed, the non-maskable interrupt signal and the reset signal are not released even by a plurality of momentary power failures thereafter, so that the microcomputer is not interrupted and reset, and the digital The reliability of the stored integrated value can be secured by stabilizing the operation of the circuit.
【0008】[0008]
【発明の実施の形態】図1は、本発明の瞬停電時積算値
保存回路の実施例を示す構成図である。図1において、
13は電源電圧保持回路、14はダイオード、15はコ
ンデンサ、7は電源検知回路、71,72は電源電圧監
視用IC、73はOR回路、74,75はコンデンサで
あり、その他の構成要素は図4と同じであり同じ符号を
付してある。図4との相違点は、電源トランス5と安定
化電源回路4との間に電源電圧保持回路13を設けたこ
とと、電源検知回路7の構成が異なることである。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram showing an embodiment of the integrated value storage circuit at the momentary power failure of the present invention. In FIG.
13 is a power supply voltage holding circuit, 14 is a diode, 15 is a capacitor, 7 is a power supply detection circuit, 71 and 72 are power supply voltage monitoring ICs, 73 is an OR circuit, and 74 and 75 are capacitors. 4 and the same reference numerals are used. The difference from FIG. 4 is that a power supply voltage holding circuit 13 is provided between the power supply transformer 5 and the stabilized power supply circuit 4 and the configuration of the power supply detection circuit 7 is different.
【0009】図2は、図1の動作を示すタイミングチャ
ートで、マイクロコンピュータを含むデジタル回路の電
源である5V電源、マイクロコンピュータへのノンマス
カブル割り込み信号(ハイレベルで割り込み解除、立ち
下がりで割り込み発生)およびマイクロコンピュータへ
のリセット信号(ハイレベルでリセット解除)の動作を
示しており、また供給交流電源11のオン時、オフ時お
よび瞬停電の発生時を↓印で示してある。図2を用いて
本発明の動作を説明する。FIG. 2 is a timing chart showing the operation of FIG. 1. A 5V power supply, which is a power supply of a digital circuit including a microcomputer, a non-maskable interrupt signal to the microcomputer (interrupt released at high level, interrupt generated at falling edge) And the operation of the reset signal to the microcomputer (the reset is released at a high level), and when the supplied AC power supply 11 is turned on and off, and when a momentary power failure occurs, it is indicated by ↓. The operation of the present invention will be described with reference to FIG.
【0010】まず供給交流電源11をオンし回路が正常
に動作している状態で瞬停電が発生すると、5V電源の
電圧低下が開始する。これを電源電圧監視用IC71が
検出してノンマスカブル割り込み信号(図の立ち下がり
信号)をマイクロコンピュータ8に出力し、マイクロコ
ンピュータ8は積算値のE2 PROM10への書き込み
を開始する。この間5V電源の電圧はさらに低下し、所
定の電圧に達すると電源電圧監視用IC72がこれを検
出してリセット信号をマイクロコンピュータ8に出力す
る。瞬停電が発生してからリセット信号を出力するまで
の時間をTW で示してある。E2 PROM10へ積算値
を書き込むのに数十mS程度の時間が必要であるが、書
き込み完了後にリセット信号が出力されるように、電源
電圧保持回路13のコンデンサ15の容量を決めればよ
い。First, when an instantaneous power failure occurs in a state where the supply AC power supply 11 is turned on and the circuit is operating normally, the voltage drop of the 5V power supply starts. The power supply voltage monitoring IC 71 detects this, and outputs a non-maskable interrupt signal (falling signal in the figure) to the microcomputer 8, and the microcomputer 8 starts writing the integrated value to the E 2 PROM 10. During this time, the voltage of the 5 V power supply further decreases. When the voltage reaches a predetermined voltage, the power supply voltage monitoring IC 72 detects this and outputs a reset signal to the microcomputer 8. The time from the occurrence of the momentary power failure to the output of the reset signal is indicated by TW. It takes about several tens of milliseconds to write the integrated value to the E 2 PROM 10, but the capacity of the capacitor 15 of the power supply voltage holding circuit 13 may be determined so that a reset signal is output after the writing is completed.
【0011】つぎに、供給交流電源11の投入時である
が、5V電源が立ち上がると、TPD時間後に電源電圧監
視用IC71はノンマスカブル割り込み信号を解除す
る。T PD時間はコンデンサ74の容量によりきめられ
る。さらに、OR回路73を介して電源電圧監視用IC
72によりTRST 時間後にリセット信号を解除する。T
RS T 時間はコンデンサ75の容量によりきめられる。Next, the time when the supplied AC power supply 11 is turned on.
However, when the 5V power supply rises, TPDPower supply after hours
The visual IC 71 cancels the non-maskable interrupt signal.
You. T PDThe time is determined by the capacity of the capacitor 74
You. Further, an IC for monitoring the power supply voltage via the OR circuit 73
T by 72RSTAfter a time, the reset signal is released. T
RS TThe time is determined by the capacity of the capacitor 75.
【0012】供給交流電源11が連続的に瞬停電した場
合、すなわち瞬停電から復電した後TPD時間内に再び瞬
停電するということを繰り返した場合、電源電圧監視用
IC71はノンマスカブル割り込み信号を解除せず、従
ってリセット信号も解除されることはない。従って、マ
イクロコンピュータ8が連続的に瞬停電する度に、復電
時にE2 PROM10から積算値を読みだしてメモリ
(図示せず)の演算領域に書き込み、書き込み終了後あ
るいは場合によっては書き込み途中で次の瞬停電により
積算値をE2 PROM10へ書き込むというような事態
が発生することを防止することができる。[0012] If the supplied AC power supply 11 is a power failure continuously blinking, i.e. when repeated that power outage again Shun within T PD time after power recovery from the instantaneous power failure, the power supply voltage monitoring IC71 is a non-maskable interrupt signal It is not released, and therefore the reset signal is not released. Therefore, every time the microcomputer 8 continuously loses power, the integrated value is read out from the E 2 PROM 10 at the time of power recovery and written into a calculation area of a memory (not shown). It is possible to prevent a situation in which the integrated value is written into the E 2 PROM 10 due to the next momentary power failure.
【0013】[0013]
【発明の効果】上述したように、本発明によれば、瞬停
電時に積算値をE2 PROMに書き込み保存することが
できるため、復電時にそのデータを読み出して積算処理
を継続することができる。また、電源電圧の変動の大き
いなど良質でない電源を使用する場合、あるいは落雷等
により電源の瞬停電が連続して発生する恐れのある場合
においても、マイクロコンピュータを含むデジタル回路
の動作の安定化をはかることができ、E2 PROMに書
き込まれた積算値の信頼性を確保することができる。[Effect of the Invention] As described above, according to the present invention, it is possible to store write to E 2 PROM integrated value at the time of instantaneous power failure, it is possible to continue the integration process reads the data at the time of power recovery . Also, when using a power supply of poor quality, such as large fluctuations in the power supply voltage, or when there is a risk of continuous power failure due to lightning, etc., the operation of digital circuits including microcomputers should be stabilized. can be achieved, it is possible to ensure the reliability of the integrated value written in the E 2 PROM.
【図1】この発明の実施例を示す構成図。FIG. 1 is a configuration diagram showing an embodiment of the present invention.
【図2】図1の動作を示すタイミングチャート。FIG. 2 is a timing chart showing the operation of FIG.
【図3】電磁流量計の全体構成図。FIG. 3 is an overall configuration diagram of an electromagnetic flow meter.
【図4】従来の実施例を示す構成図。FIG. 4 is a configuration diagram showing a conventional example.
1…検出部、2…交流増幅器、3…励磁回路、4…安定
化電源回路、5…電源トランス、6…A/D変換器、7
…電源検知回路、8…マイクロコンピュータ、9…出力
回路、10…E2 PROM、11…交流電源、12…定
電圧検知回路、13…電源電圧保持回路、14…ダイオ
ード、15…コンデンサ、16…励磁コイル、17…電
極、18…測定管、71,72…電源電圧監視用IC、
73…OR回路、74,75…コンデンサ。DESCRIPTION OF SYMBOLS 1 ... Detection part, 2 ... AC amplifier, 3 ... Excitation circuit, 4 ... Stabilized power supply circuit, 5 ... Power supply transformer, 6 ... A / D converter, 7
... power supply detection circuit, 8 ... microcomputer, 9 ... output circuit, 10 ... E 2 PROM, 11 ... AC power source, 12 ... constant voltage detection circuit, 13 ... power supply voltage holding circuit, 14 ... diodes, 15 ... capacitor, 16 ... Excitation coil, 17 ... Electrode, 18 ... Measuring tube, 71, 72 ... Power supply voltage monitoring IC,
73 ... OR circuit, 74, 75 ... capacitors.
Claims (2)
クロコンピュータと、積算処理された信号を記憶するE
2 PROMと、供給交流電源の瞬停電による内部電源電
圧の低下を検出し前記積算処理された信号を前記E2 P
ROMに記憶させる処理を前記マイクロコンピュータに
行わせる割り込み信号(以下ノンマスカブル割り込み信
号という)を発生する電源検知回路と、前記積算処理さ
れた信号が前記E2 PROMに書き込み完了するまで内
部電源電圧を所定の電圧以上に保持する電源電圧保持回
路と、を具備したことを特徴とする瞬停電時積算値保存
回路。1. A microcomputer having a function of multiplying an input signal, and an E for storing the multiplied signal.
2 PROM and the said accumulation processing signals detected a drop in the internal power supply voltage due to instantaneous power failure of the supply alternating-current power supply E 2 P
A power supply detection circuit for generating an interrupt signal (hereinafter referred to as a non-maskable interrupt signal) for causing the microcomputer to perform processing to be stored in the ROM; and a predetermined internal power supply voltage until the integrated signal is completely written into the E 2 PROM. And a power supply voltage holding circuit for holding the power supply voltage at or above the voltage of the instantaneous power failure.
において、電源投入後、所定の時間経過後に前記ノンマ
スカブル割り込み信号を解除し、さらに所定の時間経過
後に前記マイクロコンピュータのリセット信号を解除す
る機能を具備する電源検知回路としたことを特徴とする
瞬停電時積算値保存回路。2. The integrated value storage circuit according to claim 1, wherein said non-maskable interrupt signal is released after a predetermined time has elapsed after power-on, and a reset signal of said microcomputer is generated after a predetermined time has elapsed. A momentary power failure integrated value storage circuit, characterized in that the power supply detection circuit has a function of canceling.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20876797A JP3763192B2 (en) | 1997-08-04 | 1997-08-04 | Accumulated value storage circuit during momentary power failure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20876797A JP3763192B2 (en) | 1997-08-04 | 1997-08-04 | Accumulated value storage circuit during momentary power failure |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH1151721A true JPH1151721A (en) | 1999-02-26 |
JP3763192B2 JP3763192B2 (en) | 2006-04-05 |
Family
ID=16561762
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP20876797A Expired - Fee Related JP3763192B2 (en) | 1997-08-04 | 1997-08-04 | Accumulated value storage circuit during momentary power failure |
Country Status (1)
Country | Link |
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JP (1) | JP3763192B2 (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002017978A (en) * | 2000-07-07 | 2002-01-22 | Sophia Co Ltd | Game machine |
WO2003075140A3 (en) * | 2002-03-05 | 2004-03-25 | Koninkl Philips Electronics Nv | Product and method for preventing incorrect storage of data |
JP2008059725A (en) * | 2006-09-01 | 2008-03-13 | Fujitsu Ltd | Semiconductor device |
JP2008165536A (en) * | 2006-12-28 | 2008-07-17 | Fujitsu Ltd | Information processor, storage part erroneous writing protection method, and information processing system |
JP2010536098A (en) * | 2007-08-06 | 2010-11-25 | サンディスク コーポレイション | Improved write interruption mechanism for non-volatile memory |
JP2017220025A (en) * | 2016-06-07 | 2017-12-14 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
-
1997
- 1997-08-04 JP JP20876797A patent/JP3763192B2/en not_active Expired - Fee Related
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002017978A (en) * | 2000-07-07 | 2002-01-22 | Sophia Co Ltd | Game machine |
WO2003075140A3 (en) * | 2002-03-05 | 2004-03-25 | Koninkl Philips Electronics Nv | Product and method for preventing incorrect storage of data |
EP1610344A1 (en) * | 2002-03-05 | 2005-12-28 | Koninklijke Philips Electronics N.V. | Product and method preventing incorrect storage of data in case of power-down |
JP2008059725A (en) * | 2006-09-01 | 2008-03-13 | Fujitsu Ltd | Semiconductor device |
US7805643B2 (en) | 2006-09-01 | 2010-09-28 | Fujitsu Semiconductor Limited | Non-volatile semiconductor memory device |
JP2008165536A (en) * | 2006-12-28 | 2008-07-17 | Fujitsu Ltd | Information processor, storage part erroneous writing protection method, and information processing system |
JP2010536098A (en) * | 2007-08-06 | 2010-11-25 | サンディスク コーポレイション | Improved write interruption mechanism for non-volatile memory |
JP4938893B2 (en) * | 2007-08-06 | 2012-05-23 | サンディスク コーポレイション | Improved write interruption mechanism for non-volatile memory |
JP2017220025A (en) * | 2016-06-07 | 2017-12-14 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
Also Published As
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