JPH1145992A - Fine-structure semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable a stable operation even at a room temperature or higher by forming fine structure, in which a specific quantity or more of hydrogen are contained in a conductive region consisting of an impurity semiconductor and a multiple tunnel coupling is formed by potential distribution by impurities inactivated by the hydrogen. SOLUTION: A semiconductor device has fine structure, in which 10<17> cm<-3> or more of hydrogen is contained in a conductive region composed of an impurity semiconductor, and a multiple tunnel coupling is formed by potential distribution by impurities 47 inactivated by the hydrogen. An impurity semiconductor, into which an impurity element selected from a IV semiconductor, preferably Si, Ge, SiGe, etc., or a III-V compound semiconductor, preferably GaAs, InP, GaN, AlGaAs, etc., or II-VI elements, preferably Ga, As, C, Si, Ge, Sn, S, Se, Be, Zn, Cd, etc., is introduced, is cited as the impurity semiconductor. Hydrogen at that time comprises hydrogen atoms or hydrogen ions.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having an extremely fine structure and applicable to a logic element, a storage element, a measurement element, and others, and a method of manufacturing the same.

[0002]

2. Description of the Related Art For the purpose of higher integration and higher performance of semiconductor devices, many studies have been made on single-electron devices that operate with a charge change corresponding to one electron. Such single-electron elements are expected to be put to practical use in the future because reduction in power consumption of devices mounted with such elements can be expected. However, in order to put such a single-electron device to practical use, it is important that a stable operation can be obtained even at a high temperature, that is, a temperature higher than room temperature.

[0003] In a single-electron element, a so-called Coulomb blockade method is used in which control is performed on an electron-by-electron basis using Coulomb repulsion between electrons. In order to fabricate a single-electron device that can operate at high temperature using this method, it is important to form a very fine tunnel junction and an electron channel. As an example of this, an example of a single-electron diode device in which Ga ions are implanted into a semiconductor to increase the resistance and form a multiple tunnel junction (SWHwang et al., Sup
erlattices and Microstructures, vol 17 , 297 (1995))
Will be described briefly.

This single-electron diode element is composed of GaAs /
As shown in FIG. 1, a thin channel 11 having a width of 1 μm is formed between the source 12 and the drain 13 by using an AlGaAs-based modulation doping structure, and Ga ions of 130 keV are linearly irradiated by using a focused ion beam. The diode structure has a formed damaged region 14 having a width of about 100 nm. When Ga ions are implanted into the fine wire channel 11 having the GaAs / AlGaAs modulation doping structure,
When a point defect is introduced into the region, the Fermi level is pinned inside the forbidden band, and as a result, carriers are depleted and the resistance is increased.

The distribution of the high resistance region in the damaged region 14 of the thin wire channel 11 is as shown in FIG. As shown in the figure, the distribution of the high-resistance region 21 in the damaged region 14 due to the point defect caused by the Ga ion implantation is random, so that in the damaged region of the fine wire channel, the energy state where portions having various energy states are scattered ( Random potential). The electrons flow through the low energy state portion that is naturally formed during the high energy state portion as shown by the arrow in the figure, and a fine electron channel is realized. At this time, in the fine electron channel, the region where the width of the low energy state portion is small acts as a fine tunnel junction, and the region where the low energy state portion is wide acts as a conductor island. Is formed.

The single-electron diode device using the high resistance by Ga ion implantation has achieved single-electron operation at the temperature of liquid nitrogen, but as far as the present inventors know, stable operation at room temperature or higher is possible. Because it is not expected, or because it uses a multiple tunnel junction of random potential based on point defects due to Ga ion implantation, repeated capture and emission of electrons at point defects is inevitable, and Coulomb due to captured electrons is inevitable. There is a problem that the path of the fine electron channel is easily changed due to the scattering, and the element operation is not stable with time.

[0007]

According to the above-described single-electron diode, the operation of the device can be controlled in units of one electron. However, stable operation cannot be obtained at room temperature or higher. Since a point defect due to ion implantation is used for increasing the resistance, electrons tend to be trapped by the defect, and therefore, there seems to be a problem that the operation of the device becomes unstable. An object of the present invention is to provide a high-performance microstructure semiconductor device that operates stably even at room temperature or higher in order to improve such problems.

[0008]

[Means for Solving the Problems]

[Summary of the Invention] <Summary> A microstructure semiconductor device of the present invention includes a conductive region made of an impurity semiconductor containing 10 ¹⁷ cm ^-3 or more hydrogen,
It is characterized in that the potential distribution due to the impurities inactivated by hydrogen has a fine structure for forming a multiple tunnel junction.

Further, according to the method of manufacturing a microstructure semiconductor device of the present invention, a high resistance region is formed by introducing hydrogen atoms or hydrogen ions into a conductive region made of an impurity semiconductor, and a gate electrode is formed on the high resistance region. Forming
It is characterized by the following.

<Effects> According to the present invention, there is provided a single-electron element or a memory element which can stably operate even at a high temperature by reducing electron capture due to defects, which is a problem in the conventional single-electron element. You.

DETAILED DESCRIPTION OF THE INVENTION In the present invention, a potential distribution is generated in a semiconductor by utilizing the fact that impurities that generate carriers in the semiconductor are combined with implanted hydrogen to cause inactivation, thereby producing a potential distribution in the semiconductor. As a result, a fine electron channel having a small multi-tunnel junction is formed. The region where the impurity atoms and the hydrogen atoms in the semiconductor material are bonded is an intrinsic semiconductor and does not become a carrier capture center, so that it does not have an unnecessary effect on the fine electron channel and operates stably. A single-electron element or a memory element can be manufactured.

<Impurity Semiconductor> Any impurity semiconductor can be used in the semiconductor device of the present invention. The impurity semiconductor here includes a so-called unintentional impurity semiconductor and an intentional impurity semiconductor in which an intrinsic semiconductor or an unintentional impurity semiconductor is doped with an impurity. The impurity semiconductor used in the present invention preferably contains 10 ¹⁷ cm ⁻³ or more impurities, and more preferably 10 ¹⁸ cm ⁻³ or more impurities. In the present invention, it is preferable to use an intentional impurity semiconductor from the viewpoint that the impurity content of such a semiconductor can be controlled. Examples of such intentional impurity semiconductors include (1) Group IV semiconductors, preferably Si, Ge,
SiGe and others, or (2) III-V
Group compound semiconductor, preferably GaAs, InP, Ga
N, AlGaAs, and others, (3) II to VI
Group elements, preferably Ga, As, C, Si, Ge, S
n, S, Se, Be, Zn, Cd, and others into which an impurity element selected from the group is introduced.

In the semiconductor device of the present invention, when an intentional impurity semiconductor is used, a method of manufacturing such an intentional impurity semiconductor is optional. Specifically, a single crystal is manufactured by a CZ method or an FZ method. Sometimes a method of mixing impurities in a source semiconductor, a method of diffusing impurities in a semiconductor crystal by an alloy method or a diffusion method, a method of implanting impurity ions in a semiconductor crystal by an ion implantation method, and a crystal by an epitaxial method. In the growth, there is a method of introducing an impurity into the atmosphere, and others.

<Introduction of Hydrogen> Hydrogen is introduced into the impurity semiconductor used in the present invention. The term "hydrogen" as used herein includes a hydrogen atom or a hydrogen ion. The introduction of hydrogen can be performed by any method, but a method of irradiating the impurity semiconductor with plasma containing hydrogen atoms, or a method of implanting ions containing hydrogen ions, or when epitaxially growing the impurity semiconductor, A method of introducing a hydrogen gas into an atmosphere, and others.

Although the number of hydrogen to be introduced depends on the number of impurity atoms contained in the impurity semiconductor and others, the semiconductor of the present invention is usually 1/10 to 10 times the number of impurity atoms contained in the impurity semiconductor. Of hydrogen. Specifically, the impurity semiconductor used in the present invention is 10 ¹⁷ c
m ^-3 or more, preferably 10 ¹⁸ cm ^-3 of hydrogen.

The impurity semiconductor used in the present invention in which impurities are inactivated by introducing hydrogen can be reversibly activated by a heat treatment at 400 ° C. or higher. Therefore, in the manufacturing process, the fluctuation of the characteristics of the impurity semiconductor can be controlled by the heat treatment.

<Semiconductor Device> The semiconductor device of the present invention includes a semiconductor in which hydrogen is introduced into the impurity semiconductor. This semiconductor has a potential distribution resulting from the distribution of inactivated impurity atoms, and a multi-tunnel junction in which a plurality of small tunnels are coupled in the semiconductor is formed by the potential distribution.

The semiconductor device of the present invention has the semiconductor having the multiple tunnel junction. A typical example of the semiconductor device includes the semiconductor having the multiple tunnel junction in the thin wire channel connecting the source and the drain. Field effect transistor (FET). The field-effect transistor includes a junction field-effect transistor and a MOS field-effect transistor depending on the manufacturing method. In the semiconductor device of the present invention, any one can be used depending on the application. Also, the gates used for them include:
In addition to a normal PN junction gate, a Schottky gate or an in-plane gate can be used.

The multi-tunnel structure in the portion of the semiconductor device into which hydrogen has been introduced differs from the multi-tunnel structure of the prior art shown in FIG. 1B in the characteristics of the impurities causing the potential distribution. That is, in the prior art, the energy potential distribution is due to a point defect, and there is a defect that the point defect acts as a trap. The impurities do not act as traps. Therefore, trapped electrons are not generated in the semiconductor device of the present invention, and stable operation as an element can be expected.

[0020]

BEST MODE FOR CARRYING OUT THE INVENTION The following is a detailed description of the present invention.

Embodiment 1 A plan view of an element according to a first embodiment of the present invention is as shown in FIG. This example illustrates a single-electron transistor type charge detection element having an FET structure. As shown in FIG. 2A, this element is made of GaAs / AlGaAs.
Fine channel 11, source 1 due to modulation doping structure
2, a drain 13 is formed, and an FET structure having a gate 31 of an in-plane gate structure is adopted. Here, a structure as shown in FIG. 4 is used as the GaAs / AlGaAs modulation doped structure. That is,
An undoped GaAs buffer layer 42 and an undoped AlGaAs spacer layer 4 are formed on a semi-insulating GaAs substrate 41.
3, Si-doped n-AlGaAs electron supply layer 44, Si
A structure in which a doped n-GaAs cap layer 45 is sequentially formed is used. Here, Si atoms act as impurities. First, the channel 11, the source 12, the drain 13,
After regions other than the gate 31 are removed by etching to increase the resistance, ohmic electrodes are formed on the source 12, the drain 13, and the gate 31. Next, an ion irradiation region 32 having a length of about 100 nm including a channel width is specified by a resist opening. Then, when hydrogen plasma by electron cyclotron resonance of 2.45 GHz using hydrogen as a source gas is irradiated from the opening of the window for about 30 minutes while the substrate is heated to 250 ° C., the n-AlGaAs electron supply layer 4 is irradiated.
In 4, hydrogen atoms of the order of 10 ¹⁸ cm ^-3 are introduced,
As a result, part of the impurity Si is inactivated. Then, as shown in FIG. 5, the inert impurities 47 and the active impurities 51 are randomly distributed in the ion implantation region. Here, the inert impurity gives a region having a high energy as an intrinsic semiconductor, that is, a high resistance region, to the two-dimensional electron gas layer formed in the undoped GaAs buffer layer 42, and the ionized active impurity gives the energy Gives a very low area. This results in a random potential distribution for the electrons as if mountains of various heights are continuous, and the electrons flow as arrows in the low energy canyons that are naturally formed between the mountains. And a substantially fine electron channel is formed. Under appropriate gate bias conditions, this structure results in a narrow stream of electrons as a river flowing through the canyon, but electrically, many fine conductor islands are formed by tunnel junctions with very small junction capacitance. This corresponds to a connected multiple tunnel junction. In such a multi-tunnel junction, the conductance is greatly changed by charges existing in the vicinity due to the Coulomb blockade effect. In other words, a small change in voltage applied to the gate, that is, a change in charge,
Can be performed as a charge detection device that accurately detects as a change in conductance. Here, inactive impurities that form a high-resistance region for electrons do not become a center for capturing electrons. Therefore, changes in Coulomb scattering due to capture and emission of electrons and changes in the path of a fine electron channel occur. It does not have a factor that makes the device operation unstable.

By the way, the structure of the semiconductor in the semiconductor device of the first embodiment is as shown in FIG. 4 in the laminating direction, and inactivation of impurity atoms by hydrogen implantation is performed by n-AlGaAs electron supply layer from the surface. 44, and as a result, a random potential is formed in the two-dimensional electron gas layer 46, and a structure that functions as a multiple tunnel junction is formed. In addition to such a structure, a similar effect can be obtained by a laminated structure as shown in FIG. That is, in this structure, a GaAs buffer layer 42, an AlGaAs layer 43, an n-GaAs channel layer 61, an n-AlGaAs layer 44, and an n-GaAs cap layer 45 are sequentially formed on a GaAs substrate 41. In this structure, the n-GaAs channel layer 61 serves as an electron channel. In this case, the above-described inactivation of impurity atoms by hydrogen implantation is performed from the surface to the n-GaAs channel layer 61, and the n-GaAs channel layer 61 is formed.
The state of the impurity atoms in the As channel layer 61 is directly modulated to become the inert impurities 47, and as a result, a random potential is formed. At this time, the lower Al
The GaAs layer 43 may be non-doped or n-type doped, but if it is an n-AlGaAs layer, it functions as an electron supply layer from below and adjusts the bias applied to the device. Accordingly, it is possible to supply insufficient electrons into the n-type GaAs channel layer 61.

Embodiment 2 FIG. 7 is a plan view of an FET device according to a second embodiment of the present invention.
As shown in FIG. As shown in FIG.
A fine channel 11, a source 12, and a drain 13 are formed by an aAs / AlGaAs modulation doping structure, and a Schottky gate 71 is further provided. The structure of this element in the stacking direction is as shown in FIG.
an undoped GaAs buffer layer 4 on an aAs substrate 41;
2, undoped AlGaAs spacer layer 43, Si-doped n-AlGaAs electron supply layer 44, Si-doped n-G
After the aAs cap layer 45 is sequentially formed, regions other than the channel 11, the source 12, and the drain 13 are removed by etching to increase the resistance, and then an ohmic electrode is formed on the source 11, the drain 12, and the gate 71. Next, an ion irradiation region having a length of about 100 nm for forming the Schottky gate 71 on the fine wire channel 11 is specified by a resist opening. When the substrate is heated to 250 ° C. for about 30 minutes with hydrogen plasma by electron cyclotron resonance of 2.45 GHz using hydrogen as a source gas from the resist opening, the two-dimensional electron gas layer 46 in the fine wire channel 11 N-Ga
Since most of the impurity Si in the As cap 45 layer becomes the inactive impurity 47, the Schottky gate 71
The lower region has a high resistance as an intrinsic semiconductor. Thereafter, a Schottky metal is deposited, and the pattern is extracted by registry lift-off. The Schottky gate electrode thus formed has a sufficient Schottky barrier height because carriers in the outermost n-GaAs cap layer 45 are sufficiently depleted and have a high resistance, and have good Schottky characteristics. You can get a Schottky Gate that you have. At this time, it is not necessary to perform a difficult-to-control wet etching process such as recess etching which has been performed when forming a conventional Schottky gate, and a large-area good gate electrode can be easily formed even in a fine electron channel. Can be done.

Embodiment 3 The structure of a Si-based single-electron transistor according to a third embodiment of the present invention is as shown in FIG. This element is shown in FIG.
As shown in FIG. 7, a thin line channel 11, a source 12, and a drain 13 are formed by Si having an SOI structure, and an FET structure having a gate 91 made of polysilicon is adopted. The structure of this element in the stacking direction is as shown in FIG.
02, a Si channel layer 103, a gate oxide film 104, and a polysilicon gate 91 are formed. In the case of this element as well, as in the first embodiment, the inert impurities 105 and the active impurities 106 are randomly distributed in the fine wire channel 11 due to the hydrogen introduced into the fine wire channel 11.
A random potential distribution is formed in the fine wire channel 11 by the inert impurities 105 and the active impurities 106. Under an appropriate gate bias condition, many fine conductor islands are electrically connected to a tunnel junction having a small junction capacitance. Thus, a fine electron channel composed of multiple tunnel junctions connected with each other is realized. Such a transistor having a multiple electron channel of a multi-tunnel junction can operate by detecting a minute change in voltage applied to the gate 91 with an accuracy of an elementary charge or more. First, as a manufacturing process of this element, 10
N-type Si channel layer doped with P (phosphorus) on the order of ¹⁸ cm ^-3 , fine channel 11, source 12 and drain 13
After removing the other regions by reactive dry etching, the whole is thermally oxidized to form a gate oxide film 104. Next, a resist opening having a length of about 100 nm including a fine line channel width was formed by electron beam lithography, and hydrogen was used as a source gas from the opening through 2.45.
The substrate is irradiated with hydrogen plasma generated by electron cyclotron resonance of GHz for about 30 minutes while the substrate is heated to 250 ° C.
Then, the gate oxide film 104 is formed by the effect of the hydrogen plasma.
Through the Si channel layer 103, hydrogen of the order of 10 ¹⁸ cm ⁻³ is introduced, and as a result, the fine channel 1
Part of the phosphorus atoms, which are impurities in 1, are inactivated.
Further, after polysilicon as a gate electrode is formed by plasma-excited CVD, phosphorus ions are implanted into the source 12, the drain 13, and the gate 91 to form an ohmic electrode, thereby completing an element structure. The Si-based single-electron transistor manufactured in this manner has a random distribution of the inactive impurity 105 which becomes a high-resistance region in the fine wire channel 11, but this inactive impurity 105 does not become a center for capturing electrons. In addition, there are no factors that destabilize the operation of the device, such as a change in Coulomb scattering due to capture and emission of electrons and a change in the path of a fine electron channel. Therefore, by this method, it is possible to obtain a Si-based single-electron transistor that can stably obtain an ultra-low power consumption characteristic that can operate by a change in the amount of charge corresponding to a single electron for a long period of time.

[0025]

According to the present invention, it is possible to obtain a single-electron element or a memory element that operates stably even at a high temperature.
It is as described in the section of [Summary of the Invention].

[Brief description of the drawings]

FIG. 1 is a plan view showing the structure of a conventional Ga ion-implanted single-electron diode.

FIG. 2 is a schematic diagram showing a flow of electrons in a damaged region of a conventional Ga ion-implanted single-electron diode.

FIG. 3 is a plan view of an element structure according to the first embodiment of the present invention.

FIG. 4 is a cross-sectional view of a stacking direction structure of the element according to the first embodiment of the present invention.

FIG. 5 is a schematic view showing a flow of electrons in a hydrogen injection portion of the device according to the first embodiment of the present invention.

FIG. 6 is a cross-sectional view of the structure in the stack direction of another element according to the first embodiment of the present invention.

FIG. 7 is a plan view of an element structure according to a second embodiment of the present invention.

FIG. 8 is a sectional view of a structure in a stacking direction of a device according to a second embodiment of the present invention.

FIG. 9 is a plan view of an element structure according to a third embodiment of the present invention.

FIG. 10 is a sectional view of a structure in a stacking direction of a device according to a third embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Fine wire channel 12 Source 13 Drain 14 Damaged area 21 High resistance area 31 Gate 32 Ion implantation area 41 GaAs substrate 42 GaAs buffer layer 43 AlGaAs spacer layer 44 n-AlGaAs electron supply layer 45 n-GaAs cap layer 46 2-dimensional electron gas layer 47 Inactive impurity 51 Active impurity 61 n-GaAs channel layer 71 Schottky gate 91 Gate 101 Si substrate 102 Embedded oxide film 103 Si channel layer 104 Gate oxide film 105 Inactive impurity 106 Active impurity

Continued on the front page (51) Int.Cl. ⁶ Identification code FI H01L 21/338 29/812

Claims (4)

[Claims] 1. The method according to claim 1, wherein the conductive region made of the impurity semiconductor is 10 ¹⁷ c.
A microstructured semiconductor device including m- ³ or more hydrogen and having a microstructure in which a potential distribution due to impurities inactivated by the hydrogen forms a multi-tunnel junction. 2. The semiconductor material according to claim 1, wherein said semiconductor material is a group IV semiconductor or III.
A group V compound semiconductor, wherein the impurity atoms are II to VI
2. The microstructure semiconductor device according to claim 1, wherein the device is an atom of a group III element. 3. The number-based hydrogen concentration in the conductive region is 1/10 to 10 times the impurity concentration.
Or the microstructure semiconductor device according to 2. 4. A microstructure semiconductor device according to claim 1, wherein a high resistance region is formed by introducing hydrogen atoms or hydrogen ions into a conductive region made of an impurity semiconductor, and a gate electrode is formed on the high resistance region. Manufacturing method.