JPH1145940A - Method for shortening interconnection - Google Patents

Abstract

PROBLEM TO BE SOLVED: To move objects so that the interconnection cost can be lowered by forming a tree having a plurality of nodes of objects and calculating the load on a master node for a slave node based on the load of the slave load sequentially from the leaf side of each tree. SOLUTION: A compaction processor comprises an input section 2, a processing direction determining section 4, a limit graph forming section 6, an area reducing section 8, an interconnection shortening section 10, an end decision section 12, and an output section 14. The compaction processor may be implemented with a computer and a program. A tree is then formed while having objects in specified positional relationship at respective nodes and the load at each node is determined sequentially from the downstream side toward the upstream side of the tree while reflecting the load at the downstream side node. According to the method, an object is moved such that the interconnection cost is lowered efficiently and effectively by determining a group of objects to be moved easily is determined based on the load.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring shortening method for reducing the total wiring length in consideration of priority, which is performed following an area reduction process when one-dimensionally compacts layout data of a semiconductor integrated circuit.

[0002]

2. Description of the Related Art In a layout design of a semiconductor integrated circuit (hereinafter, referred to as an IC), a process of reducing an area of an IC layout by moving an object and reducing an interval between the objects is called a compaction process. A tool that performs compaction processing is called a compactor. In addition,
An object is a group of layout parts that are simultaneously moved in the same direction by the same distance in the compaction processing (or the relative positional relationship is locally fixed).

When designing a large-scale IC layout, it is possible to reduce the burden on the designer by designing the outline only and optimizing the outline with a compactor. When the design rule is changed and the initial object interval can be reduced by the advance of the manufacturing technology, the area of the layout can be automatically reduced by using the compactor. In addition, compactors are used in various aspects.

[0004] The wiring length reduction problem described below is an important problem that appears in this compaction processing.

[0005] From the viewpoint of reducing manpower, compactors are important in optimizing large-scale layouts, but it is difficult to quickly and strictly optimize two-dimensional wiring on large-scale layouts. However, in general, even if the optimization cannot be strictly performed, compaction enough to be practical can be created at a high speed, and compaction processing is often performed in order in each direction (one-dimensional compaction).

FIG. 28 shows the structure of a compactor that performs one-dimensional compaction. Hereinafter, for convenience of description, the left-right direction of the IC layout is referred to as an x direction, and the up-down direction is referred to as a y direction.

First, layout data is input from an input unit 202.

Next, a processing direction determination unit 204 determines a processing target in either the x direction or the y direction. For example, the first and third compactions are in the x direction, and the second and fourth compactions are in the y direction.

Next, a constraint graph creation unit 206 creates a constraint graph expressing a positional constraint relationship with respect to the processing direction of the object. As will be described in detail later, the constraint graph is obtained by connecting an object to a vertex (node) of the constraint graph.
And stores a limit distance to which two objects corresponding to the two vertices can approach each other with respect to a branch connecting the two vertices. Thereafter, processing is performed with reference to this constraint graph.

Next, the area reducing unit 208 performs a process of packing the object to one side in the processing direction as much as possible while referring to the constraint graph. For example, in the processing in the x direction, the object is shifted to the left as much as possible. In the following, it is assumed that the area reducing unit 208 packs objects in a direction to make the coordinates of the vertices smaller.

Next, the wiring shortening unit 210 moves the element so as to shorten the wiring while referring to the constraint graph. Note that each object is already packed by the area reducing unit 208 in a direction to reduce the coordinates of the vertices as much as possible, and the element that reduces the coordinates of the vertices cannot be moved. It is only necessary to consider the process for increasing the size.

Next, the termination determination section 212 determines whether the termination condition is satisfied. If the end condition is satisfied, the process ends and the result is output from the output unit 214. If the end condition is not satisfied, the process returns to the processing direction determination unit 204, and the same compaction process is repeated by changing the processing direction. Will be

Here, the processing of the area reducing section 208 and the processing of the wiring reducing section 210 will be described. As described above, the area reducing unit 208 performs a process of packing the object to one side in the processing direction. As a result, at the stage where the processing of the area reducing unit 208 is completed, there is a portion where the wiring extends. FIG.
With reference to FIG. 9, a description will be given of how the wiring is extended by the processing in the area reducing unit 208.

[0014] As shown in FIG.
FIG. 29B shows an example in which the object C is shifted to the left as a result of performing the process of shifting the object to the left by the area reducing unit 208 in order to reduce the layout of the two objects in the x direction. By the way, the object C is slightly on the right side as compared with FIG.
In such a case, the area of the entire layout does not change. That is, in order to minimize the area, it is understood that the object C does not necessarily have to be moved all the way to the left end. Moreover, when comparing the layouts of FIGS. 29B and 29C, it can be seen that the wiring of FIG. 29B is inferior in the following two points. (1) In FIG. 29B, the wiring is too long, so that the resistance is larger than the given layout. (2) FIG. 29B shows that when compaction is next performed in the y direction, the object C becomes an obstacle and the object A cannot be packed down. For this reason, the layout area finally output becomes large.

In general, when the area is reduced by moving the object to one side as much as possible, there is a range in which the area does not change even if the object is moved. As can be inferred from the comparison between FIGS. 29B and 29C, shortening the wiring length often leads to reducing the entire area (for example, the document “YE Cho: A Subject”).
five Review of Compaction
n, Proc. 22ndDesign Autom
ation Conferenve, 1985, pp.
Accordingly, in the processing of the wiring shortening unit 210, shortening the wiring length within this allowable range is a problem to be solved.

Such a problem is called a wiring length shortening problem, and is an important problem in one-dimensional compaction.

More generally, the wiring shortening problem can be defined as "a problem that minimizes costs under constraints". In order to achieve more effective one-dimensional compaction, it is important to solve this problem efficiently. Hereinafter, a description will be given in connection with this wiring shortening problem.

First, "cost" will be described. Hereinafter, processing in the x direction will be described, but the same applies to processing in the y direction.

When reducing the total wiring length, it is not possible to sufficiently shorten the entire wiring simply by focusing on the individual wirings and shortening each of them. Further, when the priorities at the time of shortening differ for each wiring, it is impossible to consider these priorities. Therefore, it is conceivable to define a cost based on all the wirings and move individual elements so as to reduce the cost.

Here, the straight line and each line segment of the broken line are referred to as a line. The length of the wiring in the x direction can be obtained by taking the sum of the lines in the x direction.

Each wiring has a different priority in shortening. For example, in general, there is a demand to preferentially shorten wiring belonging to a mask layer having a large resistance. Therefore, when calculating the cost, the cost is calculated by multiplying the line length by a certain priority. Assuming that the x coordinate of each bending point of the wiring is x _i and the priority is c _ij , the cost can be expressed as in equation (1). It is assumed that a line having a higher priority value is a line that must be preferentially shortened. Here, J is a set of combinations of subscripts corresponding to both ends of the line.

[0022]

(Equation 1)

If the absolute value of equation (1) is removed, equation (2) is obtained.

[0024]

(Equation 2)

Equations (1) and (2) are equivalent as long as the magnitude relationship of the x coordinates at both ends of the line does not reverse.

In equation (2), if the coefficient w _i is positive, the coordinates x _i
Is reduced, and if the coefficient w _i is negative, the coordinates x _i are increased, whereby the cost can be reduced. Since the equations (1) and (2) must be equivalent, this operation must be performed within a range where the left and right sides of the line do not interchange. In order to minimize the expression (1), it is necessary to exchange the left and right of the line. However, when the left and right of even one line are exchanged, the expression (2) must be corrected.

At an appropriate timing, the cost of equation (1) can be minimized by rewriting the cost of equation (2) by inverting the line whose length has become zero.

Next, the above "restriction conditions" will be described.

[0029] In the following, in particular x _i unless specified including break bend point of the wiring, denote the x-coordinate of the polygon edges representing the element. The design rule is a condition determined by a manufacturing process, and is a constraint condition regarding a positional relationship between elements. This condition can generally be expressed as: _{x i -x j ≧ d ij (} 3) in correspondence with the vertices of the constraint graph the x _i, representing equation (3) to the constraint graph as shown in FIG. 30.

In the constraint graph, a vertex v has coordinates X (v),
The value of the constraint condition D (e) is stored in the branch e.
Branch represents the constraint _{X (v q) -X (v} p) ≧ D (e pq) (4).

In general, there is a relationship between a line end point xi and a corresponding vertex coordinate X (v _p ), where c _i is a constant, and x _i = X (v _p ) + c _i . Therefore,
The cost can be expressed as in equation (5) except for the constant term.

[0032]

(Equation 3)

FIG. 31 shows an example of a general constraint graph. Since a sink corresponding to the right end point of the layout and a source corresponding to the left end point are added, the constraint graph is a connected graph.

The wiring length shortening problem is a problem that minimizes the cost of equation (1) as long as the constraints represented by the constraint graph are satisfied.

Here, the local improvement method and the group improvement method which are the conventional wiring shortening methods will be described.

In order to reduce the cost, if the weight W (v _p ) of the vertex v _p is positive, the position of the vertex may be reduced, and if the weight of the vertex is negative, the position of the vertex may be increased. good. By the way, since the area reduction processing is performed prior to the wiring shortening processing to make the coordinates of each vertex as small as possible, the wiring shortening unit cannot make the coordinates of the vertices smaller. Therefore, as described above, only the process of increasing the coordinates of the vertices in the wire shortening unit may be considered.

If the weight of each vertex is negative, the cost can be considerably reduced by increasing the coordinates of the vertex within a range that does not violate the constraints. Such a method is called a local improvement method.

However, it is known that the local improvement method alone converges away from the optimal solution.
FIG. 32 shows an example in which the wiring cannot be sufficiently shortened by the local improvement method. The black circles in the vicinity of the wiring in FIG. 32 indicate that the objects on both sides cannot approach any more.

However, in the example of FIG. 32, by moving a plurality of objects at the same time, an arrangement with lower cost can be achieved. For example, the objects (A to
If you consider a group that combines the whole of H) into one, this group is connected to wiring with priority 4 from the right,
From the left, wiring of priority 1 and wiring of priority 2 are connected. Therefore, if the entire object is moved to the right side, the wiring of the priority 1 and the wiring of the priority 2 are extended, but the wiring of the priority 4 is contracted, so that the cost is reduced. Similarly, three objects (B,
Even if D and E) are moved together, the cost can be reduced.

As described above, a method in which a plurality of vertices are regarded as one group and the vertices in the group are simultaneously moved is called a group improvement method. Whether the cost is reduced by moving the entire group to the right can be determined by taking the sum of the weights of all the vertices included in the group. As in the case of the local improvement method, if this value is negative, it can be seen that it is moved to the right to reduce the cost.

In the group improvement method, vertices to be moved simultaneously in a group are stored in a tree, so that processing can be executed efficiently. In the tree created here, there is a tight constraint graph branch from the parent to the child. During processing, the group of vertices to be moved simultaneously changes every moment, so the tree members must be modified each time the group is moved.

In FIG. 32, moving three hatched objects (B, D, E) to the right can reduce the cost, rather than moving all objects to the right. , E) to the right is the optimal operation in this state. The challenge is how to efficiently find a tree having these three objects (B, D, and E) as members.

The conventional method (for example, the document "WL Sch
iele, Improved Compaction
by Minimized Length of W
ires, Proc. 20th Design A
automation Conf. 1983. pp. 1
21-127 ", reference" G. Lakhani, R .; Va
radarajan: A Wire-Length M
Initialization Algorithm for
Circuit Layout Compact
n. IEEE International Sympo
sium onCircuits and System
ms, Vol. 1, pp. 276-279 "and reference" C. Kingsley: A Hierarchic
al, Error-Tolerant Compact
or, IEEE 21st Design Outma
tion Conf. 1984 pp. 126-13
In 2 ”), the sum of the weights of the vertices on the path from the root of the tree to each vertex is obtained as an accumulated value. If the accumulated value of a certain leaf is positive, the vertex on this path is fixed. The other vertices were moved separately.
This will be described with reference to FIG.

In FIG. 33 (a), the numerical value in the circle representing the vertex is the weight of the vertex, and the numerical value in parentheses beside the vertex is the accumulated value. According to the conventional method, it is found that the vertices 301 to 303 on the lowest route should be fixed.
Separate as in (b). Next, among the separated subtrees, those having a negative total weight are searched. As a result,
It can be seen that the two vertices surrounded by the dotted line in (b) should be moved further to the right.

However, even if this method is adopted, the three objects (B, D, and E) cannot be moved in the layout shown in FIG.

FIG. 34 shows the calculation of the accumulated values in the group corresponding to FIG. As can be seen from FIG. 34, since the accumulated values of the leaves of all the trees are negative, it is not possible to separate the objects B, D and E by decomposing this tree.

In addition to the above-described method, a method of obtaining a good solution by executing a linear programming method on a graph (refer to the document "J. Lee, CK Wong: AP").
erformance-Aimed Cell Com
vector with Automatic Jog
s, IEEE Trans. Computer-Ai
ded Design, Vol. 11, No. 12,1
992, pp. 1495-1507, 1992 "and the document" T. Yoshimura: A Graph Th
eorical Compaction Algo
ritm, IEEE Proc. ISCA 85,
1985, pp. 1455-1458 ") have been proposed, but these methods have a problem in that the processing speed is reduced.

[0048]

In the conventional one-dimensional compaction processing, when the group improvement method is used in the wiring shortening processing performed after the area reduction processing, the value of the wiring cost is reduced. There is a problem that sufficient compaction cannot be performed because the object cannot be moved even though the object can be moved. Further, in the case of using the linear programming method in the wiring shortening processing, there is a problem that the processing takes time.

The present invention has been made in view of the above circumstances, and is a wiring shortening processing method for shortening wirings performed following an area reduction processing in a one-dimensional compaction processing for a layout of a semiconductor integrated circuit. It is an object of the present invention to provide a wiring shortening processing method capable of executing an object movement that can reduce the wiring cost effectively and effectively.

[0050]

SUMMARY OF THE INVENTION According to the present invention, a specific object in a wiring pattern formed by wiring between objects is moved in accordance with a load showing performance of wiring shortening in consideration of a priority set for each wiring. A method for shortening the length of the wiring, wherein a tree is formed by using a plurality of objects having a predetermined positional relationship as nodes, and child trees are sequentially formed for each tree from the leaf side of the tree. The load of the parent node for the child node is calculated based on the load of the node, and an object corresponding to a tree portion having a node having a load satisfying a predetermined condition as a root node is specified as a movement target.

Preferably, the predetermined positional relationship is a relationship in which two objects are located at a limit distance within which the two objects can approach each other, and an object located upstream of the two objects in the object moving direction in the tree. The parent node and the object located downstream are taken as child nodes, and the load of a node that does not have a child node including a leaf node is moved when the node is moved among the line segments having one end at the node. From the sum of the shortening priorities, the wiring is shortened when the node is moved among the wiring segments having one end at the node, but the weight is obtained by subtracting the sum of the shortening priorities. , The positive value of the load of the child node of the node is added to the weight value of the node, Conditions, the load may be a negative value.

Preferably, the movement for reducing the layout area is to move the object so as to be as compact as possible on one side in the one-dimensional compaction direction. The objects to be moved may be arranged in order from the object located on the other side in the original compaction direction.

Preferably, the condition that all the objects could not be moved even when the above procedure was executed was repeated twice, the condition that all the objects could not be moved even after the above procedure was executed, and the number of repetitions was One of the condition that exceeds the prescribed number of times and the condition that the change in cost corresponding to the weighted total value of the length of each line segment of the wiring becomes smaller than the prescribed value
The above procedure may be repeatedly executed until an end condition consisting of one condition or a condition determined by a predetermined combination is satisfied.

Preferably, the relationship between the objects is represented by a constraint graph, and the object may be moved within a range in which the positional relationship between the two ends of the wiring line is not reversed.

Preferably, the object is moved within a range in which the positional relationship between both ends of the wiring line segment does not reverse, and the length of the wiring line segment becomes 0 when the movement of the object is completed. If so, the positional relationship between both ends of the wiring line segment is inverted, the tree structure is corrected, and the load is obtained again. Then, a node having a load satisfying a predetermined condition is set as a root node. All corresponding objects may be moved together.

Preferably, the object is moved within a range in which the positional relationship between both ends of the wiring line segment does not reverse, and the length of the wiring line segment becomes 0 when the end condition is satisfied. For example, after inverting the positional relationship between both ends of the wiring line segment, until the end condition is satisfied again,
The above procedure may be repeatedly executed.

Preferably, the object is moved within a range in which the positional relationship between both ends of the wiring line segment is not reversed, and the length of the wiring line segment becomes zero or the wiring line when the end condition is satisfied. If there is a tight branch between the ends of the line segment and the corresponding vertices, the ends of the wiring line segment are merged, and the above procedure is repeatedly executed until the end condition is satisfied again. You may do so.

Preferably, the portion where the layout change has occurred is specified and the difference between before and after the change is displayed or the change state of at least one of the total wiring length and the cost is displayed. The state may be presented, and the number of repetitions input by the user may be used as the end condition.

Preferably, the shortening priority of each wiring line is
The function may be a function of the length of the wiring line segment, the width of the wiring line segment, and the mask layer to which the wiring line segment belongs.

Preferably, a specific design rule and a shortening priority of wiring line classification may be set only for a specific part of the layout.

Each invention according to the above-described method is also valid as an invention relating to an apparatus. Further, the invention according to the above-described method is also realized as a machine-readable medium storing a program for causing a computer to execute the corresponding procedure or means.

According to the present invention, a tree is formed by using a plurality of objects having a predetermined positional relationship as nodes, and the load of each node reflects the load of the downstream node from the downstream side of the tree toward the upstream side. Since the object groups are sequentially obtained while moving, the group of the objects to be moved can be easily obtained based on the load, and the object can be moved efficiently and effectively so as to reduce the wiring cost.

[0063]

Embodiments of the present invention will be described below with reference to the drawings.

According to the present invention, the wiring length is reduced by the above-described group improvement method, and a tree construction method for specifying a group is improved.

FIG. 1 shows a configuration example of a compaction processing apparatus according to one embodiment of the present invention. FIG. 2 shows an example of a processing procedure of the compaction processing apparatus.

FIG. 3 shows an example of the internal configuration of the wiring shortening section of this embodiment. FIG. 4 shows an example of a processing procedure of the wiring shortening unit. FIG. 5 shows an example of the procedure of the weight determination processing and the element movement processing of the wiring shortening unit according to the present embodiment.

As shown in FIG. 1, the compaction processing apparatus of the present embodiment comprises an input unit 2, a processing direction determining unit 4, a constraint graph creating unit 6, an area reducing unit 8, a wiring shortening unit 10, an end determining unit 12, An output unit 14 is provided. The compaction processing apparatus can be configured by a computer and a program (or a computer, an operating system, and a program).

For convenience of explanation, the left-right direction of the IC layout is called the x direction, and the up-down direction is called the y direction.
Further, in the description using a specific example, it is assumed that the object is first moved to the left and then moved to the right to reduce the cost.

The input unit 2 inputs layout data of an IC to be processed (step S11).

The layout data includes, for example, the coordinates of each pattern for each mask layer (eg, the coordinate values of two points on the diagonal of a polygon indicating an element).

The input unit 2 inputs design rule data. A design rule database is provided, and design rule identification information is input from the outside through the input unit 2, and the design rule data is searched and obtained from the design rule database using the identification information as a key. You may.

The priority of each wiring is determined according to the attribute (eg, mask layer) of the wiring. The wiring priority data (for example, data indicating the correspondence between the wiring attribute and the priority) is input from the input unit 2 or provided with a database, and identification information is input from the outside through the input unit 2. It is assumed that the corresponding data is retrieved from the database using the identification information as a key.

Further, the priority may be set for each line. For example, the priority of a line may be a function of the line length, the line width, and the mask layer on which the line is created. This function is, for example, a function in which the function value increases as the value determined according to the mask layer increases, the function value increases as the line length increases, and the function value decreases as the line width increases. It is. This function may be selectable.

Further, it is possible to set a specific design rule and a priority for each line only for a specific portion of the layout.

The processing direction determination unit 4 determines the processing target in either the x direction or the y direction (step S12). For example, the first compaction is determined as the x direction, and the second compaction is determined as the y direction. For example, when two sets of compaction are performed with this set as one set, the processing direction is determined in the order of x direction, y direction, x direction, and y direction.

The constraint graph creating unit 6 creates a constraint graph for the processing direction with reference to the layout data and the design rule data (step S13).

For example, for a layout including eight objects A to H as shown in FIG. 10, a constraint graph as shown in FIG. 14 is created. In FIG. 14, the circle representing each vertex indicates the identification information A to H of the corresponding object and the coordinates of the vertex. In addition, the minimum required distance between the vertices for the branch connecting the vertices (called the approach limit distance)
Is written.

In FIG. 10, the value of the priority is shown for each wiring. In addition, the approach margin distance (referred to as slack) indicating how much the two objects corresponding to both vertices can still approach can be obtained by subtracting the approach limit distance from the difference between the coordinates of both vertices in FIG. 10 are indicated by parenthesized numbers with respect to the wiring in FIG. 10, and those with slack of 0 are indicated by black circles with respect to the wiring in FIG. In the constraint graph, a branch having a slack of 0 is referred to as a tight branch.

In the constraint graph, a branch gives a positional constraint relationship between objects, and does not always correspond to a wiring (objects corresponding to two vertexes at both ends of a branch are not connected by a wiring. Sometimes).

Here, the relationship between each element pattern, the object, and the vertex (node) of the constraint graph will be described.

FIG. 6 shows an IC for explaining the above relation.
2 shows a layout pattern example (a part of which is extracted). As described above, the processing direction is the x direction. In FIG. 6, 30 is a wiring pattern (to be processed), 31 and 33 are diffusion layer patterns, and 36 and 3
8 is another wiring pattern, and 32, 37, 34 and 39
Is a contact hole pattern, and 35 is another wiring pattern having a bond with the diffusion layer 31. In the case of FIG. 6, patterns 31, 32, 36, and 37, a left end of the wiring 30 and a right end of the wiring 35 are collectively moved patterns or element groups, and this is one object (J). ) Is formed. Similarly, 33, 34, 3
8, 39 and the right end of the wiring 30 are a group of patterns or elements that move together, and form one object (I).

The constraint graph has a connection in the direction from the vertex corresponding to the object J (vertex j) to the vertex corresponding to the object I (vertex i). Further, for example, if the reference point of the object J is the x coordinate of the lower left corner of the pattern 31 as X _j, and the reference point of the object I is the x coordinate of the lower left corner of the pattern 33 as X _i , the coordinates of the vertex j are obtained. X _j is stored, and X _i is stored as the coordinates of vertex i. Also, the value of the constraint condition (approach limit distance) given between both objects, that is, between both vertices is
The design rule corresponding to both objects is defined by the one that minimizes the approach limit distance. The approach limit distance is stored corresponding to a branch connecting two corresponding vertices.

The movement in the area reduction processing and the movement in the wiring reduction processing are performed by moving the coordinates of the vertices of the constraint graph, that is, the coordinates of the reference point of the object I, in the processing direction. Here, in one object, the relative positional relationship between the reference point and each pattern is always fixed. Therefore, for example, as shown in FIG. 7, for each pattern, the identification information of the vertex corresponding to the object to which the pattern belongs and the coordinates of the vertex (reference point of the object)
When the coordinates of the vertices are moved, the coordinates of each pattern can be obtained from the table and the constraint graph as shown in FIG.

For example, x at the left end of the wiring pattern 30
Assuming that the coordinates are x _t and the relative coordinates of the corresponding vertex j from the coordinates X _j are d ₂ , x _t is represented by x _t = X _j + d ₂ . Similarly, the x coordinate of the right end of the wiring pattern 30 is x
and _s, the relative coordinates from the coordinates X _i of the corresponding vertex i and d _1, x _s is expressed by _{x s = X i + d 1} .

[0085] Further, when the length in the x direction of the wiring pattern 30 and L, L _{is, L = x s -x t =} (X i + d 1) - (X j + d 2) = (X i -X j ) + (D ₁ −d ₂ ) = L _ij + constant The offset difference (L _ij) between the distance L _ij between the reference point of the object I to which the right end of the wiring pattern 30 belongs and the object J to which the left end of the wiring pattern 30 belongs. d ₁ −d ₂ ). That is, the length L of the wiring pattern 30 in the x direction is uniquely determined by the distance L _ij between the reference points of the object I and the object J. Therefore, as described above, the cost can be expressed as in Expression (5) except for the constant term. In order to use the equation (1) when evaluating the cost, it is necessary to determine the length of each wiring, but the equation (5) has an advantage that it can be calculated only by the coordinates of the vertices.

The movement in the area reduction processing, the movement in the wiring shortening processing, the calculation / evaluation of the cost, and the like can be processed by handling the reference point of the object, that is, the vertex coordinates of the constraint graph and the constraints between the vertex coordinates. The coordinates after movement of each pattern may be obtained last.

As shown in the wiring having a bent portion shown in FIG. 8, the wiring line segment itself such as the wiring line segment 40 in the y direction in the x direction processing and the wiring line segment 43 in the x direction in the y direction processing. May form one object. In FIG. 8, for example, considering the y-direction processing, the wiring segments 42, 43, and 44 in the x direction each form an object. In such a case, when moving the wiring segment 43 upward, Wiring segment 43 within a range where the y-coordinate of wiring segment 43 does not exceed the y-coordinate of wiring segments 42 and 44.
Move upward (that is, the approach limit distance = 0).
Becomes). The y-coordinate of the wiring segment 43 is the wiring segments 42 and 44
In order to enable the movement exceeding the y coordinate, a line inversion process described later is performed. In order to move the wiring segments 42, 43, and 44 collectively upward, a merge process described later is performed.

Next, the area reducing unit 8 performs a process of packing the object to one side in the processing direction as much as possible while referring to the constraint graph (step S14). For example, in the processing in the x direction, the object is shifted to the left as much as possible. In the following, it is assumed that the area reducing unit 8 packs the objects in a direction in which the coordinates of the vertices are made smaller (the left side in the processing in the x direction and the lower side in the processing in the y direction).

In practice, the coordinates of the vertices are reduced as much as possible with reference to the constraint graph, and the coordinate values of the moved vertices in the constraint graph are updated.

Next, the wire shortening unit 10 creates a tree (to be described later), and reduces the wires while referring to and updating the constraint graph (more specifically, to reduce the cost as much as possible). Is moved (step S15). Since the objects are already packed by the area reducing unit 8 in the direction of reducing the coordinates of the vertices as much as possible, and the objects that reduce the coordinates of the vertices cannot be moved, the wiring reducing unit 10
Only the process of increasing the coordinates of the vertices should be considered.

In the present embodiment, the "load" of the vertex is obtained instead of the "accumulated value" in the conventional group improvement method, and the optimum vertex group is obtained based on this load. Therefore, first, the “load” used in the present embodiment will be described with reference to FIG.

FIG. 9 shows an example of a tree created for obtaining a group of vertices. FIG. 9 corresponds to the layout of FIG. In FIG. 9, in the circle representing the vertex,
The identification information of the corresponding object and the weight of the vertex are entered. Here, the weight is the weight W (v _p ) in equation (5). For example, since the object A includes the right end of the wiring of the priority 1 and the left end of the two wirings of the priority 1 and the priority 5, the weight of the object A is +1.
−1−5 = −5.

In order to obtain the load R (v) of the vertex v, a vertex (leaf node) which is a leaf of the tree is obtained according to the equation (6).
The calculation should be performed in order from the branch toward the branch. Here, S (v) is a set of children of vertex v in the tree. Θ (x) is 0 when x <0 and 1 when x ≧ 0 (or 0 when x ≦ 0 and 1 when x> 0)
Function).

[0094]

(Equation 4)

That is, the load of the leaf node becomes equal to the weight of the leaf node. The load on the parent vertex (parent node) is a value obtained by adding the positive load of the child vertex (child node) to the weight of the parent node.

This value corresponds to the load when moving each vertex to the right. For example, in the case of the vertex vA, the weight of the vertex vA is -5, but the right descendants are prevented from moving to the right. The degree of hindrance can be determined by looking at the value of the child's peak load. Specifically, since the load of the vertex vC is +7, this corresponds to the vertex vA
Block him from going to the right. On the other hand, the load on vertex vB is-
Since it is 3, it does not prevent the vertex vA from going right.
That is, θ (R (vB)) = θ (−3) = 0, θ (R
Since (vC)) = θ (+7) = 1, the load R (vA) of the vertex vA is R (vA) = W (vA) + R (vC)
= (− 5) + (+ 7) = + 2.

In the case of FIG. 9, all the vertices (ie, vertex v
B, vD, vE) (to move to the right)
be able to.

As described with reference to FIG. 33, the layout of FIG. 32 cannot be moved any more by the conventional group improvement method.
The objects B, D, and E in the layout of FIG. 32 can be moved to further reduce the cost.

Next, the configuration and operation of the wiring shortening unit 10 will be described.

[0100] As shown in FIG.
Includes a weight determining unit 100, an element moving unit 102, an end determining unit 104, and a line inverting unit 106.

The weight determining section 100 calculates the weight of the vertex corresponding to each object (step S21). The element moving unit 102 moves the object, that is, selects the vertices to be moved, determines the moving amount, updates the coordinates of the vertices of the constraint graph, and updates the tree in a range in which the magnitude relationship of the coordinates at both ends of the line in the processing direction does not reverse. The structure is updated, the load is updated, and the like (step S22). The end determination unit 104 determines whether to terminate the wiring shortening processing, perform the line inversion processing and execute the processing again, or execute the processing again without performing the line inversion processing (steps S23 and S24). The line inverting unit 106 corrects the constraint graph, the tree, and the cost function so as to invert the connection relationship between the corresponding two vertices in the case where the line length becomes 0 in the case as shown in FIG. An inversion process is performed (Step S25).

Hereinafter, the weight determining process and the element moving process in steps S21 and S22 in FIG. 4 will be described in detail with reference to FIG. 5 and while following the process of a specific example. Step S31 in FIG. 5 corresponds to step S21, and the other steps in FIG. 5 correspond to step S22.

FIGS. 10 to 13 show the movement of the object in the wiring shortening process. In FIGS. 10 to 13, the priority is shown for each wiring, and in the case where the distance between the objects cannot be reduced any more, black circles are added to the wiring between the objects, and if there is room to close the wiring. The value (slack) is shown in parentheses. For example, the distance between the objects A and B in FIG. 10 can be reduced by three. Further, the space between B and D cannot be further reduced.

FIG. 14 shows a constraint graph created by the constraint graph creation processing unit 6 from layout data and design rules. In FIG. 14, the identification information of the corresponding object and the coordinates of the vertex are shown in the circle indicating the vertex, but the value of the coordinates of the vertex changes as shown in FIGS. Updated sequentially. That is, the coordinates of the vertices in FIGS. 14 to 17 correspond to the arrangements in FIGS. 10 to 13, respectively. Further, the value given to a branch represents a necessary interval (approach limit distance) between two vertices corresponding to the branch.

From the coordinates of the two vertices of the constraint graph and the approach limit distance of the branch, slack between the corresponding objects can be obtained. For example, in FIG.
Is 26, the position of vertex A is 20 and the difference is 6. On the other hand, the necessary interval between A and B is 3 so that the margin between AB is 3. You can see that.
This corresponds to the fact that there is a margin of 3 between the objects AB in FIG. In the actual processing, this constraint graph is used to calculate how much slack there is between individual objects.

FIGS. 18-21 show how the tree changes during processing.

The condition for moving the group is that the load on the root of the tree is negative, and the coordinates of all vertices included in the tree having a root with a negative load are increased. Therefore, in the case of YES in step S35, a process of increasing the coordinates of the vertices of the tree is performed, and in the case of NO, the next tree is selected.

As described above, the present wiring shortening process is, for example, a process of moving an element which is fully brought to the left side to the right side. In this case, when the right element is moved, a gap is formed between the right element and the left element, and the moving range of the left element is widened. Therefore, the number of repetitions until the processing ends can be reduced by sequentially moving the elements from the right side. Therefore, in step S33, it is preferable to select trees in order from the tree having the largest coordinates.

When actually moving a tree, it is necessary to determine the amount of movement. If you move the tree to the right,
When an equality of a constraint between a certain vertex included in the tree and another vertex not included in the tree is satisfied and the right is moved further, a limit that violates this constraint is reached. At this time, vertices included in the tree are called critical nodes, and vertices not included in the tree are called limit nodes, and the amount of movement of the tree at this time is slack. In step S37, the tree is moved by the size of the slack. In addition, since the limit node is added to the tree in step S38, the limit node also moves as a part of the tree with other vertices thereafter.

Here, it is assumed that the arrangement of the objects is in the state of FIG. 10 (the tree is in the state of FIG. 18). Immediately after the start of the process, the process is started with the load = weight at each vertex in step S31, but the tree is updated each time subsequent step S38 is executed.

If the root A is selected in step S33, the process proceeds to step S36 since the root load is negative in FIG. 18 in step S35.

Considering that A is moved to the right as shown in FIG. 10, since the one with the smallest margin is B, the limit node is vertex B, the critical node is vertex A, and the critical node is vertex A in step S36. It can be seen that the slack is 3. These can be calculated by referring to the constraint graph of FIG. Since the slack can be obtained by comparing the difference between the value of the branch coming out of the vertex A (the approach limit distance) and the coordinates of the end point and the start point of the branch, all the branches coming out of the vertex A can be obtained. And the minimum slack and the limit nodes and critical nodes corresponding to the slack may be obtained.

Next, the process proceeds to a step S37. Here, since the slack is 3, the coordinates of the vertex A are changed from 20 to 23 as shown in FIG. 15, and the branch between AB becomes a tight branch.

As a result, the arrangement changes as shown in FIG.
A black circle is written between B. Also, the tree is changed in step S38, as shown in FIG.

Thereafter, the process proceeds to step S35. Here, since the load on the root A of the tree is negative, the process again proceeds to step S36.

Hereinafter, steps S36 to S38
Up to this point, the state changes to the state shown in FIGS. 12, 16, and 20, but this time, since the root load is positive, the flow proceeds to step S33 in step S35. Here, the processing for the tree having the vertex A as a root is settled, and the processing proceeds to the next tree.

Next, it is assumed that the vertex C is selected in step S33. Referring to FIG. 20, since the load on the vertex C is positive, the process returns from step S35 to step S33 again.
In this way, vertices having a positive load are skipped.

Next, it is assumed that the vertex B is selected in step S33. Referring to FIG. 20, since the load on the vertex C is negative such as -5, the process proceeds to step S36. At this time, the tree to be processed is a tree having B as a root, and it is assumed at this point that the tree is as shown in FIG. Further, by repeating the same processing as before, the objects B, D, E
Moves to the right, as shown in FIGS.

Next, FIG. 22 shows another example of the procedure of the weight determination processing and the element movement processing. The procedure in FIG. 22 is a slightly modified version of the procedure in FIG. Here, the differences will be described.

The condition for moving the objects in groups was that the load on the root of the tree was negative.
It is not necessary to construct a tree whose root is a vertex whose load is always positive. Thus, as can be seen from equation (6), if the weight of the root of the tree is positive, the load on the root of the tree does not become negative.
Thus, in step S42, only vertices having a negative weight are selected.

Prior to the processing in FIG. 22, a tight branch is traced in the reverse direction from the sink of the constraint graph, and a mark of BLOCKED is added to the vertices of the traceable range. This process is desirably executed immediately after the process of the area reducing unit 8 ends. Here, a tight branch is a branch in which the size of the constraint indicated by the branch is equal to the distance between the vertices at both ends of the branch. At this time, when the vertex marked with BLOCKED is moved, the coordinates of the sink of the graph become large, and the layout area becomes large.

In step S47, it is checked whether or not a BLOCKED mark has been added to the limit node. If the mark has been added, in step S50, all the vertices on the path from the critical node to the root of the tree are BLOCKed.
A CKED mark is added, and if not, the moving process is performed in steps S48 and S49. As a result, when the layout area should not be increased, the vertices marked with BLOCKED are not moved.

When the element moving process is completed, the end determining unit 104 of the wiring shortening unit 10 performs the line inversion process and executes the processing cycle again, or executes the processing cycle again without performing the line inversion process. Or whether to end the processing.

The following conditions can be considered as the conditions for judging the end in the end judging unit 104. (1) The positions of all objects were not corrected. (2) It has been twice that the positions of all objects are not corrected. (3) Exceeding a certain number of repetitions t1 specified by the user. (4) The change in cost (for example, (previous cost-current cost) or (previous cost-current cost) / current cost, etc.) has become smaller than the value s1 specified by the user. (5) Some of the above conditions 1 or 2 and some of conditions 3 and 4 are appropriately combined by a logical OR or the like.

Note that the convergence state may be presented so that the user can determine and input or update the number of repetitions. Alternatively, the convergence state may be presented, and when the user instructs termination, the termination may be performed irrespective of the satisfaction of the above condition.

As the presentation of the convergence state, for example, a method of identifying a portion where a layout change has occurred and displaying a difference between before and after the change, a change in cost, or a change in total wiring length and cost The state may be displayed.

The convergence state may be presented in a mode that can be switched between a mode that is performed each time the vertex is moved and a mode that is performed when the end is determined, according to a user instruction.

Next, when the above-mentioned end condition is not satisfied, the processing cycle is executed again. At this time, the following judgment may be made as to whether or not to perform the line inversion processing. Can be (A) The positions of all objects were not corrected (except when the above (1) was adopted). (B) Exceeding the fixed number of repetitions t2 specified by the user (t2 <t1 when employing the above (3)). (C) A combination of the above conditions a and b by a logical sum.

In addition, in the case where the above-described termination condition is satisfied, a line process is performed, and then the weight determination process and the element moving process are executed only once until the termination condition is satisfied. When the processing cycle is executed again, various methods such as a method of always executing the line inversion processing and a method of executing the line inversion processing every time an object corresponding to one tree in FIG. 24 is moved are considered. Can be

The line reversing unit 106 performs a line reversing process for exchanging the left and right of the line when the length of the line becomes 0 as described above. Specifically, the connection relation of the constraint graph, the approach limit distance, the tree structure, and the weight and load of the tree vertex are modified so that the relation between the start point and the end point of the two vertices corresponding to both ends of the line is reversed. . The cost function uses the corrected vertex weights. This element movement processing
Since the object is moved within the range where the positional relationship of the vertices does not reverse, when the object cannot move, if there is a distance between the vertices that is 0, a constraint graph such that the positional relationship of the vertices is reversed, In some cases, the object can be further moved by modifying the tree and the cost function.

When the wiring shortening process is completed, a table as shown in FIG. 7 showing the relationship between each pattern, its corresponding vertex, and the relative coordinates in the processing direction with respect to the coordinates of the vertex, and the coordinates of each vertex obtained from the constraint graph Based on the above, the coordinate data of all the layout patterns is recalculated, and the IC layout data after the completion of the line shortening process is generated. In the area reduction processing and the wiring reduction processing, every time a vertex is moved, the coordinates of each pattern belonging to the object corresponding to the vertex may be obtained, and the IC layout data may be updated each time.

Next, the end determination section 12 determines whether or not an end condition has been satisfied (step S16). If the end condition is satisfied, the process ends. If the end condition is not satisfied, the process returns to the processing direction determination unit 4 to change the processing direction and repeat the same compaction processing. As an example of the termination condition, a condition in which a specified number of repetitions have been completed can be considered. For example, this is a case where the processing in the x direction and the processing in the y direction are alternately performed twice each, and a total of four repetitions are completed.

If the end determining unit 12 determines that the end condition is satisfied, the output unit 14 outputs the compacted IC layout data (step S).
17).

Next, a case where a movable object cannot be moved by the above-described basic procedure will be described with reference to the example of FIG.

Lines L1, L2, L3 in FIG.
Respectively correspond to the vertices v1, v2, and v3 of (b), and prohibit movement involving the exchange of both ends of the line. Therefore, the value of the constraint condition between v1 and v2 and between v3 and v2 There are 0 branches. At this time, L1 and L3 cannot move to the right over L2 due to the constraint condition. Further, when the priority of each line is set to 1 and the weight of each vertex is obtained, the weight as described beside each vertex in (b) is obtained,
Since the weight of L2 is 2 (> 0), L2 alone does not move to the right. On the other hand, since the sum of the weights of all the vertices is negative, the wiring length should be shortened by moving the whole to the right, but since this graph cannot be stored in a tree, the whole is Cannot be moved to (c)
The process ends in the state shown in FIG.

Therefore, when the length of the line is 0, or when the branch between the vertices corresponding to the left end and the right end of the line is a tight branch, both ends of the line have the same vertex. I will refer to it. At this time, the weight of the vertex is made equal to the sum of the weight of the vertex originally referred to. Since the sum of the weights of the three vertices in (a) is -2,
As shown in (d), the weight of the new vertex v is -2.
In the case of (d), the line moves to the right, and the wiring length can be reduced.

The wire shortening unit 10 for executing this processing
FIG. 26 shows an example of the internal configuration of the system, and FIG. 27 shows an example of the procedure. The parts other than the merge processing unit 108 are basically the same as the wiring shortening unit 10 of FIG. 3 as described above, but when the end determination unit 104 determines that the merge processing is necessary, the merge processing unit At 108, after the above-described merge processing of the line and the vertex, the change of the constraint graph, and the correction of the load, the processing is continued again.

The end determination unit 104 determines whether or not the merging process is necessary, for example, by the end determination unit 104.
In the case where the number of accumulations determined to perform the line inversion process is equal to an integral multiple of the specified number, a method of performing a merge process instead of the line inversion process can be considered. For example, assuming that the prescribed number of times is 4, after the line inversion processing is performed three times, if it is determined that the line inversion processing is to be performed, the merge processing is performed instead of the line inversion processing in that time.

Alternatively, after the above-mentioned ending condition is satisfied, the line processing is performed, the weight determining process and the element moving process are performed again, and then, when the above-mentioned ending condition is satisfied again, the merging process is performed. Above, a method of executing the weight determination processing and the element moving processing again, and when executing the processing cycle again as shown in FIG. 23, always execute the line inversion processing or move the object corresponding to one tree of FIG. When the line inversion processing is executed every time the number of accumulations in which the line inversion processing is performed is equal to an integral multiple of the specified number, a merge processing is performed instead of the line inversion processing. When it is executed, the line inversion processing is always executed, or the line inversion processing is executed every time an object corresponding to one tree in FIG. 24 is moved. Both a method of performing the merge processing when the same conditions as the conditions for performing line inversion process described above (a, b, etc.) is satisfied, various methods are conceivable.

By the way, in the above description, the object does not include both ends of the line in the processing direction. However, it is possible to specify a line that is not to be shortened. In this case, the line that you want to remove
What is necessary is just to handle similarly to other patterns which are not wiring.

It is also possible to specify a specific range of the layout that the user does not want to change the layout. In this case, all the lines included in the specific range may be handled in the same manner as other non-wiring patterns.

The functions described in the present embodiment are as follows.
It can be realized as hardware or software. In the case where the present invention is also realized as software, the present invention can be implemented as a machine-readable medium storing a program for causing a computer to execute the above-described procedures or means.

The present invention is not limited to the above-described embodiments, but can be implemented with various modifications within the technical scope.

[0144]

According to the present invention, a tree is formed by using a plurality of objects having a predetermined positional relationship as nodes, and the load of each node is reduced from the downstream side of the tree toward the upstream side. Are sequentially obtained while reflecting the load, so that it is possible to easily obtain a group of objects to be moved based on the load, and to efficiently and effectively execute the movement of the object that reduces the cost of wiring. it can.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating an example of a configuration of a compaction processing apparatus according to an embodiment of the present invention.

FIG. 2 is a flowchart illustrating an example of a processing procedure of a compaction device according to an embodiment of the present invention.

FIG. 3 is a diagram illustrating an example of an internal configuration of a wiring shortening unit;

FIG. 4 is a flowchart illustrating an example of a processing procedure of a wiring shortening unit;

FIG. 5 is a flowchart illustrating an example of a procedure of a weight determination process and an element moving process of the wiring shortening unit.

FIG. 6 is a diagram showing an example of a layout pattern.

FIG. 7 is a diagram illustrating an example of a table storing correspondence between each pattern, a vertex, and relative coordinates;

FIG. 8 is a diagram showing another example of a layout pattern.

FIG. 9 is a diagram illustrating an example of a tree for explaining a load;

FIG. 10 is a diagram illustrating an example of an arrangement state of objects.

FIG. 11 is a diagram illustrating an example of an arrangement state of objects.

FIG. 12 is a diagram showing an example of an arrangement state of objects.

FIG. 13 is a diagram illustrating an example of an arrangement state of objects.

FIG. 14 is a diagram showing an example of a constraint graph.

FIG. 15 is a diagram showing an example of a constraint graph.

FIG. 16 is a diagram showing an example of a constraint graph.

FIG. 17 is a diagram illustrating an example of a constraint graph.

FIG. 18 illustrates an example of a tree.

FIG. 19 shows an example of a tree.

FIG. 20 shows an example of a tree.

FIG. 21 shows an example of a tree.

FIG. 22 is a flowchart illustrating another example of the procedure of the wiring determination section weight determination processing and element movement processing;

FIG. 23 is a flowchart illustrating another example of the processing procedure of the wiring shortening unit;

FIG. 24 is a flowchart showing still another example of the processing procedure of the wiring shortening unit;

FIG. 25 is a diagram for explaining a merge process;

FIG. 26 is a diagram showing another example of the internal configuration of the wiring shortening unit.

FIG. 27 is a flowchart illustrating an example of a processing procedure including a merging process of a wiring shortening unit;

FIG. 28 is a diagram showing an example of a configuration of a conventional compactor.

FIG. 29 is a diagram for explaining area reduction processing;

FIG. 30 is a diagram for explaining a constraint graph.

FIG. 31 is a diagram showing an example of a general constraint graph having a sink and a source

FIG. 32 is a diagram illustrating an example of an arrangement state of objects.

FIG. 33 is a diagram showing an example of a tree for explaining accumulated values;

FIG. 34 is a diagram showing an example of another tree for explaining accumulated values;

[Explanation of symbols]

 2. Device input unit 4. Processing direction determination unit 6. Constraint graph creation unit 8. Area reduction unit 10. Wiring reduction unit 12. Termination determination unit 14. Output unit 100. Weight determination unit 102. Element moving unit 104. Termination determination. Unit 106: line inversion unit 108: merge processing unit

Claims (11)

[Claims] An object according to claim 1, wherein a specific object in a wiring pattern formed by wiring between objects is moved in accordance with a load indicating performance of wire shortening in consideration of a priority set for each wire, thereby reducing the length of said wire. A wiring shortening processing method for shortening, wherein a tree is formed by using a plurality of objects having a predetermined positional relationship as nodes, and for each of the trees, sequentially from a leaf side of the tree,
A wiring that calculates a load of a parent node for the child node based on a load of the child node, and specifies, as a movement target, an object corresponding to a tree part having a node having a load satisfying a predetermined condition as a root node; Shortening method. 2. The predetermined positional relationship is a relationship in which two objects are located at a limit distance within which the two objects can approach each other.
Of the two objects in the tree, the object located upstream in the object movement direction is a parent node, the object located downstream is a child node, and the load of a node having no child nodes including a leaf node is calculated by When the node is moved, the wiring is expanded when the node is moved, but the shortening priority is given from the sum of the shortening priorities, when the node is moved from the wiring line having one end to the node, the wiring is shortened. Weights obtained by subtracting the sum of the degrees, the load of the node having the child node is added to the weight value of the node,
The load according to claim 1, wherein all of the positive values of the loads of the child nodes of the node are added, and the predetermined condition to be satisfied by the load is that the load is a negative value. Wiring shortening processing method. 3. The movement for reducing the layout area is to move the object so as to be packed as close as possible on one side in the one-dimensional compaction direction. 3. The wiring shortening processing method according to claim 1, wherein the objects are sequentially moved from an object located on the other side in the compaction direction. 4. A condition that two times that all objects could not be moved even after the above procedure was repeated, a condition that all objects could not be moved even after the above procedure was performed, and the number of repetitions were defined. An end condition consisting of one of the conditions exceeding the number of times and the condition that the change in cost corresponding to the weighted total value of the length of each line segment becomes smaller than a specified value or a condition determined by a predetermined combination The method according to any one of claims 1 to 3, wherein the procedure is repeatedly executed until the following condition is satisfied. 5. The object according to claim 1, wherein the relationship between the objects is represented by a constraint graph, and the objects are moved within a range in which the positional relationship between the two ends of the wiring line segment is not reversed. Wiring shortening processing method described in the paragraph. 6. An object in which the object is moved within a range in which the positional relationship between both ends of the wiring line segment does not reverse, and the length of the wiring line segment becomes 0 when the movement of the object is completed. For example, after reversing the positional relationship between both ends of the wiring line segment, correcting the tree structure, and obtaining the load again, the tree portion corresponding to a tree portion having a node having a load satisfying a predetermined condition as a root node is obtained. 4. The wiring shortening processing method according to claim 1, wherein all objects to be moved are moved as a unit. 7. If the object is moved within a range in which the positional relationship between both ends of the wiring line segment does not reverse, and if the length of the wiring line line becomes 0 when the end condition is satisfied, 5. The wiring shortening method according to claim 4, wherein, after reversing a positional relationship between both ends of the wiring line segment, the procedure is repeatedly executed until the end condition is satisfied again. 8. An object in which the object is moved within a range in which the positional relationship between both ends of the wiring line segment does not reverse, and the length of the wiring line becomes 0 or the wiring line when the end condition is satisfied. If there is a tight branch between the two ends of the minute and the corresponding vertex, the ends of the wiring line are merged, and the above procedure is repeatedly executed until the end condition is satisfied again. 5. The wiring shortening processing method according to claim 4, wherein: 9. A convergence state by specifying a portion where a layout change has occurred and displaying a difference between before and after the change or displaying a change state of at least one of the total wiring length and the cost. 5. The method according to claim 4, wherein the number of repetitions input by a user is used as the end condition. 10. A reduction priority of each wiring line is defined by a length of the wiring line, a width of the wiring line, and a mask to which the wiring line belongs.
2. The wiring shortening processing method according to claim 1, wherein the method is a function of a layer. 11. The wiring shortening processing method according to claim 1, wherein a specific design rule and a shortening priority of wiring line classification can be set only for a specific portion of the layout.