JPH1145913A - Film carrier and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To avoid cracking and disconnecting of a wiring pattern formed on a flexible insulation board of a semiconductor device using this film carrier. SOLUTION: A flexible insulation tape 12 has sprockets 14, device holes 18 and a wiring pattern 20, inner leads 24 forming a part of the wiring pattern 20 are formed in the device hole 18, regions between outer leads and inner leads 24 of the wiring pattern 20 are covered with a protection resin film, and a dummy pattern is provided on regions near the corners of the device hole 18 where no wiring pattern exists to thereby eliminate the thermal expansion coefficient difference between the region having no wiring pattern and region having the wiring pattern. Thus neither crack nor disconnection occur at the pattern if the temp. change is repeated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a film carrier having a wiring pattern formed on a flexible insulating substrate and a semiconductor device having a semiconductor chip mounted on the film carrier. The present invention relates to a film carrier and a semiconductor device that do not cause cracks or disconnections in a wiring pattern.

[0002]

2. Description of the Related Art In recent years, a semiconductor device in which a semiconductor chip is bonded to a flexible circuit board and sealed with a resin has been used. As a flexible circuit board which is a component of such a semiconductor device, a film carrier having a wiring pattern formed on a flexible insulating substrate is suitable.

Hereinafter, the structure of a conventional film carrier will be described with reference to FIG. FIG. 7 is a plan view showing the structure of a conventional film carrier. As shown in FIG. 1, the flexible insulating tape 1 has a long shape, and sprocket holes 2 for feeding the tape are provided at equal intervals at both ends in the longitudinal direction.

A device hole 3 is formed at the center of the flexible insulating tape 1 in the width direction, and a wiring pattern 4 is formed around the device hole 3. Here, one end of the wiring pattern 4 protrudes from the edge 5 of the device hole 3 and serves as an inner lead 6 for connection to a semiconductor chip mounted in the device hole 3.

Although not shown, the other end of the wiring pattern 4 (the other end of the inner lead 6) is an outer lead. The wiring pattern 4 located between the outer lead and the inner lead 6, that is, on the flexible insulating tape 1, is formed of a resist (a protective resin film).
To prevent a short circuit between the wiring patterns 4 from occurring.

In such a flexible insulating tape 1, a semiconductor chip 7 is mounted in the device hole 3. The mounting of the semiconductor chip 7 in the device hole 3 is performed by connecting the inner lead 6 to an electrode provided on the semiconductor chip 7. After the semiconductor chip 7 is mounted in the device hole 3, a resin mold 8 is applied around the device hole 3 and the semiconductor chip 7 is sealed to protect the semiconductor chip 7.

[0007]

However, in the above-mentioned conventional film carrier and the semiconductor device using the film carrier, the region 6 without the wiring pattern 4 exists near the four corners of the device hole 3. . The area 6 has a different coefficient of thermal expansion from the area where the wiring patterns 4 are dense. Therefore, when the temperature rises and falls repeatedly, a stress is repeatedly applied to the wiring pattern 4 in the immediate vicinity of the region 6 due to the difference in the amount of thermal expansion, which is increased by the notch effect of the device hole 3, and the wiring pattern 4 is cracked or cracked. There was a problem that disconnection was likely to occur.

In the semiconductor device, a resin mold is applied around the device hole 3. However, since the coefficient of thermal expansion between the resin mold and the flexible insulating tape 1 is different, further repeated stress is applied to the flexible insulating tape 1 as the temperature rises and falls, so that cracks and disconnections are liable to occur. There is a possibility that the properties may be reduced.

Further, when the semiconductor chip 7 is connected to the inner leads 6 protruding from the device hole 3, a jig for performing thermocompression bonding approaches the periphery of the device hole 3.
There is a possibility that stress may be applied to the flexible insulating tape 1 by the radiant heat from the heating and pressing jig.

The present invention pays attention to the above-mentioned conventional problems, and the present invention provides a film carrier in which a wiring pattern is not cracked or disconnected even when temperature changes are repeated, and a disconnection failure of a signal line or a power supply line does not occur. Therefore, it is an object of the present invention to provide a semiconductor device capable of securing sufficient long-term reliability.

[0011]

According to the present invention, a dummy pattern is provided at a corner of a device hole and is provided in a region sandwiched between wiring patterns to make the coefficient of thermal expansion uniform by making the pattern density substantially uniform. This has been made based on the finding that cracks and disconnections can be prevented from occurring in the wiring pattern.

That is, in the film carrier according to the first aspect, a wiring pattern is formed on a substrate, and one end of the wiring pattern projects from a device hole located on the substrate. It is characterized in that a dummy pattern is formed around the device hole so as to make the pattern density substantially uniform. According to the film carrier of claim 1, since the difference in the coefficient of thermal expansion between the wiring pattern area near the device hole and the area without the wiring pattern can be reduced, the two areas can be reduced even if the temperature change is repeated. The stress is not applied to the wiring pattern at the boundary, and the occurrence of cracks and disconnections can be prevented.

3. The film carrier according to claim 2, wherein a wiring pattern is formed on the substrate, and one end of the wiring pattern projects from a device hole located on the substrate. A dummy pattern is formed around the hole so as to be similar to the wiring pattern. According to the film carrier of the second aspect, since the dummy pattern is similar to the wiring pattern in the layout shape, the pattern width, and the pattern interval, the difference in thermal expansion between the wiring pattern area and the area without the wiring pattern can be reduced. For this reason, even if the temperature change is repeated, no stress is applied to the wiring pattern at the boundary between the two regions,
Cracks and disconnections can be prevented.

4. The film carrier according to claim 3, wherein a wiring pattern is formed on the substrate, and one end of the wiring pattern projects from a device hole located on the substrate. It is characterized in that a dummy pattern is formed around the hole so that the thermal expansion coefficient becomes substantially uniform. According to the film carrier according to claim 3, since the difference in thermal expansion between the wiring pattern region and the region without the wiring pattern can be reduced, the wiring pattern at the boundary between the two regions even if the temperature change is repeated. Cracks and disconnection can be prevented without applying stress.

According to a fourth aspect of the present invention, the dummy pattern is formed only on the substrate, and at least one slit is formed in the dummy pattern. According to the film carrier of the fourth aspect, the coefficient of thermal expansion of the region without the wiring pattern can be made closer to the coefficient of thermal expansion of the wiring pattern region near the device hole on the substrate. Also, if a slit is provided so that the inside of the dummy pattern is hollowed out (the dummy pattern is not divided by the slit), it is possible to increase the contact area of the dummy pattern with the film,
It is possible to prevent the dummy pattern from peeling off from the film.

According to a fifth aspect of the present invention, in the film carrier, the dummy pattern is formed only on the substrate, and the dummy pattern comprises a plurality of dummy patterns. According to the film carrier of the fifth aspect, the coefficient of thermal expansion of the region without the wiring pattern can be made closer to the coefficient of thermal expansion of the wiring pattern region near the device hole on the substrate. Therefore, even if the temperature change is repeated, no stress is applied to the wiring pattern at the boundary between the two regions, and the occurrence of cracks and disconnections can be prevented.

According to a sixth aspect of the present invention, in the film carrier, the dummy pattern is substantially parallel to an adjacent wiring pattern. According to the film carrier of the sixth aspect, the coefficient of thermal expansion of the area without the wiring pattern can be made close to the thermal expansion coefficient of the wiring pattern area near the device hole, including the direction.

In the film carrier according to the present invention, a connecting pattern is provided on one side of the dummy pattern, and one side of the dummy pattern is connected by the connecting pattern. According to the film carrier of the seventh aspect, the contact area of the dummy pattern can be increased, so that the dummy pattern can be prevented from peeling off from the film.

In the film carrier according to the present invention, the dummy pattern and the connection pattern are arranged such that the direction of expansion of the dummy pattern and the connection pattern coincides with the resist coating direction. . According to the film carrier of the present invention, when the resist is applied using a jig such as a squeegee, the air is expelled from the connecting portion between the dummy pattern and the connecting pattern. For this reason, air does not remain in the connecting portion, and it is possible to prevent the application jig from being lifted by the residual air and the resist from being blurred.

In the semiconductor device according to the ninth aspect,
A film carrier according to any one of claims 1 to 8, a semiconductor chip, and a sealant for sealing the semiconductor chip. According to the semiconductor device of the ninth aspect, the difference in the coefficient of thermal expansion between the wiring pattern area near the device hole and the area without the wiring pattern in the film carrier can be reduced. Since no stress is applied to the wiring pattern at the boundary, the occurrence of cracks and disconnections can be prevented, and the long-term reliability of the device itself can be ensured.

According to a tenth aspect of the present invention, in the semiconductor device, a dummy pattern is formed in a region of the film carrier where the sealing agent is applied, and the pattern density in the application region is made substantially uniform. According to the semiconductor device of the tenth aspect, the resin mold has a different coefficient of thermal expansion from the film carrier. For this reason, if the sealing agent is present so as to cover the device hole, stress concentrates on the region where there is no device hole pattern due to the difference in the coefficient of thermal expansion described above, and there is a possibility that cracks or disconnections may occur in the wiring pattern near the region. is there. However, since a dummy pattern is formed in the application region of the sealing agent so that the pattern concentration becomes substantially uniform, stress does not concentrate on a specific pattern, thereby preventing cracks and disconnections in the wiring pattern. Can be prevented.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments for a film carrier and a semiconductor device according to the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a plan view showing a film carrier according to the embodiment. As shown in FIG. 1, the film carrier 10 is made of a flexible insulating tape 12 which is a long substrate made of polyimide, glass epoxy, BT resin, polyester or the like, and has sprocket holes 14 at both ends in the width direction. Are provided at equal intervals. By engaging a sprocket (not shown) with the sprocket hole 14, the flexible insulating tape 12 can be moved in the longitudinal direction.

In the center of the film carrier 10, a plurality of rectangular device holes 18 for mounting the semiconductor chip 16 are formed along the tape longitudinal direction (one in the drawing). A wiring pattern 20 made of copper foil is formed around each device hole 18.
And one end of the wiring pattern 20 protrudes from each edge 22 of the device hole 18 as an inner lead 24.

Here, the wiring pattern 20 depends on the convenience of electrodes (not shown) of the semiconductor chip 16 and the film carrier 10.
The wiring is set in advance according to the convenience of the electronic device on which is mounted, and in the figure, the wiring pattern 20 extended from the inner lead 24 is divided into the upper and lower sprocket holes 14 by the input / output side. Has become.

The other end of the wiring pattern 20 (the side opposite to the inner lead 24) is connected to the sprocket hole 1
The outer lead straddles an outer lead hole (not shown) provided in the vicinity of the outer lead hole 4.

The space between the inner lead 24 and the outer lead, that is, the surface of the wiring pattern 20 routed on the flexible insulating tape 12 is covered with a resist (a protective resin film). A short circuit or the like is prevented from occurring.

In such a film carrier 10, the wiring pattern 20 is routed from the inner lead 24, but the device hole 18 has a square shape as shown in FIG. For this reason, there is a region 26 between the wiring patterns 20 drawn from the adjacent edge 22, where the wiring pattern 20 is not drawn.

These regions 26 are formed in the device holes 18.
Are located at the four corners around the
6, a dummy pattern 28 made of copper foil is formed for the purpose of making the pattern density around the device hole 18 substantially uniform. Here, the pattern density represents the ratio of the presence or absence of a wiring pattern in a predetermined area.
8 is formed only on the flexible insulating tape 12 without protruding from the same.

The purpose of making the pattern density substantially uniform is to form a dummy pattern similar to a wiring pattern, or to form a dummy pattern so that the thermal expansion coefficient around device holes becomes substantially uniform. The purpose may be replaced.

FIG. 2 is an enlarged view of a main part showing the form of the dummy pattern 28. As shown in the drawing, the dummy pattern 28 has a form in which the shape of the region 26 where the wiring patterns at the four corners of the device hole 18 are not routed is reduced, and the reduction interval is equal to the pitch amount between the wiring patterns 20. Is equivalent.

As described above, the dummy pattern 28 is
In this configuration, the region where no pattern is formed is eliminated, and the pattern density around the device hole 18 can be made substantially constant. For this reason, the film carrier 10
On the other hand, even if the temperature rises and falls repeatedly, the thermal expansion coefficients of the dummy pattern 28 and the wiring pattern 20 located therearound become substantially equal, so that stress may be applied to the wiring pattern 20 adjacent to the region 26. Absent. Therefore, it is possible to prevent cracks and disconnections from occurring in the wiring pattern 20.

FIG. 3 is an enlarged view of a main part showing a first application example of the dummy pattern. In the figure, since the form other than the dummy pattern is the same as the above-described form, the description will be given with the same number assigned.

As shown in the figure, in the first application example,
The dummy pattern 30 is divided into three in the region 26. The distance between the dummy patterns 30, that is, the width of the slit 32 where no copper foil is formed, is set to be equal to the distance between the adjacent wiring patterns 20.

By configuring the dummy pattern 30 in this manner, the pattern density in the vicinity of the region 26 can be made more uniform, and the coefficient of thermal expansion of the wiring pattern region in the vicinity of the device hole 18 can be reduced. Can be approached. Therefore, even if the temperature change is repeated, no stress is applied to the wiring pattern 20 adjacent to the region, and cracks and disconnections can be prevented.

FIG. 4 is an enlarged view of a main part showing a second application example of the dummy pattern. Note that, also in this figure, since the form other than the dummy pattern is the same as the above-described form, the description will be given with the same number assigned.

As shown in the figure, in the second application example,
A plurality of the dummy patterns 34 are arranged in parallel in the region 26, and their directions are parallel to the adjacent wiring patterns 20. Further, on one side of the dummy pattern 34 formed only in this manner, a connecting pattern 3 for connecting the ends of the dummy pattern 34 is provided.
6 are formed.

By forming the dummy pattern 34 in this manner, the pattern density in the vicinity of the region 26 can be made even more uniform, and the coefficient of thermal expansion of the adjacent wiring pattern 20 can be made more consistent. . Therefore, even if the temperature change is repeated, no stress is applied to the wiring pattern 20 adjacent to the region, and cracks and disconnections can be prevented. If the wiring directions of the adjacent wiring patterns 20 are different as shown in FIG.
What is necessary is just to make the direction of the dummy pattern 34 match the pitch interval of the wiring pattern 20 narrower.

When the shape of the region 26 is tapered, the dummy pattern 34 is also changed according to the shape of the region 26.
The total pattern length becomes shorter. When the entire length of the dummy pattern 34 is reduced, the contact area with the flexible insulating tape 12 is reduced, and the dummy pattern 34 may be separated from the flexible insulating tape 12 due to a decrease in bonding strength. However, since the dummy pattern 34 is provided with the connecting pattern 36, the flexible insulating tape 1
2 and the contact area with the flexible insulating tape 1
2 can prevent the dummy pattern 34 from peeling off. Note that there is no tapered portion in the shape of the region 26,
When it is not necessary to shorten the entire length of the dummy pattern 34 (the dummy pattern 34 and the flexible insulating tape 12).
When a sufficient contact area can be secured), sufficient bonding strength can be secured without providing the connecting pattern 36.

Incidentally, in the second application example shown in FIG.
There is a possibility that the resist cannot be sufficiently applied to the connection portion 40 between the connection pattern 4 and the connection pattern 36, and the resist may be blurred.

When a resist is applied, a jig such as a squeegee for applying the resist drives air from the opening area 42 of the dummy pattern 34 and the connecting pattern 36 to the connecting portion 40 (in the direction of arrow A in the figure). ), The air cannot escape from the connecting portion 40 serving as the dead end, and the jig for resist application rises. In order to solve this problem, the connecting portion 40 needs to be
It is necessary to set the directions of the dummy pattern 34 and the connecting pattern 36 so that the direction toward the substrate coincides with the resist coating direction (the moving direction of the jig, that is, the direction of arrow A in the figure).

FIG. 5 is an enlarged view of a main part showing a modification of the second application example in which countermeasures against resist fading are taken. Note that, in FIG. 11, since the configuration other than the dummy pattern and the connection pattern is the same as that of the second application example, the description will be given by assigning the same numbers.

As shown in FIG.
Are arranged in parallel with the wiring patterns 20 adjacent to the region 26 as in the second application example, and the arrangement pitch is set so that the narrow pitch sides of the wiring patterns 20 located on both sides of the region 26 are the same. You.

In such a film carrier 10, if the resist coating direction is the direction of arrow A, the connecting pattern 46 connecting the ends of the dummy pattern 44 is
As shown in the figure, the dummy pattern 44 is connected to the right end.

When the connecting pattern 46 is set in this manner, when the resist coating jig is moved in the direction of arrow A, the connecting portion 40 between the dummy pattern 44 and the connecting pattern 46 does not become a dead end, Air does not accumulate in the connecting portion 40. Therefore, when the resist is applied to the connecting portion 40, the resist can be applied without being blurred, and thus the pattern can be surely protected.

By the way, in the semiconductor device 48 (see FIG. 6) in which the semiconductor chip 16 is mounted on the film carrier 10 described above, the cracks and disconnections do not occur in the wiring pattern 20 provided on the film carrier 10 even if the temperature changes are repeated. Thus, sufficient long-term reliability can be ensured.

In the semiconductor device 48, the dummy pattern formed on the film carrier 10 is desirably formed in a region where a resin mold serving as a sealant for protecting the semiconductor chip 16 is applied.

FIG. 6 is a sectional view showing the structure of the semiconductor device 48. As shown in the figure, a semiconductor device 48 has a semiconductor chip 16 connected to inner leads 24 projecting from device holes 18 in a film carrier. Here, the semiconductor chip 16 and the inner leads 2
A resin mold 50 is applied from the periphery of the device hole 18 to the inside to protect the semiconductor chip 4, and the semiconductor chip 16 and the inner leads 24 are sealed by the resin mold 50.

In the application range (dimension A in the figure) of the resin mold 50, there is a range (dimension B in the figure) where the resin mold 50 and the flexible insulating substrate 13 punched and formed from the flexible insulating tape 12 overlap. Are the resin mold 50 and the flexible insulating substrate 13
Has a different coefficient of thermal expansion. Therefore, the semiconductor device 4
8 When the ambient temperature changes, the flexible insulating substrate 13
Is applied with a force corresponding to the difference in the coefficient of thermal expansion. Here, in the flexible insulating substrate 13, if there is a region without a pattern in a region where the resin mold 50 and the flexible insulating substrate 13 overlap, force is concentrated on the region without the pattern due to a difference in coefficient of thermal expansion due to the presence or absence of the pattern. There is a possibility that cracks or disconnections may occur in the wiring pattern near the region where there is no defect.

However, since the dummy pattern is formed in the application range of the resin mold 50 so that the pattern density becomes uniform, stress is not concentrated on a specific pattern, thereby preventing a crack or disconnection from occurring in the wiring pattern. Can be prevented.

The effect of the formation of the dummy pattern is greater as the thickness of the flexible insulating tape 12 serving as the base material is thinner. According to various studies by the inventors, it is essential that the thickness of the flexible insulating tape 12 is 2 mil or less. . The thickness of the flexible insulating tape 12 is 2 to
Even if it is 3 mil, the interval (pitch) of the wiring pattern is 1
If it is less than 00 μm, formation of a dummy pattern is indispensable.

Further, the above-mentioned dummy pattern does not provide an interface for establishing electrical continuity between the electrodes of the semiconductor chip and the outside. Further, the dummy pattern does not protrude from the device hole, and does not protrude from the region of the flexible insulating substrate. Is preferably provided only in the.

[0053]

As described above, according to the film carrier of the present invention, a film having a wiring line pattern formed on a substrate and one end of the wiring pattern protruding from a device hole located on the substrate. Carrier, since a dummy pattern is formed around the device hole to make the pattern concentration substantially uniform,
Even if the temperature change is repeated, it is possible to prevent cracks and disconnections from occurring in the wiring pattern.

Further, according to the semiconductor device of the present invention, since the above-described film carrier is used, a disconnection failure of a signal line or a power supply line does not occur, so that sufficient long-term reliability can be ensured.

[Brief description of the drawings]

FIG. 1 is a plan view showing a film carrier according to an embodiment.

FIG. 2 is an enlarged view of a main part showing a form of a dummy pattern 28;

FIG. 3 is an enlarged view of a main part showing a first application example of a dummy pattern.

FIG. 4 is an enlarged view of a main part showing a second application example of the dummy pattern.

FIG. 5 is an enlarged view of a main part showing a modification of the second application example in which countermeasures against resist blurring are taken.

FIG. 6 is a sectional view showing the structure of the semiconductor device 48.

FIG. 7 is a plan view showing a structure of a conventional film carrier.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Flexible insulating tape 2 Sprocket hole 3 Device hole 4 Wiring pattern 5 Edge 6 Inner lead 7 Semiconductor chip 8 Resin mold 10 Film carrier 12 Flexible insulating tape 13 Flexible insulating substrate 14 Sprocket hole 16 Semiconductor chip 18 Device hole 20 Wiring pattern 22 Edge 24 Inner leads 26 Area 28 Dummy pattern 30 Dummy pattern 32 Slit 34 Dummy pattern 36 Connection pattern 40 Connection part 42 Open area 44 Dummy pattern 46 Connection pattern 48 Semiconductor device 50 Resin mold

Claims (10)

[Claims] 1. A film carrier having a wiring pattern formed on a substrate and one end of the wiring pattern protruding from a device hole located on the substrate, wherein a pattern density is substantially uniform around the device hole. A film carrier, wherein a dummy pattern is formed such that 2. A film carrier having a wiring pattern formed on a substrate and one end of the wiring pattern protruding from a device hole located on the substrate, the film carrier being similar to the wiring pattern around the device hole. A film carrier having a dummy pattern formed thereon. 3. A film carrier having a wiring pattern formed on a substrate and one end of the wiring pattern protruding from a device hole located on the substrate, wherein a coefficient of thermal expansion around the device hole is substantially equal. A film carrier having a dummy pattern formed so as to be uniform. 4. The dummy pattern according to claim 1, wherein the dummy pattern is formed only on the substrate, and at least one slit is formed in the dummy pattern. Film carrier. 5. The film carrier according to claim 1, wherein said dummy pattern is formed only on said substrate, and said dummy pattern comprises a plurality of dummy patterns. 6. The film carrier according to claim 4, wherein the dummy pattern is substantially parallel to an adjacent wiring pattern. 7. The film carrier according to claim 5, wherein a connection pattern is provided on one side of the dummy pattern, and one side of the dummy pattern is connected to each other by the connection pattern. 8. The film carrier according to claim 7, wherein the dummy pattern and the connection pattern are arranged such that an expanding direction of the dummy pattern and the connection pattern coincides with a resist coating direction. 9. A semiconductor device comprising: the film carrier according to claim 1; a semiconductor chip; and a sealant for sealing the semiconductor chip. 10. The semiconductor device according to claim 9, wherein a dummy pattern is formed in a region of the film carrier where the sealing agent is applied, and a pattern density in the application region is made substantially uniform.