JPH1141945A - Inverter circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To stabilize the operation of an inverter circuit when starting. SOLUTION: Drive circuits 3-1 to 3-4 drive transistors Q1 to Q4 which constitutes an H-bridge circuit 1. A monitor circuit 10 has a voltage divider and a delay circuit 11 which delays the output voltage of a power source 2 for the H-bridge circuit, a comparator 12 which compares the output of the delay circuit 11 with a reference Vref and a transistor Q5 which is turned on/off, according to the output of the comparator 12. The monitor circuit 10 limits the output of the control circuit 4, until the output voltage of the power source 2 for H-bridge circuit rises.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter circuit having a function of stabilizing an operation at the time of starting.

[0002]

2. Description of the Related Art An inverter circuit is a circuit for converting a direct current into an alternating current, and is widely used for various purposes. FIG. 5 shows an example of a conventional general inverter circuit.

The H-bridge circuit 1 is a main circuit of an inverter circuit and has four arms (transistors Q1 to Q4).
Having. An H-bridge circuit power supply 2 is connected to the H-bridge circuit 1. The H-bridge power supply 2 is, for example, a DC power supply of about 100 to 150V. The drive circuits 3-1 to 3-4 drive the transistors Q1 to Q4, respectively, according to the drive signals from the control circuit 4. The control circuit 4 determines a procedure for operating the H-bridge circuit 1, generates a drive signal for realizing the procedure, and sends it to the drive circuits 3-1 to 3-4. The control / drive power supply 5 is, for example, a DC power supply of 12 V, and the drive circuits 3-1 to 3-3.
-4 and the control circuit 4. In addition,
The driving power supply 5 may be configured to generate the output voltage by stepping down the output voltage of the H-bridge circuit power supply 2.

When an alternating current flows through the load 6, the control circuit 4 first supplies a drive signal for turning on the transistors Q1 and Q4 and turning off the transistors Q2 and Q3. To 3-4.
As a result, the current supplied from the power supply 2 for the H-bridge circuit includes the transistor Q1, the load 6, and the transistor Q1.
It flows in the order of 4. Subsequently, control circuit 4 sends a drive signal for turning on transistors Q2 and Q3 and turning off transistors Q1 and Q4 to drive circuits 3-1 to 3-4. This allows H
The current supplied from the bridge circuit power supply 2 flows in the order of the transistor Q2, the load 6, and the transistor Q3. That is, the load 6 includes the transistors Q1 and Q
A current flows in a direction opposite to that when the switch 4 is turned on. Thereafter, alternating current is supplied to the load 6 by alternately repeating the above two states.

[0005]

Generally, when an electric device is started, that is, when the power is turned on, the output voltage of the power supply does not rise instantaneously but gradually rises to a predetermined value. That is, when the inverter circuit is started, the output voltages of the power supply 2 for the H-bridge circuit and the power supply 5 for control and drive gradually increase.

Therefore, when the inverter circuit is started, for example, the drive circuits 3-1 to 3-4 cannot drive the transistors Q1 to Q4 as instructed by the control circuit 4, or if the H-bridge circuit 1 has a sufficient voltage. In some cases, the inverter operation is started in a state where the power supply is not supplied. Therefore, when the inverter circuit starts,
Its operation was sometimes unstable.

An object of the present invention is to solve the above-mentioned problem and to stabilize the operation of the inverter circuit, particularly the operation at the time of starting.

[0008]

SUMMARY OF THE INVENTION An inverter circuit according to the present invention includes a conversion circuit for converting a DC current supplied from a DC power supply into an AC, a drive circuit for driving the conversion circuit, and an output voltage of the DC power supply. Monitoring the voltage whose output voltage is delayed, and controlling the drive circuit so that the conversion circuit does not perform the conversion operation until the output voltage or the voltage whose output voltage is delayed reaches a predetermined value. A control circuit.

Although the operation of the drive circuit is unstable immediately after the power is turned on, according to the above configuration, the drive circuit drives the conversion circuit until a predetermined period elapses after the power is turned on. do not do. Therefore, performing the conversion operation in an unstable state is avoided.

According to another aspect of the present invention, there is provided an inverter circuit having a plurality of switching elements and converting a direct current into an alternating current, and a capacitor having a capacity for storing electric charges and a part of the switching among the plurality of switching elements. A first driving circuit for driving the element using the electric charge stored in the capacitor, a second driving circuit for driving another switching element of the plurality of switching elements, A control circuit that controls the first and second drive circuits so that the conversion circuit does not perform the conversion operation until a predetermined amount or more of charge is stored in the capacitance of the first drive circuit; Have.

According to the above configuration, the capacitor can be charged immediately after the power is turned on during a period in which the operation of the conversion circuit is restricted. Therefore, at the time when the conversion circuit starts the conversion operation, the capacity is already sufficiently charged, and thereafter, a stable conversion operation can be performed.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a configuration diagram of the inverter circuit of the present embodiment. Among the codes used in FIG. 1, the same codes as those used in FIG. 5 (1 to 6, Q
1 to Q4) represent the same object. That is, in the inverter circuit of the present embodiment, similarly to the conventional inverter circuit shown in FIG. 5, according to the drive signal generated by the control circuit 4, the drive circuits 3-1 to 3-4 respectively include the transistors Q1 to Q4.
By appropriately controlling on / off of the DC / DC converter 4, the DC output from the power supply 2 for the H-bridge circuit is converted into an AC and supplied to the load 6. At this time, the control circuit 4 turns on the transistors Q1 and Q4,
A drive signal for turning off transistors 2 and Q3 and a drive signal for turning off transistors Q2 and Q3 and turning off transistors Q1 and Q4 are output alternately in time series.

The inverter circuit of this embodiment is different from the conventional inverter circuit shown in FIG. In the present embodiment, as an example, the control / drive power supply 5 is configured to generate the output voltage by lowering the output voltage of the power supply 2 for the H-bridge circuit.

The monitoring circuit 10 monitors whether or not the driving circuits 3-1 to 3-4 can stably drive the H-bridge circuit 1 when the power is turned on (when the inverter circuit is started). . The monitoring circuit 10 includes the driving circuit 3
Until -1 to 3-4 are in the above state, the drive circuits 3-1 to 3-3 are set so that the H-bridge circuit 1 does not perform the conversion operation.
-4 is restricted.

Whether or not the drive circuits 3-1 to 3-4 can stably drive the H-bridge circuit 1 is determined based on, for example, a lapse of time from when the power is turned on. That is, as will be described in detail later, the driving circuits 3-1 to 3-4
Have a capacitor for storing charges for driving the connected transistors Q1 to Q4, and when no charge of a predetermined amount or more is stored in the capacitor, the corresponding transistor Q1 to Q4 Cannot be driven stably. Therefore, the monitoring circuit 1
0 measures the time from when the power is turned on until the predetermined amount of charge is stored in the capacitor, and limits the operation of the drive circuits 3-1 to 3-4 until the time elapses. I do. It is easy to calculate in advance the time until a predetermined amount or more of charge is stored in the capacitor based on the capacitance of the capacitor and the current value supplied to the capacitor.

FIG. 2 is a specific configuration diagram of the inverter circuit of the present embodiment. The monitoring circuit 10 divides and delays the output voltage of the power supply 2 for the H-bridge circuit and a comparator 1 that compares the output of the voltage divider / delay circuit 11 with a preset reference voltage Vref.
2, and a transistor Q5 whose on / off state is controlled according to the output of the comparator 12. Monitoring circuit 1
0 is output to the drive circuits 3-1 to 3-
4 is input. The output line of the monitoring circuit 10 and the output line of the control circuit 4 are diode-OR connected, and the control circuit 4 is connected only when the output of the monitoring circuit 10 is at "L" level.
Are transmitted to the drive circuits 3-1 to 3-4.

FIG. 3 is a circuit diagram of a main part of the inverter circuit of the present embodiment. The driving circuits 3-1 and 3-3
Has the same configuration as the drive circuits 3-2 and 3-4, respectively, and therefore, illustration and description thereof are omitted here.
The drive circuit 3-2 has a capacitor C1 for storing a charge for holding the transistor Q2 in an ON state. Electric charges are accumulated in the capacitor C1 when the drive signal output from the control circuit 4 is at the “L” level. On the other hand, the drive circuit 3-4 has a transistor Q6 for driving the transistors Q2 and Q4 so that they are in different states.

Next, the operation of the inverter circuit according to this embodiment will be described with reference to FIGS. FIG.
FIG. 4 is a timing chart illustrating the operation of the inverter circuit shown in FIG. 3.

When the inverter circuit is started, that is, when the power is turned on, first, the output voltage of the power supply 2 for the H-bridge circuit gradually increases. In addition, the output voltage of the control / drive power supply 2 also increases accordingly. Here, the normal output voltage of the H-bridge circuit power supply 2 is, for example, 100 to 150 V, while the normal output voltage of the control / drive power supply 2 is, for example, 12 V. It is assumed that the power source 2 for the battery reaches a stable state earlier than the power source 2 for the H-bridge circuit.

The monitoring circuit 10 includes a power supply 2 for the H-bridge circuit.
Is compared with a preset reference voltage Vref. Specifically, first, the voltage divider / delay circuit 11
Outputs a voltage obtained by dividing and delaying the output voltage as a voltage. The comparator 12 compares this voltage with the reference voltage Vref, and outputs an “L” level if the reference voltage Vref is higher, and outputs an “H” level if the voltage is higher. Here, immediately after the power is turned on, H
Since the output voltage of the bridge circuit power supply 2 gradually increases, the voltage is lower than the reference voltage Vref, and the comparator 12 outputs the “L” level.

Transistor Q5 is, for example, a pnp transistor, and is turned on when an "L" level is received as a control signal, and turned off when an "H" level is received. Therefore, immediately after the power is turned on, the comparator 1
2 outputs the “L” level, so that the transistor Q5 is turned on. While the transistor Q5 is in the ON state, the output of the monitoring circuit 10 becomes substantially the same as the output voltage of the control / drive power supply 2. Therefore, immediately after the power is turned on, the drive circuits 3-1 to 3-4 receive signals as signals.
The output voltage of the control / drive power supply 2 is applied.

When the output voltage ("H" level signal) of the control / drive power supply 2 is applied to the drive circuits 3-2 and 3-4, the transistor Q6 is turned on. The “L” level is input, while the “H” level is input to the gate terminal of transistor Q4. As a result, the transistor Q2 is turned off and the transistor Q4 is turned on. At this time, the capacitor C1 is being charged. Drive circuit 3-
1, 3-3 and the operations of transistors Q1, Q3 are:
The operation is the same as that of the driving circuits 3-2 and 3-4 and the transistors Q2 and Q4 described above. That is, when the power is turned on, the output voltage ("H" level signal) of the control / drive power supply 2 is applied to the drive circuits 3-1 and 3-3, and the transistor Q1 is turned off and the transistor Q3 Is turned on.

As described above, transistors Q1 and Q2
Are turned off at the same time, no current flows through the H-bridge circuit 1. That is, in the inverter circuit according to the present embodiment, after the power is turned on, the H-bridge circuit 1 does not perform the conversion operation while the transistor Q5 is in the on state.

As described above, the output line of the control circuit 4 and the output line of the monitoring circuit 10 are diode-OR connected. Therefore, even if the control circuit 4 outputs a drive signal and the like during this period, the drive circuits 3-1 to 3-
4 continues to be input at "H" level, and the transistor Q1
Since H and Q2 are simultaneously turned off, the H-bridge circuit 1 does not perform the conversion operation. Thus, the monitoring circuit 10
The H bridge circuit 1
Are controlled not to perform the conversion operation.

The output voltage of the power supply 2 for the H-bridge circuit is
It rises further over time. When the output voltage of the voltage divider / delay circuit 11 is higher than the reference voltage Vref,
At that timing, the output of the comparator 12 becomes "H" level, and the transistor Q5 is turned off. When the transistor Q5 is turned off, the output of the monitoring circuit 10 becomes “L” level, and the drive signal output from the control circuit 4 and thereafter are input to the drive circuits 3-1 to 3-4.

The driving signal output from control circuit 4 is a signal for driving the left arm (transistors Q1 and Q3) and the right arm (transistors Q2 and Q4) of H-bridge circuit 1, respectively. Here, the drive signal and “H” as shown in FIG.
The level period and the “L” level period are signals inverted from each other.

When an "L" level signal is input to drive circuits 3-2 and 3-4, transistor Q6 is turned off and capacitor C1 is charged first, so that the gate terminal of transistor Q2 is connected to the gate terminal of transistor Q2. "H" level is input. Here, if a predetermined amount or more of electric charge is not stored in the capacitor C1, the level of the signal input to the gate terminal of the transistor Q2 becomes unstable. However, in the inverter circuit of the present embodiment, immediately after the power is turned on, Since the capacitor C1 has been sufficiently charged according to the instruction from the monitoring circuit 10, the signal level input to the gate terminal of the transistor Q2 is stable. On the other hand, an “L” level is input to the gate terminal of transistor Q4. As a result, the transistor Q2 is turned on and the transistor Q4 is turned off. Similarly, when an “L” level signal is input to drive circuits 3-1 and 3-3, transistor Q1 is turned on and transistor Q3 is turned off.

Here, as described above, since the drive signal output from control circuit 4 is a signal whose signal level is inverted with respect to each other, drive circuits 3-1 and 3-
When the “L” level signal is input to the drive circuit 3, the “H” level signal is input to the drive circuits 3-2 and 3-4, and conversely, the “H” level is applied to the drive circuits 3-1 and 3-3. When a level signal is input, an “L” level signal is input to drive circuits 3-2 and 3-4. Therefore, the output voltage of the power supply 2 for the H-bridge circuit increases, and the drive signal and the drive circuits 3-1 to 3-4
, The transistors Q1 and Q1
4 is on, transistors Q2 and Q3
Are off, and when transistors Q1 and Q4 are off, transistors Q2 and Q3 are on. As a result, the current flowing through the load 6 becomes an alternating current as shown in FIG.

In the above configuration, the time from when the power is turned on to when the transistor Q5 is turned off, that is, the voltage dividing / delaying circuit 11
The resistance value and the capacitance of the voltage dividing / delay circuit 11 are determined so that the time until the output voltage becomes higher than the reference voltage Vref becomes longer than the charging time of the capacitor C1 shown in FIG. With such a configuration, the capacitor C1 shown in FIG. 3 can be sufficiently charged while the conversion operation of the H-bridge circuit 1 is stopped after the power is turned on. The drive circuits 3-1 to 3-4 can drive the transistors Q1 to Q4 stably.

In the above-described embodiment, the output of the power supply 2 for the H-bridge circuit is used instead of measuring the time until the capacitor for storing the charges for driving the transistors constituting the H-bridge circuit is sufficiently charged. Although the rise time of the voltage is used, other time measuring means may be used.

In the above embodiment, a part of the plurality of drive circuits has a capacitor for storing electric charge for driving a transistor constituting the H-bridge circuit. However, the present invention is not limited to this. It is not limited to the configuration. That is, the present invention, after turning on the power,
It is widely applied to a configuration in which a drive circuit that drives a DC / AC converter is controlled so that the drive circuit does not drive the DC / AC converter until the operation of the drive circuit is stabilized.

[0032]

Since the inverter operation is performed after the state of the drive circuit is stabilized, the operation of the entire inverter circuit is stabilized. At this time, since the bias of the arm element of the DC / AC conversion circuit is reliably applied, the stress is reduced.

Since the configuration is such that the voltage of a predetermined portion in the inverter circuit is monitored instead of directly monitoring the state of the drive circuit, the inverter circuit capable of obtaining a stable operation is
It can be realized with a small number of parts and at low cost.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an inverter circuit according to an embodiment.

FIG. 2 is a specific configuration diagram of the inverter circuit of the present embodiment.

FIG. 3 is a circuit diagram of a main part of the inverter circuit according to the embodiment.

FIG. 4 is a timing chart for explaining the operation of the inverter circuit according to the embodiment;

FIG. 5 is a configuration diagram of an example of a conventional general inverter circuit.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 H bridge circuit 2 H bridge circuit power supply 3-1 to 3-4 drive circuit 4 control circuit 5 control / drive power supply 10 monitoring circuit 11 voltage divider / delay circuit 12 comparator

Claims (3)

[Claims] 1. A conversion circuit for converting a DC current supplied from a DC power supply to an AC, a drive circuit for driving the conversion circuit, and monitoring an output voltage of the DC power supply or a voltage obtained by delaying the output voltage. A control circuit that controls the drive circuit so that the conversion circuit does not perform a conversion operation until the output voltage or a voltage obtained by delaying the output voltage reaches a predetermined value. 2. A switching circuit having a plurality of switching elements, converting a direct current into an alternating current, and a capacitor for storing electric charges, wherein a part of the plurality of switching elements is stored in the capacitor. A first driving circuit that drives the switching element using the electric charge, a second driving circuit that drives another switching element of the plurality of switching elements, and a power supply that turns on the first driving circuit by the power supply. A control circuit that controls the first and second drive circuits so that the conversion circuit does not perform a conversion operation until a predetermined amount or more of charge is stored in the capacitor. A delay circuit for delaying a rise of a power supply voltage; and a monitoring circuit for monitoring whether an output of the delay circuit has exceeded a preset voltage value. 3. The method according to claim 2, wherein the first and second driving circuits are controlled so that the conversion circuit does not perform the conversion operation until the output of the delay circuit exceeds the preset voltage value. Inverter circuit.