JPH1140696A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the reliability of a PGA(ball grid array) package when the package is mounted on a connecting wiring board with solder, by improving the heat characteristic (heat radiating property) and electrical characteristic of the PGA package and, in addition, dispersing heat. SOLUTION: In a semiconductor device, heat conductor layers 209 are respectively provided at the connecting section between a wiring board and an integrated circuit chip 203 and its periphery on one surface of the wiring board and on the other surface of the wiring board opposite to the surface connected to the chip 203 within such extents that the layers 209 have no electrical contact. The layers 209 are stuck to the wiring board with an epoxy- or siliconebased adhesive 205. It is preferable to mix silver in the adhesive 205 so as to improve the heat conductivity of the adhesive 205. When a higher heat radiating property and a higher electrical characteristic are required, the thicknesses of the heat conductor layers 209 are increased. Therefore, the heat property, electrical characteristic, and reliability of the semiconductor device are improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device such as an integrated circuit, and more particularly to a low-cost and high-performance package for an integrated circuit device package having enhanced thermal and electrical characteristics.

[0002]

2. Description of the Related Art In response to demands for higher functionality of electronic devices,
The input / output terminals of the integrated circuit chips used for them are steadily increasing. Therefore, in a conventional type in which terminals are arranged around a package centered on a QFP (quad flat package), the package itself has to be enlarged according to the size and number of terminals. Therefore,
A package has been devised in which input / output terminals called BGA (ball grid array) are arranged on the lower surface. The BGA makes it possible to reduce the size of the package and increase the number of pins, and enables high-density mounting on the same printed wiring board.

[0003] When a BGA is used, the connection wiring can be shortened, so that the electrical performance can be improved.
However, BGAs have the disadvantages of package warpage and poorer reliability than QFP. That is, except for these weaknesses, the package structure is very useful in structure, so that the above-mentioned warpage and improvement in reliability are indispensable. In order to improve the warpage, reliability, and thermal characteristics of the BGA, a package having a heat radiating plate called an M-BGA (metal-ball grid array) has been developed. However, the manufacturing cost of the structure (especially,
The cost of the connection wiring board) is high, and it is difficult to adopt it for low-cost electronic equipment.

FIG. 1 shows a cross-sectional view of a prior art BGA 100 having an integrated circuit chip 103. This prior art B
The GA 100 has no or few conductor layers under the integrated circuit chip 103 and the adhesive 105 on the connection wiring board 110. Also, there is no or few conductor layers on the opposite side of the connection wiring board 110 at the same location. Therefore, the BGA package structure is not fully utilized in terms of package warpage, reliability, thermal characteristics, and the like.

First, the conductive pattern 106 has a small area, and the heat generated by the integrated circuit chip 103 cannot be sufficiently released. In addition, the BGA is a single-sided sealing due to its structure, and a difference in thermal expansion coefficient between the insulating sealing material 108 and the connection wiring board 110 causes non-uniform stress and warpage of the package. Due to this warp, a coplanarity defect occurs, which causes a problem when mounted on a printed circuit board (not shown).

[0006] Further, since the BGA uses a substrate for connection due to its structure, moisture absorption is inevitable. The connection wiring board 1 that has absorbed moisture due to thermal stress during solder mounting due to the moisture absorption.
10 In particular, the moisture in the adhesive 105 evaporates and explodes, and the adhesive 1
Separation occurs between the substrate 05 and the connection wiring substrate 110. This peeling is transmitted along the interface between the insulating sealing material 108 and the connection wiring board 110, and the integrated circuit chip 103 and the connection wiring board 110 are separated.
The connection thin wire 104 for electrical connection with the upper conductive wiring pattern 107 is disconnected.

[0007]

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a low-cost BGA which has excellent heat dissipation, reduces warpage of a package, and has excellent reliability and electrical characteristics.

[0008]

According to the present invention, there is provided a packaged integrated circuit device including a low-cost BGA with improved thermal conductivity. A BGA package encapsulated integrated circuit device according to one embodiment of the present invention includes a connection wiring substrate having at least one conductor wire material layer and at least one insulating material layer formed on the surface or inside. A plurality of contacts electrically connected to at least one of the conductor wire material layers are provided on the second surface of the first and second surfaces of the connection wiring board. These contacts consist of solder balls for electrically connecting the BGA package to the printed wiring board.

A conductive material layer has a first surface of the connection wiring board and a second surface formed on the back of the first surface, which is exposed to the outside or formed inside the package. However, it is necessary to provide a conductor layer in a range that does not have an electrical contact on a part of the first surface of the connection wiring board. This conductive material layer linearly co-expands with the first surface and the second surface of the connection wiring board. Further, the conductor layer on the first surface of the connection wiring board, the integrated circuit chip, and the at least one conductor wire layer formed inside or on the surface of the integrated circuit chip and the connection wiring board are connected to each other. In the package in which the conductive thin wires are sealed with an insulating sealing material, the conductive material layer on the first surface of the connection wiring board and the conductive material layer on the second surface of the connection wiring board are provided with heat dissipation holes. Thermally and electrically connected. An integrated circuit chip is disposed on the conductor layer on the first surface of the connection wiring board by an adhesive, and between the integrated circuit chip and the at least one conductor wire layer formed inside or on the surface of the connection wiring board. A package-sealed integrated circuit device wherein said connection means comprises a plurality of conductive wires. Further, the conductor layer on the first surface of the connection wiring board, the integrated circuit chip, and the at least one conductor wire layer formed inside or on the surface of the integrated circuit chip and the connection wiring board are connected to each other. A package-sealed integrated circuit device in which the conductive thin wire is sealed with an insulating sealing material.

[0010]

FIG. 2 is a cross-sectional view of a BGA package 200 of the present invention including an integrated circuit chip 203 and a thermal conductor (conductive material layer) 209. FIG. The integrated circuit chip 203 has a first surface on which a chip contact pad 220 is provided. The contact pad 220 enables an electrical connection from the integrated circuit chip 203 to the outside. The integrated circuit chip 203 is connected to the heat conductor 209 by an adhesive 205. The adhesive 205 is an epoxy or silicone adhesive. Preferably, silver is included to improve the thermal conductivity. The integrated circuit chips 203 are connected by the adhesive 205, and a sheet / film may be used depending on the application.

If the heat conductor (conductive material layer) 209 has the same thickness as the conductor wire layer 207 provided on the connection wiring board, the connection wiring board can be formed in the same manner as in the conventional case, but it is easy. If heat radiation and electrical characteristics are required, the heat conductor 20
9 may be made thicker.

By adopting the above-mentioned structure, the electric characteristics become advantageous. When the operating voltage of the IC is 5 V, the margin on the ground side is extremely smaller than the margin on the power supply side. Therefore, the structure on the ground side is very important for improving the electrical characteristics of the package. When the power supply voltage is reduced from 5 V to 3.3 V, the power supply side may be processed in the same manner. Since energy flows as the output buffer is turned on and off, a voltage drop occurs due to the effective inductance of the entire wiring path. In addition, crosstalk occurs due to electromagnetic induction between adjacent wirings. These noises take on the voltage drop and become large voltages. If this exceeds the noise margin of the receiving buffer, a signal malfunction will occur. Therefore, it is necessary to increase the noise margin. Therefore, it is necessary to increase the electric capacity of the package.

The capacitance of the parallel plate capacitor is obtained by the following equation.

C = εS / d S: area of flat plate, d: distance of parallel flat plate, ε: specific value As is apparent from the above equation, in order to increase C, S
Need to be larger.

By arranging the conductor layers on both sides of the connection wiring board, thermal stress at the time of solder mounting and warpage of the package are increased.

[0016]

As described above, it is possible to avoid difficulty in surface mounting of a fine lead pitch plastic package, reduce the size of the package, and achieve high-density mounting while following the conventional manufacturing process. Improve electrical characteristics by shortening connection lines. In addition, since the conductor having a linear co-expansion coefficient is provided on both surfaces of the connection wiring board, excellent thermal characteristics, and
Has package warpage. Furthermore, since the conductor (metal etc.) is provided for the blister of the package due to thermal stress at the time of solder mounting, it promotes heat dispersion,
It is also resistant to thermal stress and its reliability is improved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a BGA package 100 according to the related art.

FIG. 2 is a sectional view of a BGA package 200 of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 100 Conventional type BGA package 103, 203 Integrated circuit chip 104 Conductive thin wire 105, 205 Adhesive 106 Conductive pattern 108 Insulation sealing material 110 Connection wiring board 200 BGA package 209 Conductor 220 Chip contact pad

Claims (6)

[Claims] 1. A packaged integrated circuit device, comprising: a connection wiring substrate including at least one conductor wire material layer and an insulating layer inside or on a surface thereof, wherein the first surface is opposite to the surface. A connection wiring board having a second surface having a plurality of electrical contacts electrically connected to the at least one conductor wire material layer, and the first surface of the connection wiring board A second surface which is opposite to the first surface and which is exposed to the outside of the package-sealed integrated circuit device, wherein the at least one conductor wire layer formed inside or on the surface of the wiring board; A semiconductor device having an electrical connection with the integrated circuit chip. 2. The semiconductor device according to claim 1, wherein a conductive layer is provided on a part of the first surface of the connection wiring board so as not to have an electrical contact. 3. The semiconductor device according to claim 1, wherein a conductor layer is provided on a part of the second surface of the connection wiring board so as not to have an electrical contact. 4. The semiconductor device according to claim 1, wherein a conductive layer is provided on the first or second surface of the connection wiring substrate and on both surfaces thereof as far as there is no electrical contact. 5. An integrated circuit chip is disposed on the conductor layer on the first surface of the connection wiring board with an adhesive, and the at least one conductor formed inside or on the surface of the integrated circuit chip and the connection wiring board. 5. The semiconductor device according to claim 4, wherein said connection means comprises a plurality of conductive thin wires between the wire layer. 6. The conductor layer on the first surface of the connection wiring board, the integrated circuit chip, and the at least one conductor wire layer formed inside or on the surface of the integrated circuit chip and the connection wiring board, and 6. The semiconductor device according to claim 5, wherein the conductive thin wire connecting the first and second wires is sealed with an insulating sealing material.