JPH114033A - Light-emitting element drive circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a light-emitting element drive circuit of little power consumption, capable of high-speed switching operation. SOLUTION: In this light-emitting element drive circuit for which an external light-emitting element, a switch circuit to be turned on/off corresponding to input data signals and a constant current source circuit for supplying a drive current to the light-emitting element when a switch is on are connected serially, a bias supply circuit connected to the current supply terminal of the constant current source circuit for keeping the constant current source circuit when the switch is off in the supply state of a current IB smaller than a light-emitting element drive current IP is provided. In such a constitution, high-speed switching operation is made possible by not completely turning off the constant current source circuit, when the switch is off. Also, by keeping it in the supply state in which the current IB is smaller than that of the light-emitting element drive current IP, the power consumption is small.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting element driving circuit, and more particularly, to an external light emitting element, a switch circuit for turning on / off according to an input data signal, and supplying a driving current to the light emitting element when the switch is on. The present invention relates to an improvement in a light emitting element driving circuit in which a constant current source circuit is connected in series.

[0002] In recent years, in the field of optical communication, digital optical communication in which a laser diode (LD) or the like is pulse-driven for the purpose of transmitting a large amount of information has become widespread. In addition, not only high-speed but also low-power consumption of the light-emitting element driving circuit has become an important issue.

[0003]

2. Description of the Related Art FIGS. 8 and 9 are diagrams (1) and (2) for explaining a conventional technology. FIG. 8A is a diagram showing a conventional LD drive circuit, in which a laser diode LD and an nMOSFE
The figure shows a case where a switch circuit made of TQ1 and a constant current source circuit made of Q3 are connected in series.

The input data signal DT = 1 (high level)
, Q1 and Q3 are simultaneously turned on, and the LD emits light. In this case, the drive current I _p of the LD is limited to a required value by the gate bias voltage V _g of Q3, thereby a constant light output from the LD is obtained. When the input data signal DT becomes 0 (low level), Q1 and Q3 are simultaneously turned off and the LD is turned off.

FIG. 8B shows a current-light output characteristic of an example LD. The LD emits light (oscillates) when a current equal to or higher than the threshold current Ith flows, and an optical output proportional to the drive current Ip is obtained. Generally, the optical output characteristics of an LD have temperature dependence, and when it comes to the threshold current, Ith (characteristic) increases with temperature.
To Ith '(characteristic). Therefore, in order to obtain a constant optical output irrespective of the temperature fluctuation, the nMOSF
A bias current control circuit including ETQ4 is provided. The bias current control circuit Q4 supplies a bias current Ib / Ib 'near the threshold current Ith / Ith' to the LD in accordance with an optical output constant control signal APC fed back from an optical output monitor circuit (or an LD operating temperature detection circuit) (not shown). Shed.

In some cases, the light output characteristic of the LD may fall down as shown by a characteristic 'with a rise in temperature. In this case, the light output constant control signal APC is fed back to the gate of Q3 at the same time, thereby driving the LD. The amplitude of the current Ip is temperature controlled. FIG. 9A shows the VI characteristics of an example nMOSFET element. In the figure, the horizontal axis is the drain-source voltage V _DS , and the vertical axis is the drain current I _DS .
In the enhancement type nMOSFET, the gate-source voltage V _GS is equal to the threshold voltage (channel formation voltage) V _{T of the element.}
, The drain current I _DS = 0 regardless of the drain-source voltage V _DS . In the range of V _GS > V _T ,
It is known that the following drain current I _DS flows before and after pinch-off (linear operation region) and after pinch-off (saturation region) of the element, respectively.

Before pinch-off (V _DS <V _GS −V _T ), I _DS = K _n ｛2 (V _GS −V _T ) V _DS −V _DS ² ｝ (1) After pinch-off (V _DS ≧ V _GS − In (V _T ), I _DS = K _n (V _GS −V _T ) ² (2) where K _n = (με / 2t) · (W / L) where K _n : current parameter μ: carrier of the channel Mobility ε: dielectric constant of gate oxide t: thickness of gate oxide W: width of channel L: length of channel A case where an element having such characteristics is applied to the constant current source circuit Q3 will be described. If an attempt is made to supply I _p = 20 mA to the LD, V _g (V _GS3 ) = 6V. LD for I _p = 20m
If V _DS3 = 6 V when A is flowing, the operating point of Q3 is Q.

According to the configuration of FIG. 8A, when the input data signal DT = 0, both Q1 and Q3 are turned off, so that I _p ( _IDS3 ) = 0 of Q3 and V _DS3 = 0V. .
Therefore, this type of LD drive circuit is a low power consumption type circuit since I _p = 0 when the LD is not emitting light. However, after that, the data signal DT = 1 and Q
1, Q3 to obtain a desired light output turns ON LD Both, V _DS3 of Q3 is must rise to at least 4V (pinch-off point) from 0V. And Q3
_{Has a} drawback that the rise of I _p (V _DS3 ) is delayed due to the presence of the parasitic capacitance Cs and the like in the drain portion, and the response of the optical output is delayed.

FIG. 9B is a diagram showing another conventional LD drive circuit, in which a current switch circuit for switching the LD drive current is provided. nMOSFET Q1,
Q2 forms a differential pair (current switch circuit). A common source is connected to the constant current source circuit Q3, a load resistor RL is connected to the drain of Q1, and an LD is connected to the drain of Q2.
Are connected respectively. Here, the resistance value of the resistor RL is generally selected such that I _p = I _{l in accordance} with the requirement of the symmetry of the circuit.

On the other hand, the input data signal DT is converted into a balanced data signal by the buffer circuit BF. The inverted signal DT / is input to the gate of Q1 and the non-inverted signal DT is input to the gate of Q2. . As a result, when the input data signal DT = 1, Q1 = OFF, and when Q2 = ON, L
When D is turned on and the data signal DT = 0, Q1 = O
It goes out when N, Q2 = OFF.

In such a configuration, the constant current source circuit Q3 supplies the constant current _Ip regardless of whether the LD is turned on or off. As a result, balanced data signals DT and DT / are applied to the gates of Q1 and Q2, respectively.
_DS3 is kept constant regardless of current switching. Therefore, this type of LD drive circuit is suitable for high-speed switching operation.

However, since the constant current source _Ip always flows through the constant current source circuit Q3, there is a disadvantage that power consumption is increased.

[0013]

As described above, in the conventional light emitting element driving circuit, the switching speed becomes slower when priority is given to low power consumption, and the power consumption increases when priority is given to switching speed. It was difficult to achieve both operation and low power consumption. The present invention has been made in view of the above-described drawbacks of the related art, and has as its object to provide a light-emitting element driving circuit that can perform high-speed switching operation and consumes less power.

[0014]

The above-mentioned problem is solved, for example, by referring to FIG.
Is solved. That is, the light emitting element driving circuit of the present invention (1) comprises an external light emitting element, a switch circuit for turning on / off according to an input data signal, and a constant current for supplying a driving current _Ip to the light emitting element when the switch is turned on. In a light emitting element drive circuit in which a constant current source circuit is connected in series, the constant current source circuit is connected to a current supply terminal of the constant current source circuit, and when the switch is turned off, the current supply state is smaller than the light emitting element drive current _Ip. And a bias supply circuit for maintaining the bias voltage.

According to the present invention (1), the bias supply circuit, to maintain a constant current source circuit at the time of switching off the current supply state of a small current I _B than the light emitting element driving current I _p,
May Raising up the light-emitting element drive current at the time of subsequent switching on the middle of the current I _B, thus reduces the rise time of I _p, it is possible to high-speed switching operation of the light emitting element. Moreover, the supply current I _B when the switch is off is smaller than the light emitting element driving current I _p, the power consumption is small in comparison with conventional current switch type light emitting element driving circuit.

Incidentally, such a bias supply circuit can be variously constructed as follows. Preferably, in the present invention (2), in the above-mentioned present invention (1), for example, FIG.
As shown in (1), the bias supply circuit comprises a first transistor Q1 forming a switch circuit and a source (or emitter).
With common and eggplant, the first comprising a second transistor Q5 is biased to complementarily turned on / off the transistor Q1, a current I ₅ flowing through the transistor Q5 of the second light emitting element driving current It is configured to be smaller than I _p .

Here, the above "complementary on / off" is performed.
Means that when Q1 turns on, Q5 turns off, and when Q1 turns off, Q5 turns on. The "biased to turn on / off complementarily" includes the case where the gate of Q5 is biased to a certain level _Vg5 in the middle of the input data signal DT as shown in the figure, and the case where the gate of Q5 is input to the input data signal DT. The case where the driving is performed by the logically inverted signal DT / of DT is included.

The above-mentioned "flow through the second transistor Q5"
Current I_FiveIs the light emitting element drive current I _pSmaller than
Such a configuration "can be considered in various ways. For example, as shown
The gate of Q5 is connected to an intermediate level of the input data signal DT.
Bell V_g5(Q1 ON
V_GS1)> (V when Q5 is ON_GS5) By I_p> I_Five
Is obtained.

Alternatively, the gate of Q5 is connected to the input data signal D
T is driven by a logically inverted signal DT / of T, and (Q1
Current parameters k _1)> (Q5 of the current parameter k ₅₎ become as in the elements Q1, choose the Q5, I _p> I
The relationship of ₅ is obtained. Or, even driven by a logic inversion signal DT / data signal DT of the input gate of Q5, and (Q1 current parameter k ₁₎ = (current parameter k ₅ of Q5), from the LD to the drain of Q5 By inserting a sufficiently large load resistor R1 (or diode D1), a relationship of I _p > I ₅ is obtained.

Therefore, according to the present invention (2), it is possible to provide a light emitting element driving circuit which can perform high-speed switching operation and has low power consumption with a simple configuration. Preferably, in the present invention (3), in the present invention (1), for example, as shown in FIG. 3A, the bias supply circuit has a drain (or a collector) connected to a current supply terminal; transistor Q current I ₅ flowing through the drain (or collector) is biased to its gate so as it is smaller than the light emitting element driving current I _p (or base)
5 is provided.

According to the present invention (3), the bias supply circuit Q5 has its drain connected to the current supply terminal of Q3 and its gate biased to the predetermined level _Vg5. working the supply current I ₅ as the predetermined (e.g., 10 mA) constant current source, such as to limit to to. Therefore, Q3 at the time of switch-off is the same as that of the present invention (2).
Similarly, the bias is biased to a certain intermediate operating point Q ′, so that the switching operation of the light emitting element can be sped up.

In addition, the current I in this case is_FiveThe size of Q
Since it is determined independently only by the bias setting for 5,
Due to characteristic variations of circuit elements (Q3, Q1, LD, etc.)
The current I_FiveIs always predetermined (for example, 10 mA)
Can be restricted to Therefore, such a light emitting element driving circuit is provided.
It is easy to manufacture as well as easy to manufacture. Also preferred
In other words, in the present invention (4), the present invention (1) is used.
Therefore, for example, as shown in FIG.
Gate (or base) is biased to a predetermined level
Corresponding first current I₇First Transistor That Generates
Terminal Q7 and its drain (or collector)
And the first current I₇Amplify the mirror
The light emitting element drive current I _p
Smaller current I_FiveThe second transistor Q
5 is provided.

According to the invention (4), by adopting the current mirror type, the required bias supply current I ₅ of n times the current I ₇ as a reference (or 1 / n times) is obtained precisely . Also it can be maintained the required bias supply current I ₅ with high accuracy by managing the current I ₇ as a reference constant. Preferably, in the present invention (5), in the present invention (1), for example, as shown in FIG. 7, the bias supply circuit has a gate (or base) biased to a predetermined level and the corresponding first A first transistor Q7 that generates the voltage _Vg5 of the first transistor Q1 and a drain (or a collector) thereof are connected to a current supply terminal, and the first voltage _Vg5 is applied to a gate (or a base) of the first transistor Q7 to _apply the first voltage _Vg5 to the drain ( or and a second transistor Q5 for generating a small current I ₅ than the light emitting element driving current I _p the collector).

According to the present invention (5), the voltage amplifying circuit Q7
By the provided results that the input level of the Q7 is linear amplification is required bias supply current I ₅ can easily generate over a wide dynamism microphone range to the drain of Q5. Also in place of the load resistor R2 of Q7, for example, by using the non-linear element comprising a diode D2, a result of input of Q7 is nonlinear amplification, finely changing the bias input V _GS5 of Q5 based on large changes in the input of the Q7 It is also possible to make it. In that case, it is also possible to stabilize the operating point of Q5 using the temperature characteristic of diode D2.

Preferably, in the present invention (6), in the above inventions (3) to (5), the drain (or collector) of the transistor Q5 whose drain (or collector) is connected to the current supply terminal when the switch is off is turned off. The source (or collector-emitter) voltage V _DS5 is biased to a voltage near the boundary (pinch off) between the linear operation region and the saturation region of the transistor.

The present invention (6) will be described with reference to FIG. The present invention (3) to (5) According to the drain (or collector) transistor Q5 of which is connected to the current supply terminal, a predetermined supply current I ₅ of both the Q3 when the switch is off (e.g., 10 mA) Works as a constant current source circuit. However, according to this method, even if the drain voltage V _{DS3 of} Q3 rises to the operating point Q (6V) at the time of switch-on, the bias state of Q5 (V _DS5 etc.)
If there is sufficient, said Q5 becomes possible to continue to supply continuing bias current I ₅ also to Q3 during switch-on. Then, in order to supply the required drive current I _p (= 20 mA) to the light emitting element LD, the operating point Q (V _GS3 ) of Q ₃ must be set large in advance. No. As a result, Q3 when the switch-on in this case it is necessary to cover the I _p + I _5, hardly become the significant power savings.

Therefore, according to the present invention (6), V _DS5 of Q5 at the time of switch-off is biased to a voltage near the pinch-off of Q5. In this way, the V _DS3 of Q3 is increased by the switch ON of Q1, Accordingly Q5
For the V _DS5 is reduced, a decrease in I ₅ at the same time. Then, V _DS3 of Q3 is in when it reaches its operating point Q (6V), preferably a V _DS5 = 0 becomes, I ₅ = 0 of Q5. Therefore, in this case, Q3 at the time of switch-on need only cover the light emitting element drive current _Ip , and therefore, the switching operation can be speeded up and power can be saved significantly.

Preferably, in the present invention (7), in the above-mentioned present inventions (2) to (6), for example, as shown in FIG. 6, the bias supply circuits Q5 and Q7, together with the constant current source circuit Q3, emit light. The light output constant control signal APC of the element is applied to the input bias level (here, the gate of Q7), and the constant at the time of switch-off is changed according to the increase or decrease of the light emitting element drive current _Ip in the constant current source circuit Q3. increase or decrease the current I ₅ is supplied to the current source circuit Q3.

In the configuration of FIG. 6, if the input signal AP of Q3 is
As C (V _GS3 ) increases, the operating point Q3 of Q3
(VI curve of (B)) changes, and the drive current _Ip increases. Accordingly, if the operating point Q ′ of Q3 is not changed, the light emission delay of the light emitting element increases. The reverse is also true. According to the present invention (7), the bias supply circuits Q5, Q
7 is a light emitting element driving current I _p in the constant current source circuit Q3.
Depending on the increase or decrease (in accordance with the input signal APC in this example), since increasing or decreasing the current I ₅ is supplied to the constant current source circuit Q3 when the switch is off, regardless of the operating temperature of the light emitting element, a constant light emission delay characteristics Can be

Preferably, in the present invention (8), in the present invention (1), for example, as shown in FIG. 3B, the bias supply circuit comprises a diode element connected between a power supply and a current supply terminal. D. If the forward voltage-current characteristic of the diode element D is used, the operating point of Q3 at the time of switch-off is Q ′ (V _DS3 = 2 V, I _DS3 = I ₅
= 10 mA). Also switch Q1
When raised by the ON to the V _DS3 = 6V of Q3, the diode element D is reverse biased, the bias supply current I
₅ = 0.

Therefore, according to the present invention (8), it is possible to provide a light-emitting element drive circuit which can perform high-speed switching operation and consumes less power with an extremely simple configuration using the diode element D. Also preferably, in the present invention (9), in the present invention (1), for example, FIG.
As shown in (C), the bias supply circuit includes a resistance element R connected between a power supply and a current supply terminal.

If the voltage drop of the resistance element R is used, the operating point of Q3 at the time of switch-off is Q ′ (V _DS3 = 2V, I
_DS3 = a I ₅ = 10 mA) to maintain fixable. Also when raised to V _DS3 = 6V of Q3 by ON of the switch Q1, the bias supply current I ₅ by reduction of the inter-terminal voltage of the resistor R is reduced. Therefore, according to the present invention (9), it is possible to provide a light-emitting element driving circuit that can perform high-speed switching operation and consumes less power with an extremely simple configuration using the resistor element R.

[0033]

Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Note that the same reference numerals indicate the same or corresponding parts throughout the drawings. Although an example of application to an LD drive circuit is described here, it goes without saying that the present invention can also be applied to a drive circuit such as a light emitting diode (LED).

FIG. 2 is a diagram for explaining an LD drive circuit according to the first embodiment. FIG. 2A shows a case where a bias supply circuit Q5 forming a kind of differential pair with a switch circuit Q1 is provided. Is shown. Other circuit configurations may be the same as those in FIG. However, the circuit Q4 for generating the threshold bias current Ib of the LD is omitted. In the figure, nMOSFE
Q1 and Q5 made of T have a common source and form a kind of differential pair. However, the gate of Q5 is a constant voltage source CVG
A certain voltage level V in the middle of the input data signal DT.
_g5 , whereby the bias current I ₅ = 10 mA is applied to Q3 when the LD is turned off (switch off).
(<I _P = 20 mA).

FIG. 2B shows V-V of an example nMOSFET.
I characteristic, and the characteristic is described below in the constant current source circuit Q3.
The operation in the case where the present invention is applied will be specifically described. When the switch is turned on (DT = 1), Q3 is biased to the operating point Q via the light emitting element LD and the switch circuit Q1, and supplies a drive current I _p (= 20 mA) to the light emitting element. V of Q3 at that time
_DS3 ≒ 6V.

When the switch is turned off (DT = 0), Q1
Feeding from the order to completely turned off, V _DS3 of Q3 is reduced. However, when the V _{DS3 of} Q3 drops to some extent, Q5, whose gate is biased to V _g5 , turns on and
Subsequent Q3 is powered via Q5. In that case, Q
By appropriately selecting the operating points (V _GS5 , V _DS5, etc.) at the time of turning on the bias current _I5 , the bias current _Ip smaller than _Ip is supplied to Q3.
₅ (= 10 mA) can be supplied. Thus, the operating point of Q3 at the time of switch-off is settled at Q '. At that time, V _DS3 of Q3 ≒ 2V.

Next, when the switch is turned on, Q3 becomes LD,
It is biased again to the operating point Q via Q1. However, in this case Q3 is rising in the middle of 2V of V _DS3
Star from (Q'point) - for bets, despite the presence of the stray capacitance C _s, can supply the required drive current I _p to LD at an earlier than the conventional time. Therefore, the light emission delay of the LD can be reduced.

At the same time as the rise of V _DS3 of Q3,
Since V _GS5 of Q5 decreases, the bias current I ₅ decreases rapidly. In addition rising middle Q5 is OFF the V _DS3
After all, it is sufficient to supply only the LD drive current _Ip to Q3 when the switch is turned on, as in the conventional case. Therefore,
The power consumption of the LD drive circuit can be reduced. According to this method, the operating point Q 'of Q3 _depends on how to select the bias level Vg5.
The can be set to a desired, also set giving priority to switching speed by increasing the I _5, also set done arbitrarily giving priority to reduction in power consumption by reducing the I _5.

It is to be noted that another configuration is possible in which the bias current I ₅ (<I _p ) is supplied to Q3 when the switch is turned off.
For example, choose to drive the logic inversion signal DT / data signal DT of the input gate of Q5, the (current parameters k ₁ of Q1)> (Q5 of the current parameter k ₅₎ become as the elements Q1, Q5 Thus, a relationship of I _p > I ₅ is obtained.

Alternatively, the gate of Q5 is connected to the input data signal D
Even when driven by the logically inverted signal DT / of T and (current parameter k _{1 of} Q ₁ ) = (current parameter k _{5 of} Q ₅ ), a load resistance R 1 (or a diode) that is sufficiently larger than LD is connected to the drain of Q 5. By inserting D1),
The relationship of I _p > I ₅ is obtained. FIG. 3A is a diagram for explaining an LD drive circuit according to the second embodiment, and shows a case where a constant current source circuit including a pMOSFET Q5 is provided as a bias supply circuit.

Since the drain of the bias supply circuit Q5 is connected to the current supply terminal of Q3 and its gate is biased to a predetermined level _Vg5 , it functions as a constant current source circuit for Q3. Therefore, Q3 at the time of switch off
The supply current I ₅ to be possible to limit to a predetermined (e.g. 10 mA), thereby shifts the operation point of Q3 to Q'. Therefore, the switching operation of the light emitting element can be sped up in the same manner as described above.

Preferably, V5 of Q5 when the switch is off
_DS5Is biased to a voltage near the pinch-off of Q5.
ing. In this way, when the switch is turned on, the V of Q3_DS3But
Ascending, V5 of Q5_DS5Decreases,
At the same time I_FiveDecrease. And V of Q3_DS3But that movement
When the point Q (6V) is reached, preferably the V of Q5
_DS5= 0 and I_Five= 0. Therefore, in this case
When the switch is on, Q3 is the light emitting element drive current I_pOnly cover
Better, and therefore, significantly faster with faster switching
Power savings.

The V _DS5 of Q5 when the switch is turned off is changed to Q
Various methods can be considered as a method of biasing to a voltage near the pinch-off of No. 5. For example, the source power supply + V 'of Q5 is +
An appropriate voltage lower than V can be set. Alternatively, only + V may be available for the source of Q5. In this case, for example, one or more diodes D1 are connected to the drain circuit of Q5.
Are inserted in series. This turns on Q5
Sometimes, utilizing the voltage drop of the diode D1, the V5 of Q5
Keep _DS5 around pinch-off.

FIG. 3B shows another bias supply circuit according to the second embodiment. (A) of FIG.
Shows a case where a pn junction diode element D is connected in series between the terminals a and b in FIG. 3A instead of the FET Q5. Note that these terminals a and b are terminals for explanation, and do not actually exist. One or two or more diode elements D can be provided in series between the power supply + V (or + V ') and the drain of Q3 so that the operating point of Q3 at the time of switch-off is at point Q'. In this case, when the switch is turned off, Q3 is supplied with power via the diode element D, but the voltage drops down to about V _{DS3 of} Q3 = 2V due to the voltage drop of the diode element D. Q3 at this time
The current I ₅ which can be passed is about 10mA.

When the switch is turned on, V _DS3 of Q3 rises to 6V. As a result, the diode element D is reverse-biased (or does not satisfy the forward bias condition),
The bias current I ₅ = 0. FIG. 3B to FIG.
(E) shows various types (configuration examples) of the diode element. FIG. 1B shows a pn junction type diode using an nMOSFET. In an nMOSFET, an n-type source and a drain are formed in a p-type substrate, and an n-channel is formed between the source and the drain by applying a positive potential to a gate electrode via an insulating film. However, when the gate and the drain are short-circuited (commonly) and the p-type substrate is short-circuited (commonly) as shown in FIG.
The function as an FET is lost, and a normal pn junction is formed between the n-type source and the p-type substrate (that is, the drain terminal). This part is used as a pn junction type diode.

FIG. 5C shows a channel forming type diode using an nMOSFET. As shown, nMOSF
When the gate and drain of ET are short-circuited (common), V
_{In the case of S} <V _G (= V _D ), an n-channel is formed in the p-type substrate and a drain current having a square characteristic flows, but V _S >
When V _G (= V _D ), n channel is not formed and nM
OSFET is turned off. An operation characteristic similar to such a diode is used as a diode.

Similarly, (d) shows a PN junction type diode using a pMOSFET, and (e) shows a pMOSFE.
This is a channel-forming diode in which the gate and drain of T are common. FIG. 3C shows still another bias supply circuit according to the second embodiment.
A case is shown in which a resistor R is connected in series between the terminals a and b in (A) instead of the FET Q5.

A resistance element R can be provided in series between the power supply + V (or + V ') and the drain of Q3 so that the operating point of Q3 at the time of switch-off is at point Q'. In this case, Q3 at the time of switch-off is supplied with power through the resistance element R, but due to the voltage drop of the resistance element R,
Q3 of V _DS3 = settles to about 2V. Current I ₅ to Q3 at this time can flow is about 10mA.

When the switch is turned on, V _DS3 of Q3 rises to 6V. Thus the voltage between the terminals of the resistance element R is the bias current I ₅ decreases decreases accordingly. FIG. 4 shows the third
FIG. 3 is a diagram for explaining an LD drive circuit according to the embodiment;
1 is connected to the power source (or ground) side. Here, a constant current source circuit composed of pMOSFET Q3, a switch circuit composed of Q1 and a laser diode LD are connected in series, and the source of Q3 is connected to power supply + V and the cathode of LD is connected to power supply -V (or ground). )It is connected to the. On the other hand, the bias supply circuit composed of the nMOSFET Q5 is connected to the LD from Q3 when the switch is off.
Withdrawing the small bias current I ₅ than the drive current I _p. The inverted signal DT / of the input data signal DT is input to the gate of the switching FET Q1.

The details of the operation can be easily analogized from those described with reference to FIGS. In addition, it goes without saying that various other circuit configurations can be realized without departing from the spirit of the present invention. FIG. 5 is a diagram for explaining an LD drive circuit according to the fourth embodiment, and shows a case where a current mirror circuit is provided as a bias supply circuit.

The constant current source circuit composed of the nMOSFET Q7 is biased by the stabilized constant voltage source
Supplying a constant current I ₇ to a load consisting of MOSFET Q6. This causes the gates of Q6 and Q5 to self bias to the same level V _GS6 . Now, if V-I characteristics of Q6 and Q5 is the same, the result of the gate is also biased by V _GS6 of Q5, the current I ₇ of Q7 is mirrored to Q5 and Q
5, the drain current I ₅ = I ₇ .

The current parameter k of Q7 and Q5₇,
k_FiveBy properly choosing₇And I _FiveThe current ratio of
Can be arbitrarily set in addition to one-to-one. In any case
According to such a current mirror circuit, the constant voltage source CVG
By maintaining and controlling the other circuit elements (L
D, Q1, Q3, etc.) and their operating environment
(Temperature, power supply voltage) regardless of fluctuations
Accurate bias current I_FiveIs obtained. Therefore, the switch
Q3 at the time of off is a bias current I_FiveSupplied
As a result, the high-speed operation of the LD and the power consumption of the LD drive circuit
And stable characteristics can be obtained.

If it is not desired to apply a load equal to or more than the LD drive current _{Ip to} Q3 when the switch is turned on, the above-mentioned FIG.
The same method as described for the configuration of (A) can be employed.
FIG. 6 is a view for explaining an LD drive circuit according to the fifth embodiment. The constant current source Q3 performs constant light output control of the LD, and the constant current source Q3 at the time of switch-off also supports constant light output control. In this case, a bias current is supplied.

In the figure, a constant optical output control signal APC generated by an optical output monitor circuit (not shown) is fed back to the gate of the constant current source circuit Q3 in order to obtain a constant optical output regardless of temperature fluctuation. ing. As a result, Q3
When the optical output decreases due to an increase in the operating temperature of the LD, the LD drive current _Ip is increased by increasing the gate voltage V _GS3 (APC) to keep the optical output constant, and when the operating temperature of the LD decreases, the optical output decreases. When the light output increases, the LD drive current _Ip is reduced by lowering the gate voltage V _GS3 (APC) to keep the light output constant.

In the seventh embodiment, the constant optical output control signal APC is also fed back to the gate of the constant current source circuit Q7. Thus, Q7 (that is, Q5) becomes
When the Q3 increases the LD drive current I _p increases the bias current I ₅ when the switch is turned off by an increase in the gate voltage V _GS7 (APC), thereby operating point of Q3 Q
′ _Is shifted upward (in the direction in which V _DS3 increases). Also when the Q3 reduces the LD drive current I _p decreases the bias current I ₅ when the switch is turned off by lowering the gate voltage V _GS7 (APC), thereby operating point of Q3 Q'
_Is shifted downward (in the direction of decreasing V _DS3 ).

Therefore, the operating point Q 'of Q3 in this case is L
It is shifted up and down in accordance with the increase and decrease of the D drive current _Ip , whereby the light emission delay of the LD is kept substantially constant. In addition, an increase in power consumption due to the movement of the operating point Q 'can be suppressed to the minimum necessary. FIG. 7 is a diagram for explaining an LD drive circuit according to the sixth embodiment.
7 and a constant current source circuit Q5.

[0057] When the constant current source circuit Q3 increases the LD drive current I _p increases its drain current I ₇ due to the rise of the gate voltage V _GS7 (APC), the voltage drop of the resistor R2 (i.e., Q5 V of _GS5 ) to increase. Thereby the bias current I ₅ is to shift the Q3 operating point of Q'during increased by switching off upward (in the direction of increasing the V _DS3). The Q3 is LD drive current when decreasing the I _p, the drain current I ₇ due to the decrease of the gate voltage V _GS7 (APC)
To reduce the voltage drop across resistor R2 (ie, V _{GS5 of} Q5). Thereby the bias current I ₅ is reduced below the operating point Q'of Q3 when the switch off (V
_DS3 ).

By employing such a voltage amplifier circuit composed of Q7 and R1, a bias voltage V _GS5 having a wide dynamic range can be obtained at the gate of Q5. Therefore, it is possible to control the bias current I ₅ of Q5 in a wide dynamic range. Note that a load diode D2 may be provided instead of the load resistor R2 of Q7. It is varied current I ₇ is relatively large In this way, the voltage drop of the diode D2 is significantly does not change, this configuration is when the switch is off Q3
The bias current I ₅ is suitable if like to fine tune control.

In each of the above embodiments, the MOSFET
However, the present invention can be realized by using a junction FET, a bipolar transistor, or the like. In addition, although a plurality of embodiments suitable for the present invention have been described, it goes without saying that various changes in the configuration, control, and combinations thereof can be made without departing from the spirit of the present invention. .

[0060]

As described above, according to the present invention, high-speed switching operation is possible and power consumption is reduced by biasing the constant current source circuit in a predetermined operation region other than OFF when the LD is not emitting light. It is possible to provide a light emitting element drive circuit with a small number.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is a diagram illustrating an LD drive circuit according to the first embodiment.

FIG. 3 is a diagram illustrating an LD drive circuit according to a second embodiment.

FIG. 4 is a diagram illustrating an LD drive circuit according to a third embodiment.

FIG. 5 is a diagram illustrating an LD drive circuit according to a fourth embodiment.

FIG. 6 is a diagram illustrating an LD drive circuit according to a fifth embodiment.

FIG. 7 is a diagram illustrating an LD drive circuit according to a sixth embodiment.

FIG. 8 is a diagram (1) for explaining a conventional technique;

FIG. 9 is a diagram (2) for explaining a conventional technique;

[Explanation of symbols]

C _s Stray capacitance CVG Constant voltage source D diode LD Laser diode Q MOSFET

────────────────────────────────────────────────── ─── Continued on the front page (51) Int.Cl. ⁶ Identification symbol FI H04B 10/04 10/06 (72) Inventor Toshiyuki Takashi 2-1-1 Kita-Ichijo-Nishi, Chuo-ku, Sapporo, Japan Fujitsu Hokkaido Digital Technology Within a stock company

Claims (9)

[Claims] 1. A light emitting device in which an external light emitting device, a switch circuit for turning on / off according to an input data signal, and a constant current source circuit for supplying a drive current to the light emitting device when the switch is on are connected in series. A driving circuit, comprising: a bias supply circuit connected to a current supply terminal of the constant current source circuit, the bias supply circuit maintaining the constant current source circuit in a current supply state smaller than a light emitting element drive current when the switch is off. Element drive circuit. 2. The bias supply circuit has a source (or emitter) common to a first transistor constituting a switch circuit, and is biased to turn on / off complementarily with the first transistor. The light emitting element driving circuit according to claim 1, further comprising a second transistor, wherein a current flowing through the second transistor is configured to be smaller than a light emitting element driving current. 3. The bias supply circuit has a drain (or a collector) connected to a current supply terminal and a gate (or a base) of the bias supply circuit such that a current flowing through the drain (or the collector) is smaller than a light emitting element driving current. 2. The light emitting element drive circuit according to claim 1, further comprising a transistor biased by (1). 4. The bias supply circuit according to claim 1, wherein the gate (or base) is biased to a predetermined level and the corresponding first
And a drain (or collector) connected to a current supply terminal, and the first current is mirror-amplified and the drain (or collector) is smaller than the light emitting element drive current. And a second transistor for generating a current.
3. A light emitting element drive circuit according to claim 1. 5. The bias supply circuit according to claim 1, wherein a gate (or a base) of the bias supply circuit is biased to a predetermined level and the corresponding first
And a drain (or collector) connected to a current supply terminal, and the gate (or base) is applied with the first voltage to emit light to the drain (or collector). The light emitting element driving circuit according to claim 1, further comprising a second transistor that generates a current smaller than the element driving current. 6. A transistor whose drain (or collector) is connected to a current supply terminal has a drain-source (or collector-emitter) voltage at the time of switch-off when the transistor is at a boundary between a linear operation region and a saturation region. The light-emitting element driving circuit according to claim 3, wherein the light-emitting element driving circuit is biased at a voltage close to the light-emitting element. 7. A bias supply circuit, together with a constant current source circuit, wherein a light output constant control signal of a light emitting element is added to an input bias level, and the bias supply circuit increases or decreases a light emitting element driving current in the constant current source circuit. 7. The light emitting element driving circuit according to claim 2, wherein a current supplied to the constant current source circuit when the switch is turned off is increased or decreased. 8. The light emitting element drive circuit according to claim 1, wherein the bias supply circuit comprises a diode element connected between a power supply and a current supply terminal. 9. The light emitting element driving circuit according to claim 1, wherein the bias supply circuit includes a resistance element connected between a power supply and a current supply terminal.