JPH11355329A - Data transmitter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the omission of data due to the stop of transmission of a synchronization packet having been conducted so far in the case that a bus reset takes place for a comparatively longer time on a bus through which serial data are transmitted. SOLUTION: A buffer memory 2 is mounted on a data entry section, data for a synchronization packet transmission stop period due to bus reset are stored in the memory 2 and the data are read and sent to a serial bus 9 at restart of transmission. Or a buffer memory 2 is also mounted to a packet reception section so as to avoid data discontinuity for the synchronization packet transmission stop period.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an A-LAN connected by a serial bus (hereinafter, referred to as IEEE1394) specified by IEEE1394.
The present invention relates to a technology for transmitting data in real time in a network of V devices.

[0002]

2. Description of the Related Art In recent years, IEEE1394 has attracted attention as a standard digital interface for digital AV equipment, and is being adopted in consumer digital AV equipment and personal computers.

The features of IEEE1394 include a plug-and-play function that allows all devices connected to the bus to recognize a newly connected device simply by connecting a cable to a connector, and a function in a state where a power supply is connected. There is a function called hot plugging that allows the cable to be connected and disconnected.
By using IEEE1394 having such characteristics, a home AVC network that can be easily handled by anyone can be constructed.

FIG. 5 shows an example of an AVC network. In FIG. 5, all devices have IEEE1394 connectors, 50 is a television, 51 is a set-top box (STB), and 52 is a VTR (Video Tape Recorder).
der), 53 is a personal computer (PC), 54 is a scanner, 55
Is a printer, 56 is a video camera, 57 is a DVD (Digi
tal Video Disc player), 58 is MD (Mini Disc pla)
yer). These devices are connected by an IEEE1394 cable 59, and form a network connecting each room in the home.

In a network constituted by IEEE1394,
When a new device is connected to the bus (MD58 in FIG. 5).
), And the addition of a new device (node) on the bus can be automatically detected. Conversely, it is possible to automatically detect that the number of nodes has decreased when any device is removed from the bus.

In this manner, a user of a network using IEEE1394 can easily construct and use an AVC network without complicated system settings.

[0007]

SUMMARY OF THE INVENTION The above IEEE1394
In the case of a home AVC network based on .NET, devices connected to the network are frequently connected or disconnected. When a new device is connected to the bus, a bus initialization process called a bus reset is performed. In the case of a bus reset generated by software processing, the period during which the bus reset state is maintained on the bus is specified as a minimum of 166.7 microseconds in the standard, and thus does not pose a major problem in a normal use state.

[0008] However, by inserting and removing the connector,
When the state of the bus changes, the bus reset state for about one second may continue due to chattering of the contact portion of the connector or repeated insertion and removal of the connector.

In a state where a bus reset has occurred due to such factors, each device is temporarily unable to use the bus, and if synchronous transmission called Isochronous is being performed on the same bus, the bus reset is performed. , The synchronous transmission is interrupted.

[0010] However, even if the device that has transmitted the synchronization packet cannot transmit data temporarily due to the occurrence of a bus reset, the data to be transmitted is processed in real time. The data during the period when the transmission is interrupted is not transmitted and is lost.

The above-described example will be described with reference to a bus shown in FIG. 6 comprising a PC, a video camera and a VTR.

In FIG. 6, reference numeral 60 denotes a video camera;
Is a VTR (Video Tape Recorder), 62 is a personal computer (P
C) and 63 are CDs (Compact Disc players), which are connected by an IEEE1394 cable 64.

[0013] VCR from video camera independent of PC
In order to perform dubbing of a video, a sync packet is transmitted from the video camera 61 to the VTR 61 via the IEEE1394 cable 64, and the VTR receives the sync packet and records the data of the video camera 61. .

At this time, it is assumed that a new IEEE1394 device, CD64, is connected to the surplus connector of the PC63. At this time, when the CD64 is connected to the bus, chattering occurs on the bus, and if the bus reset state continues for about 1 second, the synchronous packet transmission is interrupted during that time, and
A no-signal state is recorded in R62. Also,
On the video camera 61 side, regardless of whether or not the packet transmission is interrupted, the tape reproduction is continued, so that data during the period in which the synchronous packet transmission is interrupted is not transmitted.
Data will be lost.

As described above, when the number of devices connected to the IEEE1394 bus increases and the device is used as a home network, data may be lost due to interruption of packet transmission due to a bus reset. Higher. For example, even if they are connected to the same bus, if the room where each device is used is different, it is difficult to check the state of other devices, so devices that block transmission of other devices It can be easily imagined that a bus reset may occur due to connection / disconnection of the power supply or repeated power ON / OFF.

In view of the above problems, the present invention provides an IEEE1394 network system to which AV devices and the like are connected.
An object of the present invention is to provide a data transmission device in which at least synchronous transmission data is not lost when a bus reset occurs.

[0017]

In order to solve the above-mentioned problems, a data transmission apparatus according to the present invention comprises: means for writing input digital data into a buffer memory for temporarily holding the input digital data; Means for reading digital data shifted in time from the buffer memory, means for detecting the occurrence of a bus reset on the bus and generating a bus reset detection signal, and for inputting an input signal by the bus reset detection signal to the input digital data. Means for selecting the time-shifted digital data, means for serializing the selected digital data, and means for synchronizing the serialized digital data using a bus which is time-divided for each cycle of a substantially constant time. Means for transmitting a packet.

According to a second aspect of the present invention, there is provided a data transmission device for moving a reproducing head to an arbitrary position on a recording medium;
Means for reproducing recorded data from an arbitrary position on the recording medium; reproduction signal processing means for converting the reproduced data into digital data suitable for signal processing; means for serializing the digital data; Means for transmitting a synchronization packet using a bus in which the converted digital data is time-divided at intervals of substantially constant time cycles, means for detecting a bus reset occurring during the transmission of the synchronization packet, and detection of the bus reset. Means for temporarily stopping the reproduction operation from the recording medium, moving the reproduction head to a reproduction position of the recording medium corresponding to the time when the bus reset has occurred, and setting a reproduction standby state; and a synchronous packet after the bus reset has occurred. Means for detecting a transition to a state in which retransmission of the synchronization packet is possible, and a state in which retransmission of the synchronization packet is enabled. Wherein it is from reproducing head standby position that includes means to start playing when.

According to a third aspect of the present invention, there is provided a data transmission apparatus for receiving a synchronization packet from a bus on which serialized digital data is transmitted in a time-divisional manner at substantially constant time intervals, and on a bus. Means for extracting the payload data, means for accumulating the payload data in the buffer memory for a certain period, and means for continuously reading the payload data accumulated in the buffer memory.

Further, in the data transmission apparatus according to the fourth invention, there are provided means for receiving a synchronization packet from a bus through which serialized digital data is transmitted in a time-divisional manner at intervals of a substantially constant time cycle; Means for generating digital data to be recorded and a synchronization signal necessary for recording; means for recording the digital data on a recording medium; means for detecting that a bus reset has occurred on a bus and generating a bus reset detection signal And means for stopping the recording of the digital data on the recording medium for a time defined by the bus reset detection signal.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a data transmission device according to the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 shows the configuration of a data transmission apparatus according to Embodiment 1 of the present invention.
In FIG. 1, 1 is an AV data input terminal, 2 is a buffer memory, 3 is a switch, 4 is a bus reset detector,
Denotes a control microcomputer, 6 denotes an AVP unit, 7 denotes a LINK unit, 8 denotes a PHY unit, and 9 denotes a serial bus.

The operation of the data transmission apparatus configured as described above will be described below with reference to FIG.

The AV data input terminal 1 receives digitized AV data. In the present embodiment, digital audio data having a sampling frequency of 48 kHz, a quantization bit number of 16, and a channel number of 2 is input.

This AV data is branched into two, and one is sequentially written into the buffer memory 2. The buffer memory 2 is a memory for temporarily storing input AV data. The other is directly connected to the terminal a of the switch 3. The switch 3 is initially connected to the terminal a. The AV data input from the AV input data terminal 1 is packetized by the AVP (AP protocol) unit 6 into a format suitable for transmission, and then LINKed. Part 7
The PHY unit 8 outputs a synchronization packet according to the IEEE1394 transmission protocol to the serial bus 9 and transmits the packet to another device.

As described above, normally, the input AV data is directly input to the IEEE 1394 circuit block, and synchronous packet transmission is performed.

Here, it is assumed that a bus reset has occurred on the serial bus 9. According to the IEEE 1394 standard, when all the bus states are logically “1”, each device is determined to be in the bus reset state.

However, the bus reset detector 4 in the present embodiment determines that a bus reset has occurred only when a continuous bus reset state caused by chattering at the time of connection of the connector occurs many times.
In order to ignore bus resets generated from other systems, the bus reset detection unit 4
A bus reset state is detected by a retriggerable multivibrator, and when the output pulse has a width of 450 microseconds or more, the occurrence of a bus reset is transmitted to the control microcomputer 5.

According to the standard, the IEEE1394 processing circuit has at least four
This is because the internal buffer is configured in anticipation of a delay of 50 microseconds, so that a bus reset occurs in a longer period of time, and if transmission of a synchronization packet is interrupted, data is lost.

As a factor that causes a change in the state of the IEEE1394 bus, a machine whose state is reliably changed within a certain limited time due to turning on / off of a power supply of a connected device, a software reset or a hardware reset, or the like. Factors and the user connects the 1394 connector,
Or, in the case of disconnection, the operation of confirming the connection is repeated a number of times, so that electrical contact failure at the connector contact surface occurs for a considerable time, and the bus reset state occurs for a period of about 1 second. It is considered artificial.

In the following description, the bus reset for a relatively long time caused by the latter factor is referred to as a bus reset due to an artificial factor.

First, in the steady state, data from the input terminal 1 is written to the AVP unit 6 via the switch 3 and, at the same time, data for a certain period of time is written to the buffer memory 2 while being constantly updated. Have been. In this embodiment, the buffer memory 2 has a data buffer size for about one second, and data up to one second before an arbitrary time is always stored in the buffer memory 2.

Here, it is assumed that a bus reset generation signal is generated for 0.5 seconds in the bus reset due to the above-mentioned artificial factor. The control microcomputer 5 which has received the bus reset generation signal from the bus reset detection unit 4 calculates the time at which the bus reset has occurred from the pulse width, and stores the data corresponding to that time in the buffer memory 2.
Of the buffer memory 2 is started.

The control microcomputer 5 switches the input to the switch 3 to the terminal b, and after completing the bus reset processing, changes the data stored in the buffer memory 2 to AVP.
The synchronization packet according to the IEEE1394 protocol is transmitted to the serial bus 9 via the unit 6, the LINK unit 7, and the PHY unit 8.

Therefore, when looking at the transmission state of the data input from the input terminal 1 from the serial bus 9, the data transmission is suspended during the bus reset period, and after the bus reset processing is completed, the data is transmitted immediately before the occurrence of the bus reset. Transmission of data following the data will be resumed.

Since writing and reading of data in the buffer memory 2 are performed at the same speed, data corresponding to the bus reset processing period is always stored after the bus reset occurs, and the data to be transmitted is stored in the bus reset. A delay corresponding to the processing period occurs.

When the transmission of the synchronous packet ends once and returns to the idle state, the control microcomputer 5 returns the input of the switch 3 to the terminal a to bring it to the initial state.

As described above, according to the present embodiment, by temporarily storing data for the transmission suspension period caused by the bus reset in the buffer memory, when synchronous transmission is resumed, the data is stored immediately before the occurrence of the bus reset. , It is possible to transmit data that is continuous with the first data, and it is possible to prevent loss of real-time data.

Further, by increasing the size of the buffer memory 2, even if a similar bus reset occurs again, by changing the read start address of the buffer memory, it is possible to prevent loss of transmission data. Can be.

(Embodiment 2) Hereinafter, Embodiment 2 of the present invention will be described with reference to the drawings.

FIG. 2 is a diagram showing a configuration of a data transmission device according to the second embodiment of the present invention. In the figure, 4 is a bus reset detecting section, 6 is an AVP section, 7 is a LINK section, 8
Is a PHY unit, and 9 is a serial bus. The above is the same as the configuration of FIG. Also, 20 is a disk, 21 is a reproducing head, 22 is a disk drive unit, 23 is a head control unit,
Reference numeral 24 denotes a control microcomputer, and reference numeral 25 denotes a reproduction processing unit.

In the second embodiment, the operation in the case where a disk device is being played will be described.

In the normal reproduction state, the disk 20 is rotated by the disk drive unit 22 under the command of the control microcomputer 24, and the position of the reproduction head 21 is controlled through the head control unit. The data is read, and digital data is extracted by the reproduction processing unit 25. Here, this digital data is
The packet is sent to the AVP unit 6, adjusted to a packet structure suitable for transmission, and further transmitted as a synchronous transmission packet according to the IEEE1394 protocol to the serial bus 9 via the LINK unit 7 and the PHY unit 8.

Here, when a bus reset due to an artificial factor similar to that in the first embodiment occurs, the PHY unit 8 and the LINK unit 7 temporarily stop transmission of the synchronization packet and perform a bus initialization process. In addition, the bus reset detector 4
Detects the occurrence of a bus reset and informs the control microcomputer 24 of the detection. The operation of the bus reset detector 4 is the same as that described in the first embodiment. The control microcomputer 24 calculates the position of the disk being reproduced when the bus reset occurs, returns the reproducing head 21 to the position of the disk, and holds the reproduction standby state at that position. After completion of the bus initialization process, when the synchronous transmission can be resumed, the control microcomputer 24 causes the head control unit 23 to resume the reproduction, and synchronizes with the serial bus 9 in the same procedure as in the normal state. Send a packet.

As described above, according to the present embodiment, during the transmission stop period caused by the bus reset, the reproduction head position is returned to the position reproduced immediately before the occurrence of the bus reset, and the apparatus stands by, so that the synchronous packet transmission can be performed again. By starting reproduction from the disk at the point in time, loss of real-time data due to the occurrence of a bus reset can be prevented.

(Embodiment 3) Hereinafter, Embodiment 3 of the present invention will be described with reference to the drawings.

FIG. 3 is a diagram showing a configuration of a data transmission apparatus according to the third embodiment of the present invention. In the figure, 30 is a buffer memory, and 31 is a digital data output terminal.

When the transmission packet of the data transmission apparatus in the first embodiment is received, data cannot be received during the synchronous packet transmission suspension period due to the bus reset.
If the processing is performed in real time as it is, all data can be received, but a blank period occurs during the transmission stop period of the synchronization packet. Therefore, if the receiving side absorbs the blank period, the real-time property of the received data can be maintained.

The operation of each section of the data transmission apparatus according to the third embodiment will be described below. It is assumed that the synchronization packet transmitted in the first embodiment is flowing on the serial bus 9, the PHY unit 8 receives the packet, and transmits the payload data of the synchronization packet via the LINK unit 7 and the AVP unit 6. Take out in real time. This data is further written to the buffer memory 30. Here, a buffer memory of 2 Mbit was used.

Therefore, since the transmitted digital data is audio data (1.536 Mbps) having a sampling frequency of 48 kHz, a quantization bit number of 16, and a channel number of 2, the data is input using the entire capacity of the buffer memory 30. If the data is time-shifted, it will be delayed by about 1.3 seconds. In normal processing, this time will be required from receiving a packet to outputting data.

However, if the bus reset occurs during the transmission of the synchronization packet due to the same artificial factor as described in the first embodiment, and the transfer of the synchronization packet for 0.5 seconds is interrupted, the output from the AVP unit 6 is assumed. Also, since the capacity of the buffer built in the LINK unit has only a degree corresponding to a synchronous packet for several cycles, data cannot be accumulated during a period in which a bus reset occurs. Therefore,
A blank period of approximately 0.5 seconds occurs, after which data transfer will resume. However, since this blank period can be absorbed by a buffer period of about 1.3 seconds in the buffer memory 30, continuous data can be output from the output terminal 31.

As described above, in this embodiment, in combination with the first embodiment, even if the transmission of the synchronization packet is temporarily interrupted due to the bus reset for a relatively long time, all the data to be received are transmitted. It is possible to receive continuously. Further, the output of the conventional device is used in the third embodiment.
The data transmission device described above can apparently avoid the blank period due to the bus reset and improve the real-time property.

It should be noted that exactly the same effect can be obtained when the transmission packet of the data transmission apparatus in the second embodiment is received.

Embodiment 4 Hereinafter, Embodiment 4 of the present invention will be described with reference to the drawings.

FIG. 4 is a diagram showing a configuration of a data transmission apparatus according to the fourth embodiment of the present invention. In the figure, 40 is a disk, 41 is a recording head, 42 is a disk drive,
43 is a head control unit, 44 is a control microcomputer, and 45 is a recording processing unit.

When a transmission packet from the data transmission apparatus according to the first or second embodiment is received, after a period during which synchronous packet transmission is stopped due to a bus reset, data following data immediately before the bus reset is retransmitted. Since the transmission device processes the received data as it is in real time, for example, when recording the data on a recording medium, the transmission interruption period of the synchronous packet causes a non-recorded portion. Needs to be performed. According to the present embodiment, such a non-recorded portion can be prevented.

In FIG. 4, it is assumed that the synchronization packet according to the second embodiment is transmitted to the serial bus 9 in the normal case, and the PHY unit 8 receives the synchronization packet and sends it via the LINK unit and the AVP unit 6. Record processing unit 4
5 is transmitted. The recording processing unit 45 makes a format suitable for digital data recording, generates a synchronization signal necessary for recording with the data received from the AVP unit 6, and sends it to the control microcomputer 44. On the other hand, control microcomputer 4
4 controls the disk drive unit 42 and the head control unit 43 based on the synchronization signal received from the recording processing unit, and records the output from the recording processing unit 45 on the disk 40 via the recording head 41.

Here, as described in the first embodiment, when a relatively long bus reset occurs due to an artificial factor, the bus reset detector 4 generates a bus reset detection signal. Then, the information is transmitted to the control microcomputer 44. The method of generating the bus reset detection signal in this case is also the same as that described in the first embodiment.

The control microcomputer 44, having received the bus reset detection signal, immediately calculates the bus reset occurrence time from the bus reset detection signal, and via the head control unit 43 to the disk position where the signal of the last synchronization packet is recorded. Return the recording head 41 and wait until the synchronization packet is received again. After that, the bus reset state is released,
When the transmission of the synchronization packet starts, the control microcomputer resumes recording the received data on the disk 40.

As described above, by using the data transmission apparatus of the present embodiment in combination with the data transmission apparatus described in the first or second embodiment, the IEEE1394
Even if the transmission of the synchronous packet is interrupted by the bus reset for a relatively long time due to an artificial factor caused by a mistake in connecting or disconnecting the connector connected to the bus on the bus, even on the recording medium, It becomes possible to record as continuous data.

In the first and third embodiments, the case where audio data is used as input AV data is shown. However, the present invention is not limited to AV data. Without limiting the invention, if the data is not AV data, the same effect can be obtained by replacing the circuit block shown as the AVP section in each figure with a circuit block corresponding to the data to be processed.

In the second and fourth embodiments, the case where the recording medium is a disk has been described, but a tape may be used.

[0063]

As described above, according to the first aspect of the present invention, a data input unit is provided with a buffer memory to switch input data or to provide a function of controlling a reproduction start position, thereby providing a connector connected to a bus. Even when a relatively long bus reset occurs due to a failure in connecting or disconnecting the data, loss of data to be transmitted can be prevented.

In the second and fourth inventions, when a bus reset is detected, data is read from the recording medium or data is transferred to the recording medium in response to the interruption of the transmission of the synchronization packet. By temporarily stopping the writing, it is possible to prevent data to be transmitted from being lost or a non-recorded portion from being generated.

Further, in the third aspect of the present invention, the effect of the temporary interruption due to the bus reset caused by an artificial factor can be apparently compensated for by mounting the buffer memory before the output portion, and the continuous data can be compensated. Reception becomes possible.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a data transmission device according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of a data transmission device according to a second embodiment of the present invention.

FIG. 3 is a configuration diagram of a data transmission device according to a third embodiment of the present invention.

FIG. 4 is a configuration diagram of a data transmission device according to a fourth embodiment of the present invention.

FIG. 5 is an explanatory diagram of a configuration example of a home network configured by IEEE1394.

FIG. 6 is an explanatory diagram when a bus reset occurs.

[Explanation of symbols]

 Reference Signs List 1 digital data input terminal 2 buffer memory 3 switch 4 bus reset detection unit 5 control microcomputer 6 AVP unit 7 LINK unit 8 PHY unit 9 serial bus

Claims (6)

[Claims] 1. A means for writing input digital data to a buffer memory to temporarily hold the input digital data, a means for reading time-shifted digital data from the buffer memory, and a bus reset on a bus. Means for detecting the occurrence and generating a bus reset detection signal; means for selecting the digital data obtained by time-shifting the input signal from the input digital data by the bus reset detection signal;
Means for serializing the selected digital data; and means for transmitting a synchronization packet using a bus in which the serialized digital data is time-divided at substantially constant time cycles. Data transmission device. 2. A means for moving a reproducing head to an arbitrary position on a recording medium, a means for reproducing recorded data from an arbitrary position on the recording medium, and converting the reproduced data into digital data suitable for signal processing. Reproduction signal processing means for converting, means for serializing the digital data,
Means for transmitting a synchronization packet by using a bus in which the serialized digital data is time-divided at substantially constant time cycles; means for detecting a bus reset occurring during transmission of the synchronization packet; Means for temporarily stopping the reproduction operation from the recording medium after detecting the reset, moving the reproduction head to a reproduction position of the recording medium corresponding to the time at which the bus reset has occurred, and setting a reproduction standby state; Means for detecting transition to a state in which retransmission of a synchronization packet is possible, and means for starting reproduction from the reproduction head standby position when retransmission of the synchronization packet is possible. Data transmission equipment. 3. A means for receiving a synchronization packet from a bus in which serialized digital data is transmitted in a time-divisional manner at intervals of substantially constant time, a means for extracting payload data from a previous synchronization packet, and the payload. A data transmission apparatus comprising: means for accumulating data in a buffer memory for a predetermined period; and means for continuously reading payload data accumulated in the buffer memory. 4. A means for receiving a synchronization packet from a bus in which serialized digital data is transmitted in a time-divisional manner at intervals of substantially constant time, a digital data to be recorded from a pre-synchronization packet, and necessary for recording. Means for generating a synchronizing signal, means for recording the digital data on a recording medium, means for detecting that a bus reset has occurred on the bus and generating a bus reset detection signal,
Means for stopping recording of the digital data on the recording medium for a time defined by the bus reset detection signal. 5. The data transmission device according to claim 2, wherein a disk is used as a recording medium. 6. The data according to claim 1, wherein a bus reset detection signal is generated when a bus reset occurs for at least 450 microseconds or more as a bus reset detection method. Transmission equipment.