JPH11355232A - Time-division multiplex exchange circuit and time-division exchange method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a time-division multiplex exchange circuit and a time- division exchange method which are excellent in line use efficiency and have a small amount of device. SOLUTION: Input step time space switch circuits 11 (a to n) set connection for every time slot of a time-division multiplex signal on a time-division communication path. Cell assembling circuits 13 (a to n) divide m time slots (m is a positive integer) of the time-division multiplex signal into cells and output them. A cell switch 14 receives the outputted cells and outputs these received cells to an output port specified by cell headers. Cell decomposition circuits 15 (a to n) exchange the cells received from the output port of the cell switch 14 for the time-division multiplexed time-division multiplex signals and output them. Output stage time space switch circuits 16 (a to n) output them to output side time-division speech paths specified by the cell headers of the cells. Thus, exchange of time-division multiplex signal with a free structure is enabled from the time-division speech paths on an input side to the time-division speech paths on the output side.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a time division multiplex switching circuit and a time division switching method, for example, when interconnecting a plurality of time division communication paths using a time division communication network and a cell switch network. The present invention relates to a division multiplex switching circuit and a time division switching method.

[0002]

2. Description of the Related Art Conventionally, in a time division multiplex switching circuit and a time division switching method, a time division multiplex signal on one input side time division communication network of 64 kbit / sec is inputted to a cell assembling circuit. The cell generated by the cell assembly circuit is
Sent to the connection specified in the cell header. The cells received from the cell switch network are converted into 64 kbit / sec time division multiplexed data by a cell decomposition circuit.
The switching connection process is performed in the following manner.

[0003]

However, in the above-described conventional time division multiplex switching circuit and time division switching method, for example, as shown in FIG. It is connected to the input stage time-division communication path, and when accommodating a plurality of time-division communication paths, there is a problem that the amount of equipment becomes large.

An object of the present invention is to solve such a conventional problem and to provide a time-division multiplex switching circuit and a time-division switching method with good line use efficiency and a small amount of equipment. More specifically, the present invention relates to a method of assembling a cell after designating a port number and a time slot position of an output-side time-division communication path for each time slot in a time-space switch circuit in an input-side time-division communication path network. An object of the present invention is to provide a time-division multiplex switching circuit and a time-division switching method with a smaller amount of components by forming cells in a circuit and transmitting the cells from a cell switch to an output-side time-division communication network.

[0005]

The present invention adopts the following constitution in order to solve the above problems.

In the time division multiplex switching circuit or the time division switching method of the present invention, a time division multiplex signal is received and a connection is set for each time slot of the time division multiplex signal on the time division communication path. M of the time-division multiplexed signal (where m is a positive integer)
The time slot is divided into cells and output, the output cells are received, and the received cells are output to the output port specified by the cell header. The cell received from the output port of the cell switch is exchanged into a time-division multiplexed time-division multiplexed signal and output, and output to the output-side time-division communication path specified by the cell header of the cell.

According to the above configuration, it is possible to exchange time-division multiplexed signals from i input time-division communication paths to j output time-division communication paths.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention relating to a time division multiplex switching circuit according to the first aspect of the present invention relates to an input stage time for receiving a time division multiplex signal and setting a connection for each time slot of the time division multiplex signal on the time division communication path. A space switch circuit, a cell assembling circuit that divides a time slot of a time-division multiplexed signal (where m is a positive integer) into cells and outputs the cells, and receives the output cells and designates the received cells by a cell header. A cell switch that outputs to a specified output port, a cell disassembly circuit that converts a cell received from an output port of the cell switch into a time division multiplexed time division multiplexed signal, and outputs the cell division circuit. An output stage time-space switch circuit for outputting to the output side time-division communication path is employed.

With this configuration, i (where i is
Can exchange time-division multiplexed signals from a time-division communication path of one or more natural numbers to j output-side (where j is a natural number of one or more) time-division communication paths.

In the invention relating to the time division multiplex switching circuit according to the second aspect, the i / j is a number having a relation of 1 / plurality, plural / 1s, or plural / plurality. . With this configuration, it is possible to switch to an arbitrary number of communication paths in the time-division communication path on the input side / output side.

In the invention relating to the time division multiplex switching circuit according to the third aspect, a specific output side time division communication path is controlled based on control information indicating a port number and a time slot position of the output side time division communication path for each time slot. A configuration is adopted in which time slots to be transmitted are multiplexed and output so as to be continuous m time slots. Therefore, the attribute of each time slot can be clarified.

In the invention relating to the time division multiplex switching circuit, the time division multiplex signal is 64k × n (where n
Is a positive integer) bit / second time division multiplexed signal. With this configuration, the signal transmission speed can be clarified.

[0013] In the invention relating to the time division multiplex switching circuit according to the fifth aspect, the time division multiplex switching circuit further includes a time space switch control for outputting a signal indicating a port number or a time slot position of an output side time division communication path. It has a circuit. With this configuration, the processing configuration of the replacement process can be clarified.

The invention relating to a time division multiplex switching method according to a sixth aspect of the present invention relates to an input time space switching step of receiving a time division multiplex signal and setting a connection for each time slot of the time division multiplex signal on the time division communication path. A cell assembling step of dividing a time slot of a time-division multiplexed signal (where m is a positive integer) into cells and outputting the divided cells; A cell switching step of outputting a cell received from the cell switching step to a time-division multiplexed time-division multiplexed signal and outputting the time-division multiplexed signal; and an output side time-division call specified by a cell header of the cell. And an output stage spatio-temporal switch step of outputting to a road.

According to this configuration, the time from the i-side (where i is a natural number of 1 or more) time-division communication channel on the input side to the j-side (where j is a natural number of 1 or more) time-division communication channel on the output side is changed. Exchange of division multiplex signals becomes possible.

In the invention relating to the time division multiplex switching method according to claim 7, the i / j is a number having a relation of 1 / plurality, plural / 1, or plural / plural. . With this configuration, it is possible to switch to an arbitrary number of communication paths in the time-division communication path on the input side / output side.

In the invention relating to the time division multiplex switching method according to the eighth aspect, a specific output side time division communication path is controlled based on control information indicating a port number and a time slot position of an output time division communication path for each time slot. A configuration is adopted in which time slots to be transmitted are multiplexed and output so as to be continuous m time slots. Therefore, the attribute of each time slot can be clarified.

In the invention relating to the time division multiplex switching method according to the ninth aspect, the time division multiplex signal is 64k × n (where n
Is a positive integer) bit / second time division multiplexed signal. With this configuration, the signal transmission speed can be clarified.

According to a tenth aspect of the present invention, the time division multiplex switching circuit further comprises a time space switch control for outputting a signal indicating a port number and a time slot position of the output side time division communication path. It has a circuit. With this configuration, the processing configuration of the replacement process can be clarified.

Next, a time division multiplex switching circuit and a time division switching method according to an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram of a time division multiplex switching circuit according to an embodiment of the present invention.

FIG. 1 shows an example of the configuration of the time division multiplex switching circuit of this embodiment. In FIG. 1, a time division multiplex switching circuit according to the present embodiment includes an input-stage time-space switch circuit 11.
a to 11n, a space-time switch control circuit 12, a cell assembly circuit 13a to 13n, a cell switch 14, a cell decomposition circuit 15a to 15n, and an output stage space-time switch circuit 16.
a to 16n and a time-space switch control circuit 17. The time-space switch control circuit 12 outputs a signal indicating the port number of the output side time-division communication path and the time slot position for each time slot.

Next, an operation example of the time division multiplex switching circuit of the above embodiment will be described. In the time-division multiplex switching circuit having the above configuration, the input-stage time-space switch circuits 11a to 11
The time-division multiplexed signal inputted to the time-division multiplexed signal n is output to a specific output-side time division signal based on control information indicating the port number of the output-side time-division communication path and the time slot position for each time slot received from the time-space switch control circuit 12. The time slots to be transmitted to the speech path are multiplexed and output so as to be continuous m time slots. Cell assembling circuits 13a to 13
For n, m time slots are divided into cells and output.

The cell switch 14 has a cell switching function,
The cells generated by the cell assembling circuits 13a to 13n are received, and the received cells are output to the output port specified by the cell header.

The cell disassembly circuits 15a to 15n convert the cells received from the output port of the cell switch 14 into a time division multiplexed time division multiplexed signal of 64 k × n bits / sec. To 16n.

As described above, according to the above-described embodiment, a plurality of input stage time division communication paths and a plurality of output stage time channels can be provided by the time division multiplex switching circuit and the time division switching method including the time space switch circuit and the cell switch. Connection with the split channel
It can be realized with a smaller amount of components.

[0026]

As is clear from the above description, according to the time division multiplex switching circuit or the time division switching method of the present invention, a time division multiplex signal is received and the time of the time division multiplex signal on the time division communication path is Set the connection for each slot. Further, an m (where m is a positive integer) time slot of the time-division multiplexed signal is divided into cells, and the cells are output to an output port specified by a cell header. The cell received from the output port is exchanged with a time-division multiplexed time-division multiplexed signal and output to the output-side time-division communication path specified by the cell header of the cell. Therefore, it is possible to exchange time-division multiplexed signals from an arbitrary number of time-division communication paths on the input side to time-division communication paths on the output side. According to the time division multiplex switching circuit and the time division switching method of the present invention, it is possible to improve the use efficiency of the communication channel network and to reduce the required equipment amount and the amount of processes.

[Brief description of the drawings]

FIG. 1 is a block diagram of a time division multiplex switching circuit and a time division switching method according to an embodiment of the present invention.

FIG. 2 is a block diagram of a conventional time-division multiplex switching circuit and a time-division multiplexing method.

[Explanation of symbols]

 11a-11n Input stage time-space switch circuit 12 Time-space switch control circuit 13a-13n Cell assembly circuit 14 Cell switch 15a-15n Cell decomposition circuit 16a-16n Output stage time-space switch circuit 17 Time-space switch control circuit 21a-21n Cell assembly Circuit 22 Cell switch 23a-23n Cell decomposition circuit

Claims (10)

[Claims] An input time-space switch circuit for receiving a time-division multiplexed signal and setting a connection for each time slot of the time-division multiplexed signal on a time-division communication path; A cell assembly circuit that divides a time slot into cells and outputs the divided cells, a cell switch that receives the output cells and outputs the received cells to an output port specified by a cell header, and a cell switch. A cell disassembly circuit that converts a cell received from an output port of the cell into a time-division multiplexed time-division multiplexed signal and outputs the same; A switching circuit, and the output-side time-sharing (where j is a natural number of 1 or more) from the input-side (where i is a natural number of 1 or more) time-division communication paths. Division multiplex exchange circuit when, characterized in that allowed the exchange of time-division multiplexed signal to talk path. 2. The time-division multiplex switching circuit according to claim 1, wherein the i / j is a number having a relation of 1 / plurality, plural / 1s, or plural / plurality. . 3. A time slot to be transmitted to a specific output-side time-division communication path based on control information designating a port number of the output-side time-division communication path and a time slot position for each of the time slots. 3. The time-division multiplex switching circuit according to claim 1, wherein the time-division multiplex switching circuit outputs the multiplexed signals so that 4. The time division multiplexed signal according to claim 1, wherein the time division multiplexed signal is a 64 k × n (where n is a positive integer) bit / second time division multiplexed signal. Time division multiplex switching circuit. 5. The time-division multiplexing switching circuit further comprises a time-space switch control circuit for outputting a signal indicating a port number or a time slot position of the output-side time-division communication path. 5. The time division multiplex switching circuit according to any one of 1 to 4. 6. An input time-space switching step of receiving a time-division multiplexed signal and setting a connection for each time slot of the time-division multiplexed signal on a time-division communication path; Is a positive integer) a cell assembling step of dividing a time slot into cells and outputting the divided cells, a cell switching step of receiving the output cells and outputting the received cells to an output port specified by a cell header, A cell disassembly step of exchanging a cell received from the switch step into a time division multiplexed time division multiplex signal and outputting the same; and an output stage time / space switch for outputting to an output side time division communication path specified by a cell header of the cell. And j steps (where j is a natural number of 1 or more) from an i-side (where i is a natural number of 1 or more) time-division communication path on the input side. Division multiplex exchange method when, characterized in that allowed the exchange of fart time division multiplex signal. 7. The time division multiplex switching method according to claim 6, wherein the i / j is a number having a relation of 1 / plurality, plural / 1, or plural / plural. . 8. A time slot to be transmitted to a specific output-side time-division communication path based on control information designating a port number of the output-side time-division communication path and a time slot position for each of the time slots. 8. The time-division multiplex switching method according to claim 6, wherein the signals are multiplexed and output. 9. The time division multiplexed signal according to claim 6, wherein the time division multiplexed signal is a 64 k × n (n is a positive integer) bit / second time division multiplexed signal. Time division multiplex switching method. 10. The time division multiplexing method further comprises:
10. The time division multiplex switching method according to claim 6, further comprising a time-space switch control step of outputting a signal indicating a port number or a time slot position of the output side time division communication path.