GB2280338A - Multiple bit stream multiplexor/demultiplexor for communication channels - Google Patents

Multiple bit stream multiplexor/demultiplexor for communication channels Download PDF

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Publication number
GB2280338A
GB2280338A GB9314829A GB9314829A GB2280338A GB 2280338 A GB2280338 A GB 2280338A GB 9314829 A GB9314829 A GB 9314829A GB 9314829 A GB9314829 A GB 9314829A GB 2280338 A GB2280338 A GB 2280338A
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GB
United Kingdom
Prior art keywords
demultiplexor
multiplexor
parallel
serial
audio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9314829A
Other versions
GB9314829D0 (en
GB2280338B (en
Inventor
Gregory Richard Nunan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MOTION MEDIA TECHN Ltd
Original Assignee
MOTION MEDIA TECHN Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MOTION MEDIA TECHN Ltd filed Critical MOTION MEDIA TECHN Ltd
Priority to GB9314829A priority Critical patent/GB2280338B/en
Publication of GB9314829D0 publication Critical patent/GB9314829D0/en
Publication of GB2280338A publication Critical patent/GB2280338A/en
Application granted granted Critical
Publication of GB2280338B publication Critical patent/GB2280338B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
    • H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
    • H04N21/238—Interfacing the downstream path of the transmission network, e.g. adapting the transmission rate of a video stream to network bandwidth; Processing of multiplex streams
    • H04N21/2389—Multiplex stream processing, e.g. multiplex stream encrypting
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/438—Interfacing the downstream path of the transmission network originating from a server, e.g. retrieving encoded video stream packets from an IP network
    • H04N21/4385—Multiplex stream processing, e.g. multiplex stream decrypting
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/24—Systems for the transmission of television signals using pulse code modulation
    • H04N7/52—Systems for transmission of a pulse code modulated video signal with one or more other pulse code modulated signals, e.g. an audio signal or a synchronizing signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/60—Network structure or processes for video distribution between server and client or between remote clients; Control signalling between clients, server and network components; Transmission of management data between server and client, e.g. sending from server to client commands for recording incoming content stream; Communication details between server and client 
    • H04N21/61—Network physical structure; Signal processing
    • H04N21/6106—Network physical structure; Signal processing specially adapted to the downstream path of the transmission network
    • H04N21/6137—Network physical structure; Signal processing specially adapted to the downstream path of the transmission network involving transmission via a telephone network, e.g. POTS
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/60—Network structure or processes for video distribution between server and client or between remote clients; Control signalling between clients, server and network components; Transmission of management data between server and client, e.g. sending from server to client commands for recording incoming content stream; Communication details between server and client 
    • H04N21/61—Network physical structure; Signal processing
    • H04N21/6156—Network physical structure; Signal processing specially adapted to the upstream path of the transmission network
    • H04N21/6187—Network physical structure; Signal processing specially adapted to the upstream path of the transmission network involving transmission via a telephone network, e.g. POTS

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

A multiplexor/demultiplexor system which employs software running on one or more microprocessors 2 to multiplex video, audio, computer or other data whilst in parallel form prior to converting the combined parallel data into one or more serial bit streams for transmission down an ISDN. When the system is acting as a demultiplexor, the incoming serial bit stream(s) is converted to a parallel form before being demultiplexed using software running on one or more microprocessors to reproduce the video, audio, computer and other bit streams. <IMAGE>

Description

MULTIPLIE BIT STREAM MULCT I P MULTIPLEXOR/DEMULTIPLEXOR I P LIXOF? FOR COMMUNICATION CHANNELS This invention relates to an electronic system which multiplexes and demultiplexes a series of incoming and outgoing bit streams into and out of ISDN (Integrated Services Digital Network) communication channels.
Bit stream multiplexors are used to concentrate a number of bitstreams, for example, video data, audio data and computer data, into one or more ISDN communications channels. The demultiplexor reverses this function by splitting the original bit streams from an incoming ISDN communication channel or channels. This process is usually achieved using hardware to convert the ISDN channel(s) to a serial bus protocol. Video, audio, computer and other data bit streams directly access, or are removed from, the serial bus in a serial form via a hardware multiplexor/ demultiplexor.
The invention described herein provides an alternative technique which employs software running on one or more microprocessors to multiplex video, audio, computer and other data whilst in a parallel form prior to converting the combined parallel data into one or more serial bit streams. When the system is acting as a demultiplexor, the incoming serial bit stream(s) is converted to a parallel form before being demultiplexed using software running on one or more microprocessors to reconstruct the ' video, audio, computer and other bit streams. The microprocessor(s) may also be used to initialise the system and perform call setup functions.
According to the present invention there is provided a multiplexor/demultiplexor comprising one or more microprocessors, a parallel data bus, a memory, a number of serial to parallel and parallel to serial converters, a serial bus and an ISDN interface circuit. A specific embodiment of the invention will now be described by way of an example with reference to the accompanying drawing.
Referring to the drawing the Multiplexor/ Demultiplexor system comprises a high speed serial port 1, a microprocessor 2, a parallel bus 3, a memory 4, other devices using the parallel bus 5, a number of serial to parallel converters 6, a serial bus 7, an ISDN interface circuit 8 with an ISDN communications port 9.
The video, audio, computer and other data bit streams enter and leave the microprocessor via either the parallel bus or through dedicated serial ports.
The microprocessor 2, is used to initialise the whole system and perform call setup functions.
The memory 4 is used to store input bit streams, output bit streams, multiplexed and demultiplexed bit streams. This memory is also used by the microprocessor to correct any differential time delays caused by the communication channels and/or other signal processing activities.
Other devices or circuits 5 are also attached to the parallel bus to communicate with the microprocessor 2 and perform various additional functions.
The number of parallel to serial and serial to parallel converters 6 can be varied to accommodate the required bandwidth of the ISDN communication port 9.

Claims (7)

LIAI MS
1 A multiplexor/demultiplexor comprising a microprocessor, a parallel data bus, a memory, a number of serial to parallel and parallel to serial converters, a serial bus and an ISDN interface circuit.
2 A multiplexor/demultiplexor system as claimed in claim 1 wherein the one or more of the video, audio, computer or other data sources access the microprocessor via the parallel bus.
3 A multiplexor/demultiplexor system as claimed in claim 1 wherein the one or more of the video, audio, computer or other data sources access the microprocessor via one or more dedicated serial ports.
4 A multiplexor/demultiplexor system as claimed in claim 1 wherein one or more of the video, audio, computer or other data sources access the parallel bus via the serial bus.
5 A multiplexor/demultiplexor system as claimed in claim 4 wherein the incoming and outgoing audio bit streams can optionally be passed directly to the ISDN interface circuit via the serial bus.
6 A multiplexor/demultiplexor system as claimed in any of the above claims wherein the microprocessor is also used to initialise the system and/or setup calls.
7 A multiplexor/demultiplexor system as claimed in any of the above claims wherein a plurality microprocessors are used.
GB9314829A 1993-07-16 1993-07-16 Multiple bit stream multiplexor/demultiplexor for communication channels Expired - Fee Related GB2280338B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9314829A GB2280338B (en) 1993-07-16 1993-07-16 Multiple bit stream multiplexor/demultiplexor for communication channels

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9314829A GB2280338B (en) 1993-07-16 1993-07-16 Multiple bit stream multiplexor/demultiplexor for communication channels

Publications (3)

Publication Number Publication Date
GB9314829D0 GB9314829D0 (en) 1993-09-01
GB2280338A true GB2280338A (en) 1995-01-25
GB2280338B GB2280338B (en) 1997-09-24

Family

ID=10738989

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9314829A Expired - Fee Related GB2280338B (en) 1993-07-16 1993-07-16 Multiple bit stream multiplexor/demultiplexor for communication channels

Country Status (1)

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GB (1) GB2280338B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2306850A (en) * 1995-10-30 1997-05-07 Nec Corp Multimedia/ATM interface
WO1998014015A2 (en) * 1996-09-24 1998-04-02 Cirrus Logic, Inc. A method and apparatus for having multiple virtual paths in one serial i/o controller channel

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0310066A2 (en) * 1987-09-30 1989-04-05 Fujitsu Limited Programmable multiplexing/demultiplexing system
US5018141A (en) * 1988-08-03 1991-05-21 Samsung Electronics, Co., Ltd. Circuit for separating voice, data and signaling information
US5184348A (en) * 1988-12-27 1993-02-02 Bull, S.A. Isdn multiprotocol communications controller
EP0533091A2 (en) * 1991-09-12 1993-03-24 Fujitsu Limited Parallel transmission method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0310066A2 (en) * 1987-09-30 1989-04-05 Fujitsu Limited Programmable multiplexing/demultiplexing system
US5018141A (en) * 1988-08-03 1991-05-21 Samsung Electronics, Co., Ltd. Circuit for separating voice, data and signaling information
US5184348A (en) * 1988-12-27 1993-02-02 Bull, S.A. Isdn multiprotocol communications controller
EP0533091A2 (en) * 1991-09-12 1993-03-24 Fujitsu Limited Parallel transmission method

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2306850A (en) * 1995-10-30 1997-05-07 Nec Corp Multimedia/ATM interface
US5717691A (en) * 1995-10-30 1998-02-10 Nec Usa, Inc. Multimedia network interface for asynchronous transfer mode communication system
GB2306850B (en) * 1995-10-30 1999-11-17 Nec Corp Multimedia network interface for asynchronous mode transfer communication system
WO1998014015A2 (en) * 1996-09-24 1998-04-02 Cirrus Logic, Inc. A method and apparatus for having multiple virtual paths in one serial i/o controller channel
WO1998014015A3 (en) * 1996-09-24 1998-10-29 Cirrus Logic Inc A method and apparatus for having multiple virtual paths in one serial i/o controller channel
US5983291A (en) * 1996-09-24 1999-11-09 Cirrus Logic, Inc. System for storing each of streams of data bits corresponding from a separator thereby allowing an input port accommodating plurality of data frame sub-functions concurrently

Also Published As

Publication number Publication date
GB9314829D0 (en) 1993-09-01
GB2280338B (en) 1997-09-24

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Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20020716