JPH11354827A - Photodetector and manufacture thereof - Google Patents

Photodetector and manufacture thereof

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Publication number
JPH11354827A
JPH11354827A JP10157143A JP15714398A JPH11354827A JP H11354827 A JPH11354827 A JP H11354827A JP 10157143 A JP10157143 A JP 10157143A JP 15714398 A JP15714398 A JP 15714398A JP H11354827 A JPH11354827 A JP H11354827A
Authority
JP
Japan
Prior art keywords
layer
concentration
light
receiving element
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10157143A
Other languages
Japanese (ja)
Inventor
Hitoshi Nakamura
均 中村
Shigehisa Tanaka
滋久 田中
Yasunobu Matsuoka
康信 松岡
Masato Shishikura
正人 宍倉
Shinji Tsuji
伸二 辻
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10157143A priority Critical patent/JPH11354827A/en
Publication of JPH11354827A publication Critical patent/JPH11354827A/en
Pending legal-status Critical Current

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  • Light Receiving Elements (AREA)

Abstract

PROBLEM TO BE SOLVED: To suppress the deterioration of a mesa type photodetector having a low-concn. active layer sandwiched between high-concn. layers on the interface/surface, by relatively thickening the peripheral part of the low-concn. layer than its central part. SOLUTION: The peripheral part of a low-concn. P buffer layer 13 is made thicker than its central part, resulting in a low electric field over an multiplying layer 16 and light absorption layer 14 at the peripheral part than that over the central part. As a result, the dark current flowing in the peripheral part and multiplication ratio of the peripheral part are suppressed to realize a high reliability, and the deterioration at the interface/surface of the main cause of deterioration of an avalanche diode can be suppressed.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は光通信に用いる受光
素子に関する。
The present invention relates to a light receiving element used for optical communication.

【0002】[0002]

【従来の技術】アバランシェフォトダイオード(AP
D),PINフォトダイオード等の通信用受光素子には
高い信頼性が要求される。これまで高信頼度APDとし
て図1(a)に示すプレナ型ガードリング付き構造が知
られている。入射光はP−InGaAs光吸収層6で吸
収され、生じたフォトキャリアはP−電極1,N−電極
8間の電圧によりn−InP層4で増倍される。この素
子の電界分布は同図(b)のようになっている。良好な
特性を得るため、増倍層膜厚をZn拡散2により0.1
μm オーダで管理する。また、Be打ち込み等により
形成されるガードリング傾斜接合の導入により周辺の降
伏を抑制し、高信頼化を可能にする。
2. Description of the Related Art Avalanche photodiodes (AP)
D), high reliability is required for communication light receiving elements such as PIN photodiodes. A structure with a planar guard ring shown in FIG. 1A has been known as a highly reliable APD. Incident light is absorbed by the P-InGaAs light absorbing layer 6, and the generated photocarriers are multiplied by the n-InP layer 4 by the voltage between the P-electrode 1 and the N-electrode 8. The electric field distribution of this element is as shown in FIG. In order to obtain good characteristics, the thickness of the multiplication layer is set to 0.1 by Zn diffusion 2.
Manage on the order of μm. In addition, by introducing a guard ring inclined junction formed by Be implantation or the like, peripheral yielding is suppressed, and high reliability can be achieved.

【0003】[0003]

【発明が解決しようとする課題】一方、Zn拡散,Be
打ち込み技術は作製上の祐度が小さく(<0.1μm以
下),作製工程の簡素化,容易性、また低価格化の観点
からは必ずしも望ましい方法ではない。
On the other hand, Zn diffusion, Be
The implantation technique has a low manufacturing flexibility (<0.1 μm or less), and is not necessarily a desirable method from the viewpoints of simplification of the manufacturing process, easiness, and cost reduction.

【0004】本発明の目的は素子特性,信頼性を損なう
ことなく、簡素かつ容易でしかも低価格な素子構造およ
びその作製方法を提供することにある。
An object of the present invention is to provide a simple, easy, and inexpensive element structure without impairing element characteristics and reliability, and a method of manufacturing the same.

【0005】[0005]

【課題を解決するための手段】上記目的のため、本発明
では低濃度の能動層の両側を高濃度の層で挟んだ構成の
メサ型受光素子において、低濃度層の周辺部膜厚を中央
部に比べ相対的に厚くした構造を提供する。
In order to achieve the above object, according to the present invention, in a mesa light receiving element having a structure in which both sides of a low-concentration active layer are sandwiched between high-concentration layers, the peripheral portion of the low-concentration layer has a center film thickness. Provide a structure that is relatively thicker than the part.

【0006】本発明の原理を図2に示すAPDにより説
明する。同図(a)の構造において、入射光はP-− 光
吸収層14で吸収され、注入された電子は低濃度増倍層
16で増倍される。本発明の主旨はP−低濃度バッファ
層13の膜厚を中央部に比べ周辺部で厚くすることであ
る。これにより同図(b)の電界分布に示すように、周
辺部の増倍層,光吸収層の電界は中心部に比べ小さくな
る。従って、周辺部を流れる暗電流,周辺部の増倍率は
抑制され、その結果、高信頼性を実現することができ
る。これはAPDの主要な劣化要因である界面,表面で
の劣化を抑制できるためである。
The principle of the present invention will be described with reference to an APD shown in FIG. In the structure shown in FIG. 2A, incident light is absorbed by the P − light absorbing layer 14, and the injected electrons are multiplied by the low concentration multiplication layer 16. The gist of the present invention is to make the thickness of the P-low concentration buffer layer 13 thicker in the peripheral portion than in the central portion. As a result, as shown in the electric field distribution of FIG. 3B, the electric fields of the multiplication layer and the light absorption layer in the peripheral portion are smaller than those in the central portion. Therefore, the dark current flowing in the peripheral portion and the multiplication factor in the peripheral portion are suppressed, and as a result, high reliability can be realized. This is because deterioration at the interface and surface, which is a major factor of APD deterioration, can be suppressed.

【0007】[0007]

【発明の実施の形態】図2に本発明の一実施例として超
格子APDを示す。動作原理は上述のとおりである。以
下作製方法を示す。
FIG. 2 shows a superlattice APD as an embodiment of the present invention. The principle of operation is as described above. Hereinafter, a manufacturing method will be described.

【0008】分子線エピタキシ法によりn−InP基板
17上にアンドープ(undoped)−InGaAs/In
AlAs増倍層(0.3μm)16,P−InAlAs高
濃度バッファ層(P=2×1017,d=0.2μm)1
5,P−InGaAs光吸収層(P=2×1014,d=
2μm)14,P−InAlAs低濃度バッファ層(P
=2×1014,d=2μm)13,P−InAlAs高
濃度バッファ層(P=2×1018,d=2μm)12を
積層した。
[0008] Undoped-InGaAs / In is deposited on an n-InP substrate 17 by molecular beam epitaxy.
AlAs multiplication layer (0.3 μm) 16, P-InAlAs high concentration buffer layer (P = 2 × 10 17 , d = 0.2 μm) 1
5, P-InGaAs light absorbing layer (P = 2 × 10 14 , d =
2 μm) 14, P-InAlAs low concentration buffer layer (P
= 2 × 10 14 , d = 2 μm) 13 and a P-InAlAs high concentration buffer layer (P = 2 × 10 18 , d = 2 μm) 12 were laminated.

【0009】続いて、ウエットエッチングによりメサ構
造を形成し、プラズマCVDによりSiNパッシベーシ
ョン膜18を形成した。メサ中央部にコンタクトホール
を形成した後、このホールにZnを拡散して低濃度層1
3の中央部を一部高濃度化した。本実施例では低濃度残
留膜厚は0.1μm であった。本素子の特性を評価した
結果、最大帯域幅10GHz,利得帯域幅積80GH
z,増倍率10での暗電流100nAの良好な特性を得
た。また、信頼度評価のため200℃,100μAの高
温定電流通電試験を行った。その結果から85℃連続動
作で100年以上の平均素子寿命を推定した。
Subsequently, a mesa structure was formed by wet etching, and a SiN passivation film 18 was formed by plasma CVD. After forming a contact hole in the center of the mesa, Zn is diffused into the hole to form a low concentration layer 1.
The central part of Sample No. 3 was partially concentrated. In this embodiment, the low-concentration residual film thickness was 0.1 μm. As a result of evaluating the characteristics of this element, the maximum bandwidth was 10 GHz and the gain bandwidth product was 80 GH.
Good characteristics of a dark current of 100 nA at z and a gain of 10 were obtained. In addition, a high-temperature constant-current conduction test at 200 ° C. and 100 μA was performed for reliability evaluation. From the results, an average element life of 100 years or more in continuous operation at 85 ° C. was estimated.

【0010】また、本発明の主旨である低濃度層13の
膜厚変調の値と素子信頼性の関係を調べた。周辺部の低
濃度層13の膜厚を一定(2μm)として、中央部の低
濃度層残膜厚を0μm,0.2μm,0.5μm,1μm
の素子について調べた結果、0μm,0.2μm,0.5
μmでは上記推定寿命100年以上、1μmでは50−
80年の結果を得た。このことから、本発明が信頼性向
上に効果的であることが確認できた。
Further, the relationship between the thickness modulation value of the low-concentration layer 13 and the device reliability, which is the gist of the present invention, was examined. The thickness of the low-concentration layer 13 at the periphery is constant (2 μm), and the remaining thickness of the low-concentration layer at the center is 0 μm, 0.2 μm, 0.5 μm, and 1 μm.
As a result of examining the device of No. 0, 0.2 μm, 0.5
The estimated life is 100 years or more at 1 μm and 50-
80 years of results. From this, it was confirmed that the present invention was effective for improving the reliability.

【0011】図3に本発明を導波路型PIN受光素子に
適用した別の実施例を示す。本素子では入射光は素子端
面から入射して、上下の電極より電気信号として取り出
される。21はP−電極、22はSiNパッシベーショ
ン膜、23はP−InGaAlAs(高濃度第2クラッド層)、
24はP−InGaAlAs(高濃度第1クラッド
層)、25はP−InGaAlAs(低濃度第1クラッ
ド層)、26はP− InGaAs(光吸収層)、2
7はN−InGaAlAs(高濃度第1クラッド層)、
28はN−InGaAlAs(高濃度第2クラッド
層)、29はn−InP(基板)、30はN−電極であ
る。作製法は基本的に上記実施例と同様である。25の
P−低濃度第1クラッド層の中央部にZn拡散を行うこ
とにより、中央部の低濃度層領域の膜厚を周辺部(素子
側面および端面)1μmの領域に比べ薄膜化した。本素
子でも前実施例同様本発明による高信頼度化(推定寿命
200年)を確認した。
FIG. 3 shows another embodiment in which the present invention is applied to a waveguide type PIN light receiving element. In this device, incident light enters from the end face of the device and is extracted as an electric signal from upper and lower electrodes. 21 is a P-electrode, 22 is a SiN passivation film, 23 is P-InGaAlAs (high concentration second cladding layer),
24 is P-InGaAlAs (high-concentration first cladding layer), 25 is P-InGaAlAs (low-concentration first cladding layer), 26 is P-InGaAs (light absorbing layer), 2
7 is N-InGaAlAs (high concentration first cladding layer),
28 is N-InGaAlAs (high-concentration second cladding layer), 29 is n-InP (substrate), and 30 is an N-electrode. The fabrication method is basically the same as in the above embodiment. By performing Zn diffusion in the central portion of the 25 P-low-concentration first cladding layer, the thickness of the low-concentration layer region in the central portion was made thinner than that in the peripheral portion (side surface and end surface) of 1 μm. In this element, as in the previous example, it was confirmed that high reliability (estimated life: 200 years) was achieved by the present invention.

【0012】[0012]

【発明の効果】本発明によれば簡易な作製法により信頼
性の高い受光素子を提供できる。
According to the present invention, a highly reliable light receiving element can be provided by a simple manufacturing method.

【図面の簡単な説明】[Brief description of the drawings]

【図1】従来のプレナ型ガードリング付APDの断面図
および電界分布図。
FIG. 1 is a sectional view and an electric field distribution diagram of a conventional APD with a guard ring.

【図2】本発明の一実施例のAPDの断面図および電界
分布図。
FIG. 2 is a sectional view and an electric field distribution diagram of an APD according to an embodiment of the present invention.

【図3】本発明の一実施例の導波路型PIN−PD素子
の部分断面斜視図。
FIG. 3 is a partial sectional perspective view of a waveguide type PIN-PD element according to one embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1…P−電極、2…Zn拡散層、3…Beガードリン
グ、4…N−InP(増倍層)、5…N−InGaAs
P(電界緩和層)、6…N−InGaAs(光吸収
層)、7…N−InP(基板)、8…N−電極、11…
P−電極、12…P−InAlAs(高濃度バッファ
層)、13…P−InAlAs(低濃度バッファ層)、
14…P−InGaAs(光吸収層)、15…P−In
AlAs(高濃度バッファ層)、16…undoped
−InGaAs/InAlAs(増倍層)、17…N−I
nP(基板)、18…SiNパッシベーション膜、19
…N−電極、20…反射防止膜、21…P−電極、22
…SiNパッシベーション膜、23…P−InGaAl
As(高濃度第2クラッド層)、24…P−InGaAl
As(高濃度第1クラッド層)、25…P−InGaA
lAs(低濃度第1クラッド層)、26…P−InGa
As(光吸収層)、27…N−InGaAlAs(高濃
度第1クラッド層)、28…N−InGaAlAs(高
濃度第2クラッド層)、29…N−InP(基板)、3
0…N−電極。
DESCRIPTION OF SYMBOLS 1 ... P- electrode, 2 ... Zn diffusion layer, 3 ... Be guard ring, 4 ... N-InP (multiplication layer), 5 ... N-InGaAs
P (electric field relaxation layer), 6 ... N-InGaAs (light absorbing layer), 7 ... N-InP (substrate), 8 ... N-electrode, 11 ...
P-electrode, 12 ... P-InAlAs (high concentration buffer layer), 13 ... P-InAlAs (low concentration buffer layer),
14 ... P-InGaAs (light absorbing layer), 15 ... P-In
AlAs (high concentration buffer layer), 16 ... undoped
-InGaAs / InAlAs (multiplication layer), 17 ... NI
nP (substrate), 18 ... SiN passivation film, 19
... N-electrode, 20 ... anti-reflection film, 21 ... P-electrode, 22
... SiN passivation film, 23 ... P-InGaAl
As (high concentration second cladding layer), 24 ... P-InGaAl
As (high concentration first cladding layer), 25... P-InGaAs
1As (low concentration first cladding layer), 26 ... P-InGa
As (light absorbing layer), 27 ... N-InGaAlAs (high concentration first cladding layer), 28 ... N-InGaAlAs (high concentration second cladding layer), 29 ... N-InP (substrate), 3
0 ... N-electrode.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 宍倉 正人 東京都国分寺市東恋ケ窪一丁目280番地 株式会社日立製作所中央研究所内 (72)発明者 辻 伸二 東京都国分寺市東恋ケ窪一丁目280番地 株式会社日立製作所中央研究所内 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Masato Shishikura 1-280 Higashi-Koigakubo, Kokubunji-shi, Tokyo Inside the Central Research Laboratory of Hitachi, Ltd. (72) Inventor Shinji Tsuji 1-280 Higashi-Koikekubo, Kokubunji-shi, Tokyo Hitachi Central Research Laboratory

Claims (9)

【特許請求の範囲】[Claims] 【請求項1】低濃度の能動層の両側を高濃度の層で挟ん
だ構成のメサ型受光素子において、上記低濃度層の膜厚
が中央部においてゼロないしは中央部に比べ周辺部の方
が厚い構造を有してなることを特徴とする受光素子。
In a mesa light receiving element having a structure in which both sides of a low-concentration active layer are sandwiched between high-concentration layers, the thickness of the low-concentration layer is zero at the center or at the periphery in the periphery compared to the center. A light-receiving element having a thick structure.
【請求項2】低濃度の能動層の両側を高濃度の層で挟ん
だ構成のメサ型受光素子において、高濃度層の膜厚が中
央部に比べ周辺部の方が薄い構造を有してなることを特
徴とする受光素子。
2. A mesa-type light receiving element having a structure in which both sides of a low-concentration active layer are sandwiched between high-concentration layers, wherein the thickness of the high-concentration layer is smaller at the periphery than at the center. A light receiving element characterized by the following.
【請求項3】請求項1または2に記載の素子構造からな
るPINフォトダイオード。
3. A PIN photodiode having the element structure according to claim 1.
【請求項4】請求項1または2に記載の素子構造からな
るアバランシェフォトダイオード。
4. An avalanche photodiode having the element structure according to claim 1.
【請求項5】請求項1または2に記載の素子構造からな
る導波路型フォトダイオード。
5. A waveguide photodiode having the element structure according to claim 1.
【請求項6】請求項1または2に記載の受光素子におい
て、その構成層として高濃度N型層,増倍層,電界緩和
層,光吸収層,低濃度P型層,高濃度P型層を含み、中
央部,周辺部の膜厚の違いが前記低濃度P型層,高濃度
P型層によりもたらされるアバランシェフォトダイオー
ドであることを特徴とする受光素子。
6. A light-receiving element according to claim 1, wherein the constituent layers include a high-concentration N-type layer, a multiplication layer, an electric field relaxation layer, a light absorption layer, a low-concentration P-type layer, and a high-concentration P-type layer. Wherein the light-receiving element is an avalanche photodiode in which a difference in film thickness between a central portion and a peripheral portion is caused by the low-concentration P-type layer and the high-concentration P-type layer.
【請求項7】請求項1または2に記載の受光素子におい
て、その構成層として光吸収層、それを狭む第1のクラ
ッド層、さらにそれらを狭む第2の高濃度クラッド層を
含み、中央部,周辺部の膜厚の違いが前記第1のクラッ
ド層内に形成される低濃度P型層,高濃度P型層により
もたらされる導波路型フォトダイオードであることを特
徴とする受光素子。
7. The light receiving element according to claim 1, further comprising a light absorbing layer, a first cladding layer narrowing the light absorbing layer, and a second high-concentration cladding layer narrowing the light absorbing layer. A light receiving element wherein a difference in film thickness between a central portion and a peripheral portion is a waveguide photodiode provided by a low-concentration P-type layer and a high-concentration P-type layer formed in the first cladding layer. .
【請求項8】上記受光素子の中央部と周辺部の膜厚の違
いを、Zn拡散またはBeイオン打ち込みにより形成す
る工程を含むことを特徴とする請求項1ないし7のいず
れか記載の受光素子の作成方法。
8. The light-receiving element according to claim 1, further comprising a step of forming a difference in film thickness between a central portion and a peripheral portion of said light-receiving element by Zn diffusion or Be ion implantation. How to create
【請求項9】請求項1ないし7のいずれか記載の受光素
子を用いた光受信モジュール。
9. An optical receiving module using the light receiving element according to claim 1.
JP10157143A 1998-06-05 1998-06-05 Photodetector and manufacture thereof Pending JPH11354827A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10157143A JPH11354827A (en) 1998-06-05 1998-06-05 Photodetector and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10157143A JPH11354827A (en) 1998-06-05 1998-06-05 Photodetector and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH11354827A true JPH11354827A (en) 1999-12-24

Family

ID=15643132

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10157143A Pending JPH11354827A (en) 1998-06-05 1998-06-05 Photodetector and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH11354827A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6885039B2 (en) 2002-10-30 2005-04-26 Fujitsu Limited Semiconductor photodetector and avalanche photodiode
JP2006339413A (en) * 2005-06-02 2006-12-14 Fujitsu Ltd Semiconductor light receiving device and its manufacturing method
JP2009004812A (en) * 2001-02-26 2009-01-08 Opnext Japan Inc Avalanche photo-diode
US10580927B2 (en) 2017-03-01 2020-03-03 Sumitomo Electric Device Innovations, Inc. Process of forming light-receiving device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009004812A (en) * 2001-02-26 2009-01-08 Opnext Japan Inc Avalanche photo-diode
US6885039B2 (en) 2002-10-30 2005-04-26 Fujitsu Limited Semiconductor photodetector and avalanche photodiode
JP2006339413A (en) * 2005-06-02 2006-12-14 Fujitsu Ltd Semiconductor light receiving device and its manufacturing method
US7875946B2 (en) 2005-06-02 2011-01-25 Fujitsu Limited Semiconductor photodetector that causes avalanche multiplication to occur only at photodetector portion located at central portion of mesa structure
US8772896B2 (en) 2005-06-02 2014-07-08 Fujitsu Limited Semiconductor photodetector that causes avalanche multiplication to occur only at photodetector portion located at central portion of mesa structure
US9276162B2 (en) 2005-06-02 2016-03-01 Fujitsu Limited Semiconductor photodetector and method for manufacturing the same
US10580927B2 (en) 2017-03-01 2020-03-03 Sumitomo Electric Device Innovations, Inc. Process of forming light-receiving device

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