JPH11345985A - Semiconductor dynamic quantity sensor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent short circuit between movable parts and a semiconductor layer facing the movable parts, in a semiconductor dynamic quantity sensor. SOLUTION: A single crystal silicon substrate 1 is bonded on a single crystal silicon substrate 8 via an SiO2 film 9, and the single crystal silicon substrate 1 is made a thin film. Cantilever beams 13 are formed on the single crystal silicon substrate 1 and are made movable in the direction parallel with the surface of the substrate. The surfaces of the cantilever beams 13 and the single crystal silicon substrate 1 facing the cantilever beams 13 are covered with an SiO2 film 5, so that electrode short circuit in a capacitance type acceleration sensor is prevented. A signal processing circuit 10 is formed on the single crystal silicon substrate 1, and signal processing subsequent to the action of the cantilever beams 13 is performed by the signal processing circuit 10.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor dynamic quantity sensor, and more particularly, to a semiconductor dynamic quantity sensor suitable for an airbag system, a suspension control system, and the like of an automobile.

[0002]

2. Description of the Related Art Nikkei Electronics 1991.11.
11 (No. 540), P223 to P231, an acceleration sensor using a surface micromachining technique is shown. In other words, by laminating a thin polysilicon film on a silicon substrate and etching this polysilicon layer, a movable portion movable in a direction parallel to the surface is formed, thereby forming a differential capacitive acceleration sensor. ing.

[0003]

However, when the sensor receives a large amount of dynamics, the movable part may move greatly and may physically contact the silicon layer facing the movable part.
This physical contact creates an undesirable short circuit to the output of the sensor.

It is an object of the present invention to provide a semiconductor dynamic quantity sensor capable of preventing a short circuit between a movable portion and a semiconductor layer facing the movable portion.

[0005]

Means for Solving the Problems The invention according to claim 1 is:
A semiconductor layer (1) formed on the first substrate (8); and a movable part (13) formed on the semiconductor layer and moving by the action of acceleration. A semiconductor dynamic quantity sensor for generating an accompanying signal, wherein at least one of the surface of the movable portion and the semiconductor layer facing the movable portion is covered with an insulator (5). The gist is a physical quantity sensor.

The invention according to claim 2 is characterized in that the insulator is a dielectric.

The invention according to claim 3 is characterized in that the insulator is an oxide film (5).

According to a fourth aspect of the present invention, the semiconductor layer is formed of single crystal silicon.

The invention according to claim 5 is characterized in that a polysilicon layer (7) is formed between the semiconductor layer facing the movable portion and the first substrate.

The invention according to claim 6 is characterized in that an n + region (4) serving as an electrode is formed in the movable portion.

According to a seventh aspect of the present invention, the movable portion includes a movable beam portion (13), and a thickness (L1) of the beam portion in a thickness direction of the semiconductor layer is a plane of the semiconductor layer. A width (L2) of the beam portion in the direction.

[0012]

According to the first aspect of the present invention,
Since the surface of the movable portion or at least one of the semiconductor layers facing the movable portion is covered with an insulator, even if the movable portion moves significantly and physically contacts the opposed semiconductor layer, the gap between the two remains. Are insulated, so that no short circuit is formed.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a plan view of the acceleration sensor, and FIG. 2 is a sectional view taken along line AA of FIG. This acceleration sensor is a capacitive acceleration sensor. As shown in FIG. 2, a single-crystal silicon substrate 1 is bonded to a single-crystal silicon substrate 8 via an SiO2 film 9,
The cantilever 13 by the trench 3 penetrating the same substrate 1
Are formed. As shown in FIG. 1, the cantilever 13 has a structure in which the distal end is divided into two.
The cantilever 13 is movable in a direction parallel to the surface of the single crystal silicon substrate 1 (the direction of arrow C in FIG. 1). Further, in the single crystal silicon substrate 1, the signal processing circuit 10 is formed in a state of being electrically insulated from the cantilever 13 by the polysilicon film 6 and the SiO2 film 5.

3 to 10 show the manufacturing steps. Hereinafter, the manufacturing process will be described. As shown in FIG.
An n-type (100) single-crystal silicon substrate 1 of 0 Ω · cm is prepared, and its main surface is thermally oxidized to about 1 μm
A film 2 is formed, and SiO 2 is formed by photolithography.
2 The film 2 is formed in a predetermined pattern. Subsequently, a predetermined depth, for example, 0.2 to 30 μm, is formed on the main surface side of the single crystal silicon substrate 1 by reactive ion etching or the like.
A trench 3 having a vertical wall of about m is formed. In this embodiment, the case of about 3 μm will be described.

After removing the SiO 2 film 2, FIG.
As shown in FIG. 1, an n @ + diffusion layer 4 made of phosphorus, arsenic, or the like is formed on the main surface of the single crystal silicon substrate 1 including the inner wall of the trench 3, and then a 0.1-1 .mu.m SiO.sub.
2 A film 5 is formed. At this time, so-called sacrificial oxidation for forming and removing SiO2 by thermal oxidation before forming the n @ + diffusion layer 4 may be performed in order to remove damage due to etching.

Subsequently, as shown in FIG. 5, a polysilicon film 6 is formed on the main surface of the single crystal silicon substrate 1, and the trench 3 is filled with the polysilicon film 6. When impurities are introduced into the polysilicon film 6 in order to use the polysilicon film 6 as a conductive path for bias, a thin polysilicon layer is formed before the polysilicon film 6 is formed, and phosphorus or the like is highly doped. In this case, impurities can be introduced into the polysilicon film 6.

Next, as shown in FIG. 6, the surface of the polysilicon film 6 is mirror-polished to a predetermined thickness.
To remain. Subsequently, a p @ + diffusion layer 7 of boron is formed in a predetermined region of the polysilicon film 6 by ion implantation or the like.

On the other hand, as shown in FIG.
00) A single-crystal silicon substrate 8 is prepared, and a 0.1 to 1.0 μm SiO2 film 9 is formed on the main surface by thermal oxidation. Next, the single-crystal silicon substrate 1 and the single-crystal silicon substrate 8 are placed in, for example, a mixed aqueous solution of aqueous hydrogen peroxide and sulfuric acid to perform a hydrophilic treatment. Then, after drying, as shown in FIG. 8, the main surface of the single crystal silicon substrate 1 and the main surface of the single crystal silicon substrate 8 are overlapped at room temperature, and
Place in a furnace at 100 ° C. for 0.5 to 2 hours to perform strong bonding.

Next, as shown in FIG. 9, the back surface of the single crystal silicon substrate 1 is selectively polished using an alkaline aqueous solution, for example, a KOH solution or the like, until the SiO 2 film 2 appears. As a result, the thickness of the single crystal silicon substrate 1 becomes, for example, about 3 μm, and the thickness is reduced.

Then, as shown in FIG. 10, a signal processing circuit (IC circuit section) 10 is formed in a predetermined region of the single crystal silicon substrate 1 by using a normal CMOS process or a bipolar process. In FIGS. 1 and 10,
Only a MOS transistor is shown as a part of the signal processing circuit 10. Further, a plasma SiN film (P-SiN) is formed on the upper surface of the signal processing circuit 10 as the passivation film 11 by, for example, a plasma CVD method. Continued
A window 12 is opened in a predetermined area of the passivation film 11.

Then, as shown in FIG. 2, TMAH (tetramethylammonium hydroxide) (CH3
2) Using a solution of about 20% of 4NOH, the polysilicon film 6 is etched away from the back side (the upper side in FIG. 2) of the single crystal silicon substrate 1 through the window 12 of the passivation film 11. At this time, the passivation film 11 (PS
iN), SiO2 film 5, aluminum wiring layer, p + diffusion layer (p
+ Polysilicon film) 7 is hardly etched by selective etching.

When the polysilicon film 6 is removed by etching, an etching hole 48 is provided in a wide portion of the cantilever 13 in FIG. 1, and the polysilicon film 6 can be more securely formed through the etching hole 48. Is removed by etching.

As a result, a cantilever 13 is formed. At this time, as shown in FIG. 2, the width L2 of the cantilever 13 in the direction parallel to the surface of the single crystal silicon substrate 1 is smaller than the thickness L1 of the single crystal silicon substrate 1 in the depth direction. ing.

In the capacitive acceleration sensor, a tip portion (a portion divided into two portions) of the cantilever 13 serves as a movable electrode, and faces the tip portion of the cantilever 13 as shown in FIG. Single-crystal silicon substrate 1 is fixed electrode 1
4, 15, 16, and 17. Also, as shown in FIG.
The fixed electrode 14 and the fixed electrode 16 are taken out by the aluminum wiring layer 18a, the fixed electrode 15 and the fixed electrode 17 are taken out by the aluminum wiring layer 18b, and the cantilever (movable electrode) 13 is taken out of the aluminum wiring layer. 18c. The aluminum wiring layers 18a, 18b and 18c are connected to a signal processing circuit 10, and the signal processing circuit 10 performs signal processing accompanying displacement of the cantilever (movable electrode) 13 due to acceleration. Also, cantilever 13
The potential is kept constant by the n + diffusion layer 4 (see FIG. 2) disposed on the (movable electrode) and the fixed electrodes 14, 15, 16, and 17.

Although a capacitive acceleration sensor is used in this embodiment, a piezoresistive acceleration sensor can be formed by forming a piezoresistive layer on the surface of the base of the cantilever 13. Of course, if these two types of sensors are formed on the same substrate, their accuracy and reliability can be further improved.

In the acceleration sensor manufactured as described above, the single-crystal silicon substrate 1 is bonded on the single-crystal silicon substrate 8 via the SiO 2 film to form an SOI structure. Further, in the cantilever 13, the width L2 in the direction parallel to the surface of the single crystal silicon substrate 1 is smaller than the thickness L1 in the depth direction of the single crystal silicon substrate 1. Therefore,
The cantilever 13 is movable on the surface of the single-crystal silicon substrate 1 in a direction parallel to the surface, and acceleration in a direction parallel to the substrate surface is detected.

As described above, in this embodiment, the trench (groove) 3 having a predetermined depth for forming the cantilever 13 is formed on the main surface of the single crystal silicon substrate 1 (first step), A polysilicon film 6 was formed on the main surface of the silicon substrate 1 to fill the trench 3 with the polysilicon film 6, and the surface of the polysilicon film 6 was smoothed (second step). Then, the main surface of the single crystal silicon substrate 1 and Si
The single-crystal silicon substrate 8 on which the O2 film (insulating film) 9 is formed is bonded via the SiO2 film 9 (third step), and the back surface of the single-crystal silicon substrate 1 is polished by a predetermined amount to obtain a single-crystal silicon substrate. 1 was thinned (fourth step). Further, after forming the signal processing circuit 10 on the surface of the single crystal silicon substrate 1,
The polysilicon film 6 was removed by etching from the back side of the single crystal silicon substrate 1 to form a cantilever 13 (fifth step).

Therefore, in the process of forming the signal processing circuit 10 during the wafer process, the polysilicon film 6
Trench 3 is formed on the surface of single crystal silicon substrate 1
, Which can prevent the contamination of the IC element, the contamination of the manufacturing apparatus, and the accompanying deterioration or deterioration of the electric characteristics. In other words, the wafer process prevents contamination and the like by stabilizing the wafer process by preventing surface structures such as concave portions and through-holes from appearing on the wafer surface during heat treatment, photolithography, and the like during the process. A highly accurate acceleration sensor can be supplied stably.

The acceleration sensor manufactured in this manner is bonded to a single-crystal silicon substrate 8 via an SiO 2 film (insulating film) 9 and is made thinner.
A cantilever 13 formed on the single crystal silicon substrate 1 and movable in a direction parallel to the surface thereof;
And a signal processing circuit 10 for performing signal processing accompanying the operation of the cantilever 13 due to acceleration. When acceleration acts in a direction parallel to the surface of the single-crystal silicon substrate 1, the cantilever 13 formed on the single-crystal silicon substrate 1 operates. Signal processing is performed by the signal processing circuit 10 formed on the single crystal silicon substrate 1 with the operation of the cantilever 13. In this manner, the acceleration sensor is formed by the surface micromachining technology using single crystal silicon, and high accuracy and high reliability can be achieved with a novel structure.

Further, since the surface of the cantilever 13 and the single-crystal silicon substrate 1 facing the cantilever 13 are covered with the SiO2 film (insulator) 5, the electrode short-circuit in the capacitive acceleration sensor is prevented. Can be prevented.
Note that at least one of the surface of the cantilever 13 and the single-crystal silicon substrate 1 facing the cantilever 13 is made of SiO 2.
2 It is only necessary to be covered with the film (insulator) 5.

As an application of this embodiment, FIGS.
In order to reduce the parasitic capacitance, the cantilever 13 may be separated from the signal processing circuit (IC circuit section) 10 to form an air bridge wiring as shown in FIG. In addition, fixed electrodes 14, 15, 1
6 and 17 may have the same structure. Further, in the above embodiment, the aluminum wiring layer is used, but the wiring portion may be formed by a polysilicon layer. Further, in the above embodiment, two movable electrodes are formed at the tip of the beam and four fixed electrodes 14, 15, 16, 17 are formed. However, in order to further improve the sensitivity, the movable electrode portion and the fixed electrode portion are formed. May be comb-shaped.

(Second Embodiment) Next, a second embodiment will be described focusing on differences from the first embodiment.

In the first embodiment, in order to form the cantilever 13, the p + diffusion layer (p + polysilicon film) 7 is formed in order to separate this portion from the single crystal silicon substrate by a certain distance. In the embodiment, the concave portion is formed before forming the trench in order to keep the predetermined distance.

FIGS. 13 to 21 show the manufacturing steps.
As shown in FIG. 13, an n-type (100) single-crystal silicon substrate 20 is prepared, and the recess 21 is formed on the main surface of the single-crystal silicon substrate 20 by dry etching or wet etching.
Is formed at a predetermined depth, for example, a depth of 0.1 to 5 μm. Then, as shown in FIG. 14, an SiO2 film 22 is formed on the main surface of the single crystal silicon substrate 20, and a pattern is formed by photolithography. Subsequently, a trench 23 of about 0.1 to 30 μm is formed on the main surface of the single crystal silicon substrate 20 including the bottom of the concave portion 21 by dry etching or the like.

Then, as shown in FIG.
In the main surface of the single crystal silicon substrate 20 including the inner wall of No. 3, n
+ A diffusion layer 24 is formed, and SiO
2 A film 25 is formed. Thereafter, as shown in FIG. 16, the polysilicon film 26 is formed in the trench 23 by the LPCVD method.
Embed

Subsequently, as shown in FIG.
Using the film 25 as a stopper, the surface of the polysilicon film 26 is polished to smooth the surface. At this time, the polysilicon film 2
6 and the surface of the SiO2 film 25 are desirably smooth, but if the surface of the SiO2 film 25 is smooth even if the portion of the polysilicon film 26 is dented, there is no problem in the subsequent wafer bonding. Absent.

On the other hand, as shown in FIG. 18, another (100) single crystal silicon substrate 27 is prepared, and a 0.1-1.0 μm SiO 2 film 28 is formed on its main surface by thermal oxidation.
To form Next, the single crystal silicon substrates 20 and 27 are
For example, it is placed in a mixed aqueous solution of aqueous hydrogen peroxide and sulfuric acid to perform a hydrophilic treatment. After drying, the main surfaces of both single-crystal silicon substrates 20 and 27 are overlapped at room temperature,
It is placed in a furnace at 1100 ° C. for 0.5 to 2 hours to perform strong bonding.

Next, as shown in FIG. 19, the back surface of the single-crystal silicon substrate 20 is selectively polished using an alkaline aqueous solution, for example, a KOH solution or the like, to form an SiO2 film 25.
Process until appears. As a result, the thickness of the single-crystal silicon substrate 20 becomes, for example, about 3 μm, and the thickness is reduced.

Then, as shown in FIG.
The signal processing circuit (IC circuit section) 10 is formed through an OS process, a bipolar process, or the like. Further, as a passivation film 11 on the upper surface of the signal processing circuit 10,
For example, a plasma SiN film (P-
(SiN film). Subsequently, a window 12 is opened in a predetermined region of the passivation film 11.

Then, as shown in FIG.
(Tetramethylammonium hydroxide) (C
The window 1 of the passivation film 11 is formed from the back side of the single crystal silicon substrate 20 using a solution of about 20% of H3) 4 NOH.
2 to remove the polysilicon film 26 by etching.
At this time, the passivation film 11 (P-SiN), S
The iO2 film 25 and the aluminum wiring layer are hardly etched by the selective etching.

As a result, a cantilever 13 is formed.

(Third Embodiment) Next, a third embodiment will be described focusing on differences from the first embodiment.

In the first and second embodiments, polysilicon is buried in the trench before wafer bonding. In this embodiment, polysilicon is buried in the trench after wafer bonding, and the buried polysilicon is used in the final step. And an acceleration sensor is manufactured.

FIGS. 22 to 28 show the manufacturing steps. As shown in FIG. 22, an n-type (100) single-crystal silicon substrate 30 is prepared, and a concave portion 31 having a depth of 0.1 to 5 μm is formed on a main surface thereof. On the other hand, as shown in FIG. 23, a single crystal silicon substrate 32 is prepared, and the main surface thereof is formed by thermal oxidation.
An iO2 film 33 is formed. Then, the main surface of single crystal silicon substrate 30 and the main surface of single crystal silicon substrate 32 are joined.

Further, as shown in FIG. 24, the back surface of the single crystal silicon substrate 30 has a predetermined thickness (0.1 to 30 μm).
Mirror polishing until m). Then, as shown in FIG. 25, a SiO2 film 34 is formed in a thickness of 0.1 to 2 [mu] m, and then a trench 35 is formed by etching. At this time, the cantilever 13 is formed.

Next, the arsenic or phosphorus N
Type impurities are introduced at a high concentration, and an n @ + high concentration layer 36 is formed in a region not covered with the SiO2 films 33 and 34. Subsequently, as shown in FIG. 26, a polysilicon film 37 is formed on the surface of the single crystal silicon substrate 30, and the trench 35 is filled with the polysilicon film 37. Thereafter, as shown in FIG. 27, the surface of the polysilicon film 37 is selectively polished to form SiO2.
Flatten until the film 34 appears. Further, as shown in FIG. 28, after forming the signal processing circuit 10, finally, the polysilicon film 37 is removed by etching from the back surface side (upper surface side) of the single crystal silicon substrate 30, thereby forming the cantilever 13.

As described above, in the present embodiment, the main surface of the single crystal silicon substrate 30 and the single crystal silicon substrate 32 on which the SiO 2 film (insulating film) 33 is formed are bonded via the SiO 2 film 33 (first Step), the back side of the single crystal silicon substrate 30 is polished by a predetermined amount to make the single crystal silicon substrate 30 thinner (second step). Then, a trench (groove) 35 having a predetermined depth for forming the cantilever 13 is formed on the back surface of the single-crystal silicon substrate 30 (third step), and a polysilicon film 37 is formed on the back surface of the single-crystal silicon substrate 30. Is formed to fill the trench 35 with the polysilicon film 37 and smooth the surface of the polysilicon film 37 (fourth step). Further, after forming a signal processing circuit on the single-crystal silicon substrate 30, the cantilever 13 was formed by etching away the polysilicon film 37 from the back surface side of the single-crystal silicon substrate 30 (fifth step).

Therefore, in the process of forming the signal processing circuit 10 during the wafer process, the polysilicon film 3
7, the trench 35 is buried in the upper surface portion of the single crystal silicon substrate 30, so that contamination of the IC element, contamination of the manufacturing apparatus, and defective or deteriorated electrical characteristics can be prevented. In other words, the wafer process is a heat treatment during the process,
Prevents surface structures such as depressions and through-holes from appearing on the wafer surface during photolithography and other processes, thereby preventing contamination and stabilizing the wafer process and stably supplying high-precision acceleration sensors. can do.

(Fourth Embodiment) Next, a fourth embodiment will be described focusing on differences from the third embodiment.

This embodiment is for manufacturing a sensor at lower cost than the third embodiment. FIG. 29-
FIG. 31 shows a manufacturing process.

As shown in FIG. 29, a 0.1 to 2 μm SiO 2 film 41 is formed on the main surface of a single crystal silicon substrate 40, and a single crystal silicon substrate 42 is joined with the SiO 2 film 41 interposed therebetween. Then, as shown in FIG. 30, the upper surface of the single crystal silicon substrate 42 is polished so that the single crystal silicon substrate 42 has a predetermined thickness. That is, the thickness of the single crystal silicon substrate 42 is reduced to, for example, about 3 μm. Thereafter, a high concentration n @ + diffusion layer 43 is formed on the upper surface of the single crystal silicon substrate 42, and a SiO2 film 44 is further formed thereon.

Subsequently, as shown in FIG. 31, a trench 45 is formed in the single-crystal silicon substrate 42, and the SiO2 film 41 below the trench 45 is partially etched away with a hydrofluoric acid solution. At this time, the SiO2 film 41 below the portion to be the cantilever 13 is completely removed.

The subsequent processing is the same as in FIGS. Next, application examples of the fourth embodiment will be described with reference to FIGS.
4 will be described. As shown in FIG. 32, a 0.1-2 .mu.m SiO2 film 4 is formed on the main surface of a single crystal silicon substrate 40. As shown in FIG.
1 and a concave portion 47 having a depth of 0.1 to 3 μm is formed in a predetermined region on the main surface of the single crystal silicon substrate 42. Then, the main surface of the single crystal silicon substrate 42 is joined with the SiO2 film 41 interposed therebetween. Further, as shown in FIG. 33, the upper surface of the single crystal silicon substrate 42 is polished to make the single crystal silicon substrate 42 have a predetermined thickness. That is, the thickness of the single crystal silicon substrate 42 is reduced to, for example, about 3 μm. Thereafter, a high-concentration n @ + diffusion layer 43 is formed on the upper surface of the single crystal silicon substrate 42, and a SiO2
A film 44 is formed.

Subsequently, as shown in FIG. 34, a trench 45 reaching the concave portion 47 is formed in the single crystal silicon substrate 42, and the cantilever 13 is formed. The subsequent processing is shown in FIG.
28 to FIG.

By doing so, electrical insulation can be more reliably achieved as compared with the case where the SiO2 film 41 is partially etched away as shown in FIG.

The present invention is not limited to the above embodiments, and is applicable to, for example, a double-supported beam structure and a multi-supported beam structure in addition to the cantilever structure. or,
As shown in FIG. 35, the single crystal silicon
Acceleration sensors 13a and 13b are formed, the X direction is set by the acceleration sensor 13a, and the Y direction is set by the acceleration sensor 13b.
The acceleration in the direction may be detected. Furthermore, an acceleration sensor capable of detecting acceleration in the direction perpendicular to the surface of the X and Y direction acceleration sensors 13a and 13b may be formed on the same substrate to detect three-dimensional acceleration. Further, when the present acceleration sensor is used as a capacitive type, the characteristics can be further stabilized by using a so-called servo type (closed loop circuit configuration).

In each of the above embodiments, the polysilicon film 6,
Although the trenches (grooves) 3, 23, and 35 are filled with 26 and 37, a polycrystalline or non-crystalline silicon film or a mixed silicon film may be used. That is, a silicon film in which polysilicon or amorphous silicon or a mixture of polysilicon and amorphous silicon may be used.

[Brief description of the drawings]

FIG. 1 is a plan view of an acceleration sensor.

FIG. 2 is a diagram showing a cross section taken along line AA of FIG. 1;

FIG. 3 is a view showing a manufacturing process of the first embodiment.

FIG. 4 is a view showing a manufacturing process.

FIG. 5 is a diagram showing a manufacturing process.

FIG. 6 is a diagram showing a manufacturing process.

FIG. 7 is a diagram showing a manufacturing process.

FIG. 8 is a diagram showing a manufacturing process.

FIG. 9 is a diagram showing a manufacturing process.

FIG. 10 is a view showing a manufacturing process.

FIG. 11 is a plan view showing an application example of the first embodiment.

FIG. 12 is a view showing a BB cross section of FIG. 11;

FIG. 13 is a view showing a manufacturing process of the second embodiment.

FIG. 14 is a diagram showing a manufacturing process.

FIG. 15 is a diagram showing a manufacturing process.

FIG. 16 is a diagram showing a manufacturing process.

FIG. 17 is a diagram showing a manufacturing process.

FIG. 18 is a diagram showing a manufacturing process.

FIG. 19 is a diagram showing a manufacturing process.

FIG. 20 is a diagram showing a manufacturing process.

FIG. 21 is a diagram showing a manufacturing process.

FIG. 22 is a diagram showing a manufacturing process of the third embodiment.

FIG. 23 is a diagram showing a manufacturing process.

FIG. 24 is a diagram showing a manufacturing process.

FIG. 25 is a diagram showing a manufacturing process.

FIG. 26 is a diagram showing a manufacturing process.

FIG. 27 is a diagram showing a manufacturing process.

FIG. 28 is a diagram showing a manufacturing process.

FIG. 29 is a diagram showing a manufacturing process of the fourth embodiment.

FIG. 30 is a diagram showing a manufacturing process.

FIG. 31 is a view showing a manufacturing process.

FIG. 32 is a diagram showing a manufacturing process of an application example of the fourth embodiment. .

FIG. 33 is a view showing a manufacturing process.

FIG. 34 is a view showing a manufacturing process.

FIG. 35 is a plan view of another example of an acceleration sensor.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Single crystal silicon substrate 2 SiO2 film 3 Trench 5 SiO2 film 6 Polysilicon film 7 p + diffusion layer 8 Single crystal silicon substrate 9 SiO2 film 13 Cantilever

Claims (7)

[Claims] 1. A semiconductor layer (1) formed on a first substrate (8), and a movable part (13) formed on the semiconductor layer and moving by the action of acceleration. A semiconductor dynamic quantity sensor that generates a signal accompanying movement, wherein at least one of a surface of the movable portion and the semiconductor layer facing the movable portion is covered with an insulator (5). Semiconductor dynamic quantity sensor. 2. The semiconductor physical quantity sensor according to claim 1, wherein the insulator is a dielectric. 3. The semiconductor physical quantity sensor according to claim 1, wherein the insulator is an oxide film. 4. The semiconductor physical quantity sensor according to claim 1, wherein said semiconductor layer is formed of single crystal silicon. 5. The semiconductor dynamic quantity sensor according to claim 1, wherein a polysilicon layer is formed between the semiconductor layer facing the movable portion and the first substrate. 6. The semiconductor dynamic quantity sensor according to claim 1, wherein an n + region (4) serving as an electrode is formed in the movable portion. 7. The movable portion includes a movable beam portion (13), and a thickness (L1) of the beam portion in a thickness direction of the semiconductor layer is equal to a thickness of the beam portion in a plane direction of the semiconductor layer. Width (L
The semiconductor dynamic quantity sensor according to any one of claims 1 to 6, wherein the sensor is larger than 2).