JPH11340873A - Peak detection circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To detect a peak position, without being interrupted by multi-path or inter-code interface by averaging signals sampled with frequencies which are plural times as high as a chip rate by adding them a fixed number of times, and detecting the maximum value from the output signals. SOLUTION: An A/D converter 1 samples an input pulse with frequencies, which are four times as high as a chip rate and converts it into a digital signal pulse, and sends it to a register R1. The sampled pulses are successively transmitted to registers 1-4, and continuous four sampling data are stored. An adder S by adding the registers 1-4 for operating an averaging processing averages data. The averaged data are successively transmitted to registers A-C, and continuous three averaged data are stored. Comparators C1-C3 compare the value of the register B with the values of both adjacent registers A and C. and in any case when the value of the register B is larger, this is decided as a peak.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a peak detection circuit used in a pulse position modulation receiver, for example, in indoor wireless communication, wireless LAN, and wireless high-speed data communication.

[0002]

2. Description of the Related Art In a "spread spectrum pulse position modulation communication system, spread spectrum pulse position modulation transmitter and spread spectrum pulse position receiver" disclosed in Japanese Patent Application Laid-Open No. 9-321660, continuous output of a digital matched filter is disclosed. Are compared, and when the middle data becomes maximum, peak position detection for detecting a peak is performed.

[0003]

In the pulse position modulation system, the delay of the pulse position from the reference position is used as information, and the reference position must be accurately reproduced on the receiving side. However, when using this method, the received waveform is disturbed due to the effects of intersymbol interference when multiplexing and multipath when radio is used, and it is difficult to detect a peak, and accurate decoding cannot be performed. There is a problem. This point will be described with reference to FIG. 4 showing a conventional peak detection result. Now, if the waveform shown in FIG. 4A is input to the peak detection circuit, the conventional maximum value detection circuit detects two peaks P ₁ and P ₂ (FIG. 4B). This is a fatal error in the pulse position modulation method having information in the time axis direction. Therefore, the present invention provides an integrator (integrating circuit) for performing an averaging process in the preceding stage of the maximum value detecting circuit, thereby providing a peak detecting circuit capable of detecting a peak even when a pulse waveform is disturbed. It is intended to provide.

[0004]

The invention according to claim 1 is
A peak detection means provided in the pulse position modulation receiver for detecting each pulse position from the received pulse train, a sampling circuit for sampling the input pulse signal at a frequency n times the chip rate (n ≧ 2); A peak detection circuit including an averaging circuit that adds and averages the obtained signals a predetermined number of times, for example, about n times, and a maximum value detection circuit that detects the maximum value from the output signal of the averaging circuit.

According to a second aspect of the present invention, there is provided a peak detecting circuit according to the first aspect, wherein the peak detecting circuit is provided in a spread spectrum pulse position modulation receiver, is connected to an output of a matched filter, and determines the output peak position. This is a peak detection circuit for detecting.

According to a third aspect of the present invention, there is provided the peak detecting circuit according to the first aspect, wherein the averaging processing circuit for averaging the input signal sequence has a plurality of stages.

[0007]

FIG. 5 shows an example of a conventional peak detection circuit. In this peak detection circuit, the input pulse is converted into a digital signal by an A / D converter (not shown). An output signal from the A / D converter is sequentially transferred to a register A, a register B, and a register C, and three consecutive sampling data are stored. Comparators C _1, C ₂ the value of both sides of the register A in the register B, compared to the respective registers C, further comparator C ₃ by the value of the threshold ref register B. By comparing the result with the AND circuit 2, the peak detection signal is output when the value of B is larger in all of them.

The configuration and operation of the peak detection circuit according to the present invention will be described with reference to FIG. The peak detecting circuit according to the first aspect of the present invention is obtained by adding an averaging circuit for performing an averaging process to a maximum value detecting circuit (corresponding to the conventional peak detecting circuit).
A sampling circuit that samples at twice (n ≧ 2) frequency, an averaging circuit that adds and averages the sampled signals a predetermined number of times, for example, about n times, and a maximum value from the output signal of the averaging circuit. A maximum value circuit for detection is provided.

In the figure, 1 is an A / D converter, R is a register,
S is an adder for calculating an average value of the registers 1 to 4 and constitutes an averaging circuit SM together with the registers. The configuration other than the averaging circuit SM is the same as that of the above-described conventional peak detection circuit. In the peak detection circuit, the input pulse is converted into a digital signal by the A / D converter 1. At this time, a pulse sampled at a frequency four times the chip rate, for example,
The data is sequentially transferred from the register 1 to the register 4. The register R ₁ (registers 1 to 4) stores four continuous sampling data, adds and averages them, performs an averaging process, and outputs the result to the maximum value detection circuit at the next stage.

The invention according to claim 2 is a peak detection circuit applied to a spread spectrum pulse position modulation communication system receiver. An overview of a spread spectrum pulse position modulation communication system using the present invention will be described with reference to FIG.
In a spread spectrum pulse position modulation type transmitter,
The transmission data is pulse-position-modulated by the pulse position modulator 10, and the PN signal generator 11 generates a pseudo-noise sequence (PN signal) using the signal as a trigger. Then, it is frequency-modulated to a radio frequency and transmitted to a receiver. In the receiver, after the frequency is converted to the baseband, the pseudo-noise sequence used in the transmitter is passed through the matched filter 12 coded to perform despreading. If no noise is mixed in the received signal waveform, the output of the matched filter 12 becomes a pulse position modulation signal. However, as described above, when a phenomenon occurs in which a signal waveform includes a plurality of peaks due to the influence of multipath, intersymbol interference, and the like, an error occurs. Therefore, the matched filter 12
Is passed through a peak detection circuit of the present invention, that is, a maximum value detection circuit 14 having an averaging processing circuit (integrating circuit) 13 for performing averaging processing, so that the PPN demodulator 15 has a stable pulse position modulation signal. Can be reproduced.

According to a third aspect of the present invention, when the disturbance of the signal waveform cannot be reduced by one averaging process, the averaging process is further performed. This corresponds to a case where a plurality of multipaths work in a complicated manner. 2 in FIG.
An example in which averaging of stages is performed will be described. After the input pulses is converted into a digital signal by the A / D converter 1, in the register R ₁ (register 1-4) and the adder averaging circuit SM ₁ consists of S ₁ performs first averaging further, in the averaging process circuit SM ₂ constituted by an adder S ₂ whose output is a register R ₂ (register 5-8), 2
The averaging process of the stage is performed, and the result is output to the next-stage maximum value detector, and the peak is detected.

[0012]

According to the first aspect of the present invention, in the pulse position modulation method, even when a plurality of peaks occur due to multipath, intersymbol interference or the like in a received waveform, the peak position can be detected with a simple circuit configuration. Becomes possible. According to the second aspect of the present invention, in the spread spectrum pulse position modulation communication system receiver, the peak position of the matched pulse can be accurately detected with a simple circuit configuration. Advantageous Effect According to Claim 3: Even if the pulse waveforms overlap in a complicated manner, the peak can be detected with a simple circuit configuration.

[Brief description of the drawings]

FIG. 1 is a block diagram of a peak detection circuit to which an averaging circuit according to the present invention is added.

FIG. 2 is a schematic diagram of a spread spectrum pulse modulation communication system using the peak detection circuit of the present invention.

FIG. 3 is a block diagram of a peak detection circuit including a two-stage averaging circuit according to the present invention.

FIG. 4 is a diagram for explaining a peak detection result by a conventional peak detector.

FIG. 5 is a block diagram showing a conventional peak detector.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... A / D converter, 2 ... AND circuit, 10 ... PPM modulator, 11 ... PN signal generator, 12 ... Matched filter
13: integration circuit (averaging processing circuit), 14: maximum value (peak) detection circuit, 15: PPM demodulator, C: comparator, S
... Adder, SM ... Averaging circuit, R ... Register.

Claims (3)

[Claims] 1. A peak detecting means provided in a pulse position modulation receiver for detecting each pulse position from a received pulse train, in which an input pulse signal is sampled at a frequency n times the chip rate (n ≧ 2). A peak detection circuit comprising: a circuit; an averaging processing circuit for adding and averaging the sampled signals a predetermined number of times; and a maximum value detection circuit for detecting a maximum value from an output signal of the averaging processing circuit. . 2. A spread spectrum pulse position modulation receiver, which is connected to an output of a matched filter and detects an output peak position.
2. A peak detection circuit according to claim 1. 3. The peak detection circuit according to claim 1, wherein the averaging processing circuit for averaging the input signal sequence has a plurality of stages.