JPH11332275A - Pwm driven control circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a PWM drive control circuit in which spike current can be suppressed surely upon turning a plurality of output circuits on. SOLUTION: The PWM drive control circuit comprises output circuits 101, 201 being connected with respective inductance loads, an oscillation circuit 401 generating a comparison wave varying at a specified period, and comparators CP12, CP22 for comparing a comparison wave generated from the oscillation circuit 401 with a reference value to turn the output circuits 101, 201 on, wherein the moments of turning the output circuits 101, 201 on are shifted from each other by differentiating the reference values of the output circuits 101, 201.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control circuit for PWM driving an inductance load such as a motor.

[0002]

2. Description of the Related Art FIG. 9 shows a configuration of a conventional circuit, and FIG. 10 shows a timing chart of the conventional circuit. With the conventional circuit,
The description of the operation when the output current of the motor is turned on is given below. First, a triangular wave (FR) shown in FIG.
EF). The maximum voltage of the triangular wave is VR2, and the minimum voltage is VR1.

Next, the voltage of the triangular wave (FREF) and VTH
The reference voltage of 1 is compared by CP12. At this time, when the reference voltage VTH1 is set to VR1 + ΔVR1, the output of the comparator CP12 is as shown in FIG. 10, and an inverted signal of this output is input to the S (set) terminals of the flip-flops FF11 and FF21, and the flip-flops FF11 and FF2
1 is "Hi".

The Q of the flip-flops FF11 and FF21
When the output becomes “Hi”, the output circuits 101 and 201 are output.
Is turned on, and the output current of the motor increases at the timing of t1. The terminals IN11 and IN21 are input terminals for switching the direction of the output current of the motor, but their description is omitted because they are not directly related to the present invention.

Next, an explanation will be given of the operation in which the motor output current is turned off. According to the above description, the output circuit 10
When 1,201 turn on at the timing of t1, the motor output current increases with time. Output circuits 101 and 102
Is converted into a voltage by the current detection resistors RS1 and RS2, and the voltage of the current detection resistors RS1 and RS2 eventually becomes higher than the control voltages CTL1 and CTL2. This voltage is compared by comparators CP11 and CP21,
By outputting the outputs through the AND gates to the R (reset) terminals of the flip-flops FF11 and FF21, the Q outputs of the flip-flops FF11 and FF21 become L, the output circuits 101 and 201 are turned off, and the output current gradually decreases. To decrease.

The role of the AND gate which receives the comparators CP11 and CP12 and the comparators CP21 and CP12 as inputs is that when the output circuits 101 and 201 are turned on at the timing of t1, a short time (number) from t1 is reached. 100n
s to several μS), the capacity component of the motor, the output circuit 101,
Under the influence of the reverse recovery current of the flywheel diode in 201, a steep spike current is generated in the current detection resistors RS1 and RS2, and the voltage of the current detection resistors RS1 and RS2 becomes equal to or higher than the control voltages CTL1 and CTL2.

Since the spike current does not become the rotational torque of the motor, the output must not be turned off by this current. Comparators CP11 and CP12 and comparator C
Flip-flop FF by AND logic of P21 and CP12
11, by setting the R (reset) input of the FF 21 to “Low”, malfunction of the current detection circuit due to spike current is prevented. The time during which the malfunction of the current detection circuit is prevented is the mask time Tmask1 during which the comparator CP12 outputs “Low”.

However, even if the original motor output current, not the spike current, flows within the mask time Tmask1,
The flip-flops FF11 and FF21 are not reset, and the output circuit is not turned off (that is, the mask time Tmask
Since the output is always turned on within 1), the mask time T
The mask1 is preferably as short as possible within a range in which a malfunction of the current detection circuit due to the spike current does not occur.

As described above, the maximum voltage of the current detection resistors RS1 and RS2 is controlled to the control voltages CTL1 and CTL2 by the PWM operation in which the output circuits 102 and 201 repeat the ON / OFF state, and the predetermined current is supplied to the motor. Flows.

[0010]

Next, problems of the conventional PWM drive control circuit will be described. As a first problem, since the timings of the S (set) signals of the flip-flops FF11 and FF21 are simultaneously generated by the output of the comparator CP12, the two output circuits 101 and 201 are turned on at the same time. Spike currents flow simultaneously in the drive circuit. The spike current may be steep and have a current value two to three times as large as the normal control current. When the two spike currents flow simultaneously, the VCC power supply line and the GND line are displaced, causing noise. In addition, there is a problem that the current capacity of the wiring of VCC, GND and the motor output is exceeded.

As a second problem, since the mask time Tmask1 for preventing the malfunction of the current detection circuit caused by the above-mentioned spike current is made from the output of the comparator CP12, the output circuits 101 and 201 are used. At the same time.
In the case of the two-phase stepping motor shown in FIG. 9, the output circuits 101 and 201 and the coils of the motor connected thereto have the same characteristics, and even if the mask times Tmask1 of the output circuits 101 and 201 are the same. No problem.

However, when a DC motor or the like having different motor characteristics is connected to the output circuits 101 and 201, the time during which the spike current flows differs depending on the motor. If the mask time is set in accordance with the output circuit in which the spike current is generated for a long period, the mask time is longer than the optimum value in the output circuit in which the spike current is generated for a short period. Cannot be performed, and PWM control of a small current value cannot be performed. Conversely, if the mask time is set in accordance with the output circuit in which the spike current occurs for a short period, the spike current will flow even after the mask time has passed in the output circuit in which the spike current occurs for a long period, which will cause malfunction of the current detection circuit. There is a problem of getting up.

As a third problem, the mask time of the conventional circuit is constant even if the output current flowing through the output circuits 101 and 201 changes. As the output current increases, the reverse recovery current of the flywheel diode, which is one of the causes of the spike current, also increases. That is, if the mask time is set assuming the state in which the spike current flows for the longest time, there is a problem that the PWM on time cannot be made shorter than the PWM on time, and a small current value cannot be PWM controlled. The above is the problem of the prior art.

The present invention is intended to solve the problems of the conventional circuit by shifting the ON points of a plurality of output circuits.

[0015]

Means for Solving the Problems PWM according to the first invention
In the drive control circuit, a plurality of output circuits respectively connected to the inductance load, an oscillation circuit that generates a comparison wave that fluctuates at a predetermined cycle, and a plurality of output circuits for controlling the plurality of output circuits, respectively. A plurality of comparators provided for comparing a comparison wave generated by the oscillation circuit with a reference value and turning on the output circuit, wherein the reference values of the plurality of comparators are different from each other. The on time of the plurality of output circuits is shifted.

In a PWM drive control circuit according to a second aspect of the present invention, a plurality of output circuits each connected to an inductance load, an oscillation circuit for generating a comparison wave that fluctuates at a predetermined cycle, and a control circuit for controlling the plurality of output circuits A plurality of comparators respectively provided in the plurality of output circuits and comparing a comparison wave generated by the oscillation circuit with a reference value to turn on the output circuit, and detecting a current of the output circuit. A current detection circuit for turning off the output circuit in accordance with the detection operation, wherein the reference values of the plurality of comparators are different from each other, and an output signal of the comparator is used for a predetermined time. During this time, the operation of the current detection circuit is prevented.

In the PWM drive control circuit according to a third aspect of the present invention, the predetermined time for preventing the operation of the current detection circuit is changed according to the output current of the output circuit.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. 1 is a block diagram of a PWM drive control circuit according to the present invention, and FIG. 2 is a timing chart thereof. In FIG.
01 is an output circuit. Each of the output circuits 101 and 201 includes a control element including a plurality of transistors, a plurality of logic circuits Logic for controlling the control elements, and a flywheel diode connected in parallel with the transistor element. It is connected to each phase coil of the phase stepping motor MOTOR1. IN11 and IN21 are motor MOTO
This is an input terminal for switching the direction of the output current of R1. 1
02 and 202 are comparison circuits, CP11, CP21 and C
P12 and CP22 are comparators, A1 and A2 are AND circuits,
FF11, FF21 are flip-flops, RS1, RS
2 is a current detection resistor, and 401 is an oscillation circuit. The comparison circuit 202 relates to the function added this time, and the other configuration is the same as that of the related art.

Next, the operation will be described. The first problem of the prior art, "Flip-flop FF11, F
The timing of the S (set) signal of F21 is determined by the comparator CP.
Since two outputs are made at the same time, two output circuits 1
01 and 201 are simultaneously turned on, and the above-described spike current flows simultaneously to the drive circuit. The spike current may be a steep and two to three times the current value of the normal control current. When the two spike currents flow simultaneously, the VCC power supply line and the GND line are distorted,
It causes noise. In addition, there is a problem that the current capacity of the wiring of the VCC, GND and motor output is exceeded. ”In order to solve the problem, the voltage value of the triangular wave (FREF) as the comparison wave fluctuating at a predetermined cycle and the voltage value of the reference voltage VTH1 Is compared by the comparator CP12, and the output of the comparator CP12 turns on the output of the output circuit 101. The voltage value of the triangular wave (FREF) and the voltage value of the reference voltage VTH2 are compared with the comparator CP22.
And the other output circuit 201 is turned on by the output.

As a result, as shown in the timing chart of FIG. 2, the timing at which the output circuits 101 and 201 are turned on can be accurately shifted by a half cycle of the triangular wave.
Fluctuations in the VCC power supply line and the GND line and generation of noise due to the simultaneous spike currents of the two output circuits can be reduced.

FIG. 3 shows a specific circuit of the oscillation circuit 401. In FIG. 3, Q41, Q42 and Q43 are PMOS transistors, and Q44, Q45, Q46 and Q47 are NMOS transistors. CP4 is a comparator, C4 is a capacitor, R41,
R42 and R43 are resistors. This is the same as the conventional circuit. FIG. 4 is a timing chart of the oscillation circuit of FIG.

FIG. 5 is a specific circuit of the comparison circuits 102 and 202 of FIG. In FIG. 5, Q57 and Q67 are NMO
S transistors, CP12 and CP22 are comparators, R41,
R51, R52 + R522, R53, R62, R63 + R633 are resistors.

The maximum value VR2 and minimum value VR1 of the triangular wave (FREF) output from the oscillation circuit 401 shown in FIG. 3 can be expressed by the following equations. VR2 = VP × (R41 + R42) / (R41 + R42 + R43) (1) VR1 = VP × R42 / (R42 + R43) (2) In the equation (2), FIG. Is assumed to be 0 for simplification of calculation.

As described above, since the voltages of VR2 and VR1 are determined, the reference voltages VTH2 and VTH1 inputted to the comparators CP12 and CP22 can be easily designed by the following equations. VTH2 = VP × (R61 + R62) / (R61 + R62 + R63 + R633) (3) VTH1 = VP × (R52 + R522) / (R52 + R522 + R53) (4) In the equation (4), the ON resistance of Q57 shown in FIG. Is assumed to be 0 for simplification of.

In the above equations (1) to (4), R41 = R51 =
R61, R42 = R52 + R62, R43 = R53 + R63, R52
2. By adjusting R633, the reference voltages VTH2, VTH
1 can be easily obtained. In the embodiment shown in FIG. 1, the output circuit 1 is a second problem of the conventional circuit.
The problem that the mask times Tmask1 and Tmask2 of 01 and 201 cannot be set individually can also be solved.

The mask time of the output circuit 101 is defined as Tmask1,
Assuming that the mask time of the output circuit 201 is Tmask2, the mask times Tmask1, Tmask2 and the reference voltages VTH1, VT
The relationship with H2 is as follows. Tmask1 = {C4 × (VTH1-VR1) / IBIAS} × 2 (5) Tmask2 = {C4 × (VR2-VTH2) / IBIAS} × 2 (6) That is, the reference voltages VTH1 and VTH2 are By setting, the mask times Tmask1 and Tmask2 can be individually set. As a result, two types of DC motors having different spike current characteristics in the output circuits 101 and 201 can be used.
The mask time can be set according to the spike current characteristics of each motor.

Embodiment 2 FIG. In the second embodiment, the configurations of the comparison circuits 102 and 202 in the first embodiment are changed to be comparison circuits 103 and 303, respectively. FIG. 6 is a block diagram and FIG. 7 is a timing chart. FIG. 8 is a specific circuit of the comparison circuits 103 and 303 in FIG.
FIG. 6 shows an embodiment in which the output circuits 101 and 201 drive the two-phase stepping motor by PWM, and the output circuit 301 drives the three-phase brushless motor by PWM.

The operation of the second embodiment other than 103 and 303 is the same as that of the first embodiment, and the comparator CP11
Outputs the mask time Tmask1 and the output circuit 101,
201 is turned on, and the comparator CP32
Determines the mask time Tmask3 and the timing at which the output circuit 303 is turned on by the operation of the AND circuit A3. The feature of the second embodiment is that the mask time Tmask
1, Tmask3 is changed in proportion to the output current.

Next, the operation of the second embodiment will be described. As shown in the comparison circuit 103 of FIG.
By flowing a current (I103) proportional to the voltage CTL1 for controlling the output current into the portion of the reference voltage VTH1 of the comparison circuit 102 (see FIG. 5), the voltage value of the reference voltage VTH1 is proportional to the control voltage CTL1. Rise. Conversely, as shown in the comparison circuit 303, the output current is extracted from the VTH2 voltage portion of the comparison circuit 202 (see FIG. 5) of the first embodiment to obtain a reference voltage VT by extracting a current I303 proportional to the control voltage CTL3.
The voltage value of H2 decreases in proportion to the voltage value of control voltage CTL3.

That is, the mask time Tmask1 of the output circuits 101 and 201 and the mask time Tmask3 of the output circuit 301
When the output current is controlled in a small current region, the output current is shortened in proportion to the control voltage. On the contrary, when the output current is controlled in a large current region, the output current is increased in proportion to the control voltage. The problem was that "if the mask time is set assuming the state in which the spike current value flows for the longest time, the PWM on time cannot be reduced to the mask time or less, and the small current value cannot be PWM controlled." The problem can be solved, and the range of the output current controlled by the PWM drive can be widened.

[0031]

According to the first aspect, the spike currents flowing through the plurality of output circuits during PWM driving do not overlap with each other, so that the current density of the substrate wiring and the like can be reduced to a fraction of the conventional value. And the noise generated by the spike current can be reduced to a fraction.

According to the second aspect, the operation of the voltage detection circuit is prevented by the output signal of the comparator for shifting the ON points of the plurality of output circuits, so that the malfunction of the voltage detection circuit is ensured. There is an effect that can be prevented.

According to the third aspect, the preset mask time is changed in accordance with the output current so that the current detection circuit does not malfunction due to the spike current, so that the output current can be controlled in a wide range. is there.

[Brief description of the drawings]

FIG. 1 is a block diagram of a PWM drive control circuit according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a timing chart of the PWM drive control circuit according to the first embodiment of the present invention.

FIG. 3 is a detailed diagram of an oscillation circuit used in the PWM drive control circuit according to the first embodiment of the present invention.

FIG. 4 is a diagram showing a timing chart of an oscillation circuit used in the PWM drive control circuit according to the first embodiment of the present invention.

FIG. 5 is a detailed diagram of a reference voltage of a comparator used in the PWM drive control circuit according to the first embodiment of the present invention.

FIG. 6 is a block diagram of a PWM drive control circuit according to a second embodiment of the present invention.

FIG. 7 is a diagram showing a timing chart of a PWM drive control circuit according to a second embodiment of the present invention.

FIG. 8 is a detailed diagram of a reference voltage of a comparator used in the PWM drive control circuit according to the second embodiment of the present invention.

FIG. 9 is a block diagram of a PWM drive control circuit according to the related art.

FIG. 10 is a diagram showing a timing chart of a PWM drive control circuit according to the related art.

[Explanation of symbols]

101, 201 output circuit, 102, 202, 103,
303 comparison circuit, CP11, CP12, CP21, C
P22, CP31, CP32 Comparator, A1, A2, A
3 AND circuit, FF11, FF21, FF31 flip-flop, RS1, RS2, RS3 current detection resistor, 401 oscillation circuit.

Claims (3)

[Claims] 1. A plurality of output circuits respectively connected to an inductance load, an oscillation circuit for generating a comparison wave that fluctuates at a predetermined cycle, and a plurality of output circuits respectively provided for controlling the plurality of output circuits. A plurality of comparators for comparing a comparison wave generated by the oscillation circuit with a reference value and turning on the output circuit, and making the reference values of the plurality of comparators different from each other. A PWM drive control circuit characterized in that the on points of the plurality of output circuits are shifted. 2. A plurality of output circuits respectively connected to an inductance load, an oscillation circuit for generating a comparison wave that fluctuates at a predetermined cycle, and a plurality of output circuits respectively provided for controlling the plurality of output circuits. A plurality of comparators for comparing a comparison wave generated by the oscillation circuit with a reference value to turn on the output circuit; and detecting a current of the output circuit and turning off the output circuit in accordance with the detection operation. A current detection circuit for changing the reference value of each of the plurality of comparators to be different from each other, and preventing the operation of the current detection circuit for a predetermined time by an output signal of the comparator. PW characterized in that:
M drive control circuit. 3. The PWM according to claim 2, wherein a predetermined time for preventing the operation of the current detection circuit is changed according to an output current of the output circuit.
Drive control circuit.