JPH11329968A - Semiconductor substrate and manufacture of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an SIMOX wafer with high quality having an Si active layer without any defect due to a CZ bulk Si wafer and a method for manufacturing this. SOLUTION: This semiconductor substrate is formed by a manufacturing process comprising a process for preparing an Si single crystal substrate 11, and forming an epitaxial Si layer 12 without introducing any new defect on the main surface, process for injecting oxygen ion from the main surface of the substrate, and process for operating the heat treatment of the substrate, and forming a Si oxide layer inside in a state that at least one part of the epitaxial layer is left on the surface side.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor substrate and a method for manufacturing a semiconductor substrate. More specifically, a method for producing a single crystal semiconductor on an insulator, a method for producing a single crystal semiconductor on an insulator, a semiconductor substrate suitable for an integrated circuit, a semiconductor substrate suitable for an integrated circuit and a method for producing a semiconductor substrate It is about.

[0002]

2. Description of the Related Art [General SOI] Single crystal Si on insulator
The formation of a semiconductor layer is widely known as a silicon-on-insulator (SOI) technology, and is often performed because a device using the SOI technology has many advantages that cannot be attained by a bulk Si substrate for fabricating a normal Si integrated circuit. Research has been done. That is, by using the SOI technology, 1. Dielectric separation is easy and high integration is possible. 2. Excellent radiation resistance. 3. Higher speed due to reduced stray capacitance. 4. Well step can be omitted; 5. Latch-up can be prevented. It is possible to obtain a fully-depleted field-effect transistor by thinning the film. These are described in detail in the following documents, for example. SpecialIssue: "Single-c
rystal silicon on non-sin
gle-crystal insulators "; e
Ditted by G. W. Cullen, Journal
al of Crystal Growth, volu
me 63, no 3, pp 429-590 (198
3).

[0003] Furthermore, in recent years, SOI has
Many reports have been made as substrates for realizing high speed and low power consumption of OSFETs (IEEE SOI co.
nference 1994).

In addition, when the SOI structure is used, since an insulating layer is provided below the device, the device isolation process can be simplified as compared with the case where the device is formed on a bulk Si wafer, and the device process is shortened. You. In other words, MOSFETs and ICs on bulk Si
Compared with, it is expected that the total cost of the wafer cost and the process cost will be reduced.

[0005] Above all, a fully depleted MOSFET is expected to achieve higher speed and lower power consumption by improving the driving force. The threshold voltage (Vth) of a MOSFET is generally determined by the impurity concentration of a channel portion, but is completely depleted (FD) using SOI.
d) In the case of MOSFET, the thickness of the depletion layer is also affected by the thickness of the SOI. Therefore, in order to produce a large-scale integrated circuit with good yield, uniformity of the SOI film thickness has been strongly desired.

[0006] Devices on a compound semiconductor are Si
It has high performance that cannot be obtained with, for example, high speed and light emission. Currently, these devices are mostly Ga
It is made by epitaxial growth on a compound semiconductor substrate such as As. However, compound semiconductor substrates have problems such as being expensive, having low mechanical strength, and making it difficult to manufacture large-area wafers.

For these reasons, attempts have been made to heteroepitaxially grow compound semiconductors on Si wafers, which are inexpensive, have high mechanical strength, and can be used to produce large-area wafers.

Research on the formation of SOI substrates was conducted in 1970.
It has been active since the age of. A method of heteroepitaxially growing single crystal Si on a sapphire substrate which is an insulator (SOS: Sapphire on Silicon)
Or a method of forming an SOI structure by dielectric isolation by oxidation of porous Si (FIPOS: Fully Iso
ation by Porous Oxidized
Silicon, the bonding method, and the oxygen ion implantation method are well studied.

[FIPOS] The FIPOS method uses P-type Si.
Proton ion implantation of an N-type Si layer on the surface of a single crystal substrate (Imai et al., J. Crystal Growth, vol.
63, 547 (1983)) or an island is formed by epitaxial growth and patterning, and only the P-type Si substrate is made porous by anodization in an HF solution so as to surround the Si island from the surface, and then the speed is increased. This is a method of separating an N-type Si island from a dielectric substance by oxidation. In this method, the separated Si region is determined before the device process, and there is a problem that the degree of freedom in device design may be limited.

[Bonding] In addition to the conventional SOI forming method as described above, in recent years, a Si single crystal substrate has been bonded to another thermally oxidized Si single crystal substrate using heat treatment or an adhesive. Attention has been focused on a method of forming an SOI structure. This method requires that the active layer for the device be uniformly thinned. That is, it is necessary to reduce the thickness of a Si single crystal substrate having a thickness of several hundreds of μm to the order of μm or less.

[SIMOX] The oxygen ion implantation method is disclosed in
This is a method called SIMOX first reported by Izumi. 10 ¹⁷ to 1 oxygen ions on Si wafer
After implanting about 0 ¹⁸ / cm ² , annealing is performed at a high temperature of about 1320 ° C. in an argon / oxygen atmosphere. as a result,
Oxygen ions implanted around the depth corresponding to the projection range (R _p ) of the ion implantation are combined with Si to form a Si oxide layer, thereby obtaining an SOI structure.

[0012]

In SIMOX, an insulating layer is formed immediately below the surface of a bulk wafer. However, a flow pattern defect (FPD: Flow Pattern D) is formed on a normal bulk Si wafer (CZ wafer).
effect) (T. Abe, ExtendedAbs
t. Electrochem. Soc. Spring
Meetng vol. 95-1 pp. 596, (M
ay, 1995)) and COP (Crystal Ori).
Ginated Particles) (Hidekazu Yamamoto,
"Requirements for Large Diameter Silicon Wafers", 23rd Ultra Clean Technology College, (Aug. 199
6)) and other defects peculiar thereto. That is, in the above-described method, a semiconductor material film having these defects therein is completed, and there is a problem that the yield at the time of manufacturing a device is reduced. Therefore, SIMOX free from defects caused by CZ bulk wafers
It is necessary to form a wafer.

JP-A-8-191140 discloses that epitaxial growth is performed on a high-concentration impurity Si substrate and ion implantation is performed to control the film quality of the Si oxide layer. In this method, defects due to lattice misfit dislocations are necessarily introduced into the interface between the epitaxial Si film and the Si substrate.

Therefore, it is necessary to form a SIMOX wafer free from defects caused by a CZ bulk wafer and to avoid introducing new defects other than defects caused by process defects such as metal contamination and particles.

[0015]

SUMMARY OF THE INVENTION A first object of the present invention is to:
An object of the present invention is to provide a SIMOX wafer of higher quality than a conventional SIMOX wafer and a method of manufacturing the same.

A second object of the present invention is to provide a SIMOX wafer having a Si active layer free from defects caused by a CZ bulk wafer and a method of manufacturing the same.

A third object of the present invention is to provide a SIMOX wafer free from defects caused by a CZ bulk wafer without introducing new defects due to epitaxial growth, and a method of manufacturing the same.

According to the present invention, there is provided a step of preparing a Si substrate in which an epitaxial Si layer is formed on at least a main surface side of a Si substrate without generating a new defect, and oxygen is ion-implanted into the Si substrate from the epitaxial layer side. Forming an ion-implanted layer; and heat-treating the Si substrate so as to leave at least a part of the epitaxial layer on the surface side.
and a step of forming a Si oxide layer inside the i-base. As a result, a SIMOX wafer free from defects caused by the CZ bulk wafer can be obtained.

According to the present invention, there is provided a step of preparing a Si substrate on which an epitaxial Si layer is formed on at least a main surface side of a Si substrate without generating a new defect; a step of forming an insulating layer on the surface of the epitaxial layer; A step of ion-implanting oxygen into the Si substrate from the insulating layer side to form an ion-implanted layer, and heat-treating the Si substrate to oxidize the inside of the Si substrate while leaving at least a part of the epitaxial layer on the surface side And a step of forming a Si layer. As a result, a SIMO free from defects caused by the CZ bulk wafer
An X wafer can be obtained, and surface roughness due to ion implantation can be prevented.

The present invention relates to a flow pattern defect (FPD; Flow Pat) of a CZ bulk Si wafer.
turn Defect) or COP (Crystal)
To produce a substrate free from peculiar defects such as Originated Particle).

Further, the Si substrate is a wafer with no specified concentration or a reclaimed wafer.

Further, the present invention aims at eliminating defects of the CZ wafer.
0 is essentially different from epitaxial growth in which the introduction of defects due to lattice misfit is indispensable, and the present invention provides a new defect due to epitaxial growth other than the occurrence of defects due to process defects such as metal contamination and particles. It is assumed that there is no introduction.

Introducing defects due to lattice misfit when epitaxially growing on a high-concentration impurity substrate involves not only the cleanliness of the substrate surface, but also the degree of misfit and the concentration gradient of the impurity concentration near the epi-substrate interface. Is particularly affected by the steepness of Japanese Patent Application Laid-Open No. 8-191140 discloses that epitaxial growth at a relatively low growth temperature, such as epitaxy or MBE using disilane gas at 800 ° C., is performed. The impurity concentration gradient near the substrate interface is steep, and misfit dislocations are introduced. According to the present invention, even when epitaxial growth is performed on a high-concentration impurity substrate, the steepness of the impurity concentration gradient near the epi-substrate interface is reduced by using a high-temperature process (850 ° C. to 900 ° C. or higher), so that mistakes are made. It is possible not to introduce fit dislocations.

In the case of epitaxial growth on a high-concentration impurity substrate, the impurity concentration of the first epitaxial layer of about 100 nm is gradually lowered, and an epitaxial layer of a desired concentration is formed thereon, whereby misfit dislocations are formed. It is also possible to avoid the introduction. When epitaxial growth is performed on a low-concentration impurity substrate, misfit dislocations are not introduced.

[Epi Film] In the epitaxial Si film,
Since defects peculiar to bulk Si can be eliminated,
The device yield can be improved. Even now, epitaxial wafers are used for high-performance devices such as CPUs. In the future, wafer diameter will increase,
It is said that it is difficult to pull up high quality crystals, and the quality of bulk wafers is reduced. Therefore, the necessity of an epitaxial Si film is further increased, and the demand for the epitaxial film is also increased in SIMOX.

[SOI] The present invention also provides a method of manufacturing an expensive SOS or a semiconductor substrate which can be substituted for the conventional SIMOX even when manufacturing a large-scale integrated circuit having an SOI structure.

[0027]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. 1 is a schematic sectional view showing the steps of Embodiment 1 of the present invention.

In FIG. 1, first, a first Si single crystal substrate 11 is prepared, and an epitaxial Si layer 1 is formed on the main surface.
2 is formed (FIG. 1A). First Si single crystal substrate 1
In No. 1, since a completed SOI layer is determined by the epitaxial layer 12, a non-resistance specified wafer or a general reclaimed wafer may be used. Further, forming SiO ₂ 13 on the outermost surface layer may also mean that surface roughness during ion implantation is prevented.

Further, depending on the type of device such as a power device, it is necessary that the specific resistance and the conductivity type of the support substrate located below the surface Si layer of the SOI substrate and the SiO ₂ layer be different. For example, the SOI layer has a P-type high resistance (number to 1).
0Ω · cm), and the supporting substrate is an n-type low resistance (~ 0.0
1 Ωcm). Such a structure can be realized by forming an epitaxial layer having a conductivity type different from that of a substrate and a specific resistance in advance as an epitaxial layer before oxygen ion implantation.

Next, oxygen is ion-implanted from the main surface of the first substrate (FIG. 1B). Oxygen ion implantation reservoir 14
Are the first Si single crystal substrate 11 and the epitaxial layer 12
It is preferable to be near the interface with the substrate or inside the epitaxial layer 12. To be precise, when the oxygen ion implantation reservoir 14 becomes the SiO ₂ film 15 after the heat treatment, the implantation energy and the implantation amount are adjusted so that the interface between the epitaxial layer 12 and the substrate 11 is included in the SiO ₂ film 15.

Next, as shown in FIG. 1C, the first substrate is heat-treated.

The formation of the epitaxial layer can be performed after removing the oxide film on the surface after the oxygen ion implantation. In this case, it is desirable that the temperature of the heat treatment accompanying the epitaxial growth be as low as possible so that the ion-implanted oxygen does not undergo undesirable alteration during the formation of the epitaxial layer.

When ion implantation is performed after the epitaxial layer is formed, damage due to ion implantation may remain in the epitaxial layer. However, when the epitaxial layer is formed after the ion implantation, damage due to ion implantation is introduced. There is no.

The surface oxide film 13 is removed. FIG. 1D shows a semiconductor substrate obtained by the present invention. Of course, the surface oxide film 13 does not have to be removed immediately before the device process in order to avoid surface contamination. A single-crystal Si thin film 12 is flatly and uniformly thinned on the substrate 11 via SiO ₂ , and formed over a large area over the entire wafer. The semiconductor substrate obtained in this way can be suitably used from the viewpoint of producing an insulated electronic element.

Further, after removing the surface oxide film 13, a heat treatment may be performed in a reducing atmosphere containing hydrogen. By this heat treatment, the roughness of the surface is smoothed. Touch Poli, which has stronger mechanical polishing elements than chemical etching
Since the surface can be smoothed without using shing, minute scratches and the like are not introduced on the surface.

When Boron is contained in the SOI layer, the concentration can be reduced as a result of outward diffusion by the main heat treatment.

[Embodiment 2] FIG. 2 is a schematic sectional view showing the steps of Embodiment 2 of the present invention.

In FIG. 2, first, a first Si single crystal substrate 21 is prepared, and an epitaxial Si layer 1 is formed on the main surface.
2 is formed (FIG. 2A). First Si single crystal substrate 2
In No. 1, since a completed SOI layer is determined by the epitaxial layer 22, a non-resistive wafer or a general reclaim wafer may be used. Further, forming SiO ₂ 23 on the outermost surface layer may also mean that surface roughness during ion implantation is prevented.

Next, oxygen is ion-implanted from the main surface of the first substrate (FIG. 2B). Oxygen ion implantation pool 24
Are a first Si single crystal substrate 21 and an epitaxial layer 22
It is preferable to be in the vicinity of the interface with the substrate or inside the epitaxial layer 22. To be precise, when the oxygen ion implantation pool 24 becomes the SiO ₂ film 25 after the heat treatment, the implantation energy and the implantation amount are adjusted so that the interface between the epitaxial layer 22 and the substrate 21 is included in the SiO ₂ film 25.

Next, as shown in FIG. 2C, the first substrate is heat-treated.

(Multi-stage implantation: Multi-I / I) Thereafter, wafer cleaning → ion implantation → heat treatment is repeated one or more times.

The purpose of this step is to prevent a wafer surface particle from being used as a mask during ion implantation to prevent ion implantation by inserting wafer cleaning in the middle of the process.

The surface oxide film 23 is removed. FIG. 2F shows a semiconductor substrate obtained by the present invention. Of course, in order to avoid surface contamination, the surface oxide film 23 need not be removed until immediately before the device process. A single-crystal Si thin film 22 is flatly and uniformly thinned on the substrate 21 via SiO ₂ , and is formed over a large area over the entire wafer. The semiconductor substrate obtained in this way can be suitably used from the viewpoint of producing an insulated electronic element.

Further, after removing the surface oxide film 23, heat treatment may be performed in a reducing atmosphere containing hydrogen. By this heat treatment, the roughness of the surface is smoothed. Touch Poli, which has stronger mechanical polishing elements than chemical etching
Since the surface can be smoothed without using shing, minute scratches and the like are not introduced on the surface.

When Boron is contained in the SOI layer, the concentration can be reduced as a result of outward diffusion by the main heat treatment.

[Embodiment 3] FIG. 3 is a schematic sectional view showing the steps of Embodiment 3 of the present invention.

In FIG. 3, first, a first Si single crystal substrate 31 is prepared, and an epitaxial Si layer 3 is formed on the main surface.
2 is formed (FIG. 3A). First Si single crystal substrate 3
In No. 1, since the SOI layer to be completed is determined by the epitaxial layer 32, a non-resistive wafer or a general reclaim wafer may be used. Further, forming SiO ₂ 33 on the outermost surface layer may mean that surface roughness during ion implantation is prevented.

Next, oxygen is ion-implanted from the main surface of the first substrate (FIG. 3B). Oxygen ion implantation pool 34
Are the first Si single crystal substrate 11 and the epitaxial layer 32
It is preferable to be in the vicinity of the interface with the substrate or inside the epitaxial layer 32. To be precise, when the oxygen ion implantation reservoir 34 becomes the SiO ₂ film 35 after the heat treatment, the implantation energy and the implantation amount are adjusted so that the interface between the epitaxial layer 32 and the substrate 11 is included in the SiO ₂ film 35.

Next, as shown in FIG. 3C, the first substrate is heat-treated.

(ITOX process) Thereafter, the substrate is heat-treated in an oxidizing atmosphere.

Before this, the surface oxide film may be removed.

By this oxidation, not only the surface but also the thickness of the internal oxide film 35 is increased, and the reliability of the internal oxide film is improved.

The oxidizing atmosphere is desirably composed of oxygen and an inert gas. Suppress the rate of oxide film formation on the surface,
In order to promote an increase in the thickness of the internal oxide film, it is desirable to lower the oxygen concentration in the atmosphere and raise the heat treatment temperature.

The surface oxide film 13 is removed. FIG. 3D shows a semiconductor substrate obtained by the present invention. Of course, the surface oxide film 33 does not have to be removed until immediately before the device process in order to avoid surface contamination. A single-crystal Si thin film 32 is flatly and uniformly thinned on the substrate 31 via SiO ₂ , and is formed over a large area over the entire wafer. The semiconductor substrate obtained in this way can be suitably used from the viewpoint of producing an insulated electronic element.

Further, after removing the surface oxide film 33, heat treatment may be performed in a reducing atmosphere containing hydrogen. By this heat treatment, the roughness of the surface is smoothed. Touch Poli, which has stronger mechanical polishing elements than chemical etching
Since the surface can be smoothed without using shing, minute scratches and the like are not introduced on the surface.

When Boron is contained in the SOI layer, the concentration can be reduced as a result of outward diffusion by the main heat treatment.

[0057]

(Embodiment 1) A CVD (Chemical Vapor Depos) is formed on a first single crystal CZ-Si substrate.
single-crystal Si was epitaxially grown to 0.35 μm by an ition method. The growth conditions are as follows. As a comparative example, a substrate without epitaxial growth was prepared,
The following processing was performed in the same manner as that for epitaxial growth.

Source gas: SiH ₂ Cl ₂ / H ₂ gas flow rate: 0.5 / 230 1 / min Gas pressure: 80 Torr Temperature: 900 ° C. Growth rate: 0.2 μm / min

Further, a 50 nm SiO ₂ layer was formed on the surface of the epitaxial Si layer by thermal oxidation. The purpose of this oxide film is to prevent surface roughness at the time of ion implantation, and may be omitted.

180+ of O ⁺ is passed through the SiO ₂ layer on the surface.
2 × 10 ¹⁸ cm ⁻² ions were implanted with V. The temperature during the injection was 550 ° C. As a result, an oxygen ion implanted layer having a concentration peak near the interface between the epitaxial layer and the original substrate was formed.

Thereafter, the substrate was subjected to a heat treatment at 1350 ° C. for 4 hours in an O 2 (10%) / Ar atmosphere. When the surface oxide film was removed, an SOI wafer having an SOI layer of 150 nm / buried oxide film of 400 nm was completed.

Since this SOI layer is originally a part of the epitaxial layer, COP and F originated from the CZ-Si substrate.
There were no defects such as PD.

The completed SOI substrate was immersed in a 49% HF solution for 10 minutes and observed with an optical microscope. When COP is present in the SOI layer, the SiO ₂ film is etched from HF through the COP portion, and HF voids dissolved from the SiO ₂ layer in a circular shape are observed. When an epitaxial layer was formed, HF Void was 0.2 cores / cm ²
However, in the comparative example in which the epitaxial layer was not formed, HF void was confirmed to be 1.5 cores / cm ² .

Example 2 A CVD (Chemical Vapor Depo) was formed on a first single crystal CZ-Si substrate.
Single-crystal Si was epitaxially grown to a thickness of 0.35 μm by a position (method) method. The growth conditions are as follows.

Source gas: SiH ₂ Cl ₂ / H ₂ Gas flow rate: 0.5 / 230 1 / min Gas pressure: 760 Torr Temperature: 1040 ° C. Growth rate: 0.30 μm / min

Further, a 50 nm SiO ₂ layer was formed on the surface of the epitaxial Si layer by thermal oxidation. The purpose of this oxide film is to prevent surface roughness at the time of ion implantation, and may be omitted.

180+ O ⁺ through the surface SiO ₂ layer
2 × 10 ¹⁷ cm ⁻² ions were implanted with V. The temperature during the injection was 550 ° C. As a result, an oxygen ion implanted layer having a concentration peak near the interface between the epitaxial layer and the original substrate was formed.

Thereafter, the substrate was subjected to a heat treatment at 1350 ° C. for 4 hours in an O 2 (10%) / Ar atmosphere. The buried oxide film was about 100 nm.

[0069] After washing the wafer, again O ⁺ 18
5 × 10 ¹⁷ cm ⁻² ions were implanted at 0 keV, and the same heat treatment was performed. This washing → implantation → heat treatment was repeated until the total oxygen implantation amount reached 2 × 10 ¹⁸ cm ⁻² .

When the surface oxide film is removed, the SOI layer 150 is removed.
An SOI wafer having a thickness of 400 nm / buried oxide film was completed.

Since this SOI layer is originally a part of the epitaxial layer, COP and F originated from the CZ-Si substrate.
There were no defects such as PD.

The implantation energy and the implantation amount may be selected so that the final buried oxide film includes the interface between the epitaxial layer and the original substrate.

Example 3 A CVD (Chemical Vapor Depo) was formed on a first single crystal CZ-Si substrate.
Single-crystal Si was epitaxially grown to a thickness of 0.35 μm by a position (method) method. The growth conditions are as follows.

Source gas: SiH ₂ Cl ₂ / H ₂ gas flow rate: 0.5 / 180 1 / min Gas pressure: 80 Torr Temperature: 950 ° C. Growth rate: 0.30 μm / min

Further, a 50 nm SiO ₂ layer was formed on the surface of the epitaxial Si layer by thermal oxidation. The purpose of this oxide film is to prevent surface roughness at the time of ion implantation, and may be omitted.

180+ O ⁺ through the SiO ₂ layer on the surface
4 × 10 ¹⁷ cm ⁻² ions were implanted with V. The temperature during the injection was 550 ° C. As a result, an oxygen ion implanted layer having a concentration peak near the interface between the epitaxial layer and the original substrate was formed.

Thereafter, the substrate was subjected to a heat treatment at 1350 ° C. for 4 hours in an O 2 (10%) / Ar atmosphere. A wafer having an SOI layer of 300 nm and a buried oxide film of 90 nm was completed.

Thereafter, heat treatment was performed at 1350 ° C. for 4 hours in an O 2 (70%) / Ar atmosphere. When the surface oxide film is removed, the SOI layer 200 nm / the buried oxide film 120 is removed.
nm SOI wafer was completed.

Since this SOI layer is originally a part of the epitaxial layer, COP and F originated from the CZ-Si substrate.
There were no defects such as PD.

The implantation energy and implantation amount may be selected so as to include the interface between the epitaxial layer and the original substrate in the final buried oxide film.

SOI completed in the above embodiment
Since the layer is determined by the epitaxial layer, the first Si single crystal substrate may be a non-resistance specified wafer or a general reclaim wafer. It is of course possible to form a high-resistance epitaxial layer on a low-resistance substrate. The epitaxial growth method on Si can be carried out by various methods such as MBE method, sputtering method, liquid phase growth method other than CVD method, and is not limited to CVD method.

(Example 4) Sb-doped n-type, specific resistance 0.
A 0.5 μm non-doped epitaxial layer was grown on a 005 Ω · cm (100) Si wafer.

The growth conditions are as follows.

Source gas: SiH ₂ Cl ₂ / H ₂ gas flow rate: 0.5 / 230 1 / min Gas pressure: 80 Torr Temperature: 900 ° C. Growth rate: 0.20 μm / min

Further, a 50 nm SiO ₂ layer was formed on the surface of the epitaxial Si layer by thermal oxidation. The purpose of this oxide film is to prevent surface roughness at the time of ion implantation, and may be omitted.

O ⁺ is supplied for 180 ke through the SiO ₂ layer on the surface.
4 × 10 ¹⁷ cm ⁻² ions were implanted with V. The temperature during the injection was 550 ° C. As a result, an oxygen ion implanted layer having a concentration peak near the interface between the epitaxial layer and the original substrate was formed.

Thereafter, the substrate was subjected to a heat treatment at 1350 ° C. for 4 hours in an O 2 (10%) / Ar atmosphere. An SOI wafer having an SOI layer of 300 nm and a buried oxide film of 90 nm was completed.

Thereafter, heat treatment was performed at 1350 ° C. for 4 hours in an O 2 (70%) / Ar atmosphere. When the surface oxide film is removed, the SOI layer 200 nm / the buried oxide film 120 is removed.
nm SOI wafer was completed.

Since this SOI layer is originally a part of the epitaxial layer, COP and F originated from the CZ-Si substrate.
There were no defects such as PD.

The implantation energy and the implantation amount may be selected so that the final buried oxide film includes the interface between the epitaxial layer and the original substrate.

(Example 5) CVD (Che) on a first single crystal CZ-Si substrate P ⁺ type (resistivity 0.01 Ω · cm)
Single crystal Si was epitaxially grown to a thickness of 0.35 μm by a physical vapor deposition (Metal Vapor Deposition) method. The growth conditions are as follows. As a comparative example, a substrate not epitaxially grown was prepared, and the following processing was performed in the same manner as that of the substrate epitaxially grown.

Source gas: SiH ₂ Cl ₂ / H ₂ Gas flow rate: 0.5 / 230 1 / min Gas pressure: 80 Torr Temperature: 900 ° C. Growth rate: 0.2 μm / min

Further, a 50 nm SiO ₂ layer was formed on the surface of the epitaxial Si layer by thermal oxidation. The purpose of this oxide film is to prevent surface roughness at the time of ion implantation, and may be omitted.

180+ O ⁺ through the SiO ₂ layer on the surface
2 × 10 ¹⁸ cm ⁻² ions were implanted with V. The temperature during the injection was 550 ° C. As a result, an oxygen ion implanted layer having a concentration peak near the interface between the epitaxial layer and the original substrate was formed.

Thereafter, the substrate was subjected to a heat treatment at 1350 ° C. for 4 hours in an O 2 (10%) / Ar atmosphere. When the surface oxide film was removed, an SOI wafer having an SOI layer of 150 nm / buried oxide film of 400 nm was completed.

Since this SOI layer is originally a part of the epitaxial layer, COP and F originated from the CZ-Si substrate.
There were no defects such as PD.

The completed SOI substrate was immersed in a 49% HF solution for 10 minutes, and observed with an optical microscope. When COP is present in the SOI layer, the SiO ₂ film is etched from HF through the COP portion, and HF voids dissolved from the SiO ₂ layer in a circular shape are observed. When an epitaxial layer was formed, HF Void was 0.2 cores / cm ²
However, in the comparative example in which the epitaxial layer was not formed, HF void was confirmed to be 1.5 cores / cm ² .

Other implantation conditions are, for example, energy: 180 keV, implantation amount: 4 × 10 ¹⁷ cm ⁻² , and in this case, an SOI wafer having an SOI layer of 300 nm / a buried oxide film of 90 nm can be obtained.

The implantation energy and the implantation amount may be selected so that the final buried oxide film includes the interface between the epitaxial layer and the original substrate.

At this time, the substrate was subjected to a heat treatment in a 100% pure hydrogen atmosphere using a hydrogen purifier using a palladium alloy (1100 ° C., 4 h). After that, the surface roughness was measured.
0.5 nm has been improved to 0.3 nm. Also Bor
The on concentration was 2 × 10 ¹⁸ / cm ³ in the SOI layer, but was reduced to 5 × 10 ¹⁵ / cm ³ or less.

[0101]

As described in detail above, according to the present invention,
It is possible to propose a method for manufacturing a semiconductor substrate which can solve the above problems and the above requirements.

[Epi Film] A flow pattern defect (FPD: FlowPatt) is applied to a bulk Si wafer.
en Defect) (T. Abe, Extended)
Abst. Electrochem. Soc. Spr
ing Meeting vol. 95-1 pp. 5
96, (May, 1995)) and COP (Crysta
l Originated Particles) (Hidekazu Yamamoto, "Requirements for Large Diameter Silicon Wafers", 2nd ed.
3 times Ultra Clean Technology College, (Au
g. (1996)). In the epitaxial Si film, the above-described defects peculiar to bulk Si can be eliminated, so that the device yield can be improved. It is said that the diameter of wafers will increase in the future, making it difficult to pull up high-quality crystals, and the quality of bulk wafers will decrease. Therefore, the necessity of the epitaxial Si film is further increased, and the demand for the epitaxial film is increased even in SOI.

Further, according to the present invention, it is possible to propose a method of manufacturing a semiconductor substrate which can be used as a substitute for expensive SOS or conventional SIMOX even when manufacturing a large-scale integrated circuit having an SOI structure.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view for explaining a process in a first embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view for explaining a process in Embodiment 2 of the present invention.

FIG. 3 is a schematic cross-sectional view for explaining a process of Embodiment 3 of the present invention.

FIG. 4 is a schematic cross-sectional view for explaining a process of a first conventional example.

[Explanation of symbols]

11, 21, 31, 41 Si substrate 12, 22, 32 Epitaxial Si layer 13, 23, 33 SiO ₂ layer 14, 24, 34, 42 Ion implantation pool 15, 25, 35, 44 Embedded SiO ₂ layer 43 SOI layer

Claims (18)

[Claims] 1. A step of preparing a Si substrate in which an epitaxial Si layer is formed on at least a main surface side of a Si substrate without generating new defects, and oxygen is ion-implanted into the Si substrate from the epitaxial layer side. Forming a layer, and heat-treating the Si substrate to form an Si oxide layer inside the Si substrate while leaving at least a portion of the epitaxial layer on the surface side. A semiconductor substrate, comprising: 2. A step of preparing an Si substrate on which an epitaxial Si layer is formed at least on a main surface side of a Si substrate without generating a new defect; a step of forming an insulating layer on the surface of the epitaxial layer; Ion-implanting oxygen from the insulating layer side to form an ion-implanted layer, and heat-treating the Si substrate so that at least a part of the epitaxial layer is left on the surface side, Si oxide is introduced into the Si substrate.
A semiconductor substrate formed by a manufacturing process including a step of forming a layer. 3. The semiconductor substrate according to claim 1, wherein a step of forming an insulating layer on a surface layer is performed after the ion implantation step and before the heat treatment. 4. The semiconductor substrate according to claim 1, wherein after the heat treatment, a) cleaning, b) ion implantation, and c) heat treatment are performed one or more cycles. 5. The semiconductor substrate according to claim 1, wherein a heat treatment is performed in an oxidizing atmosphere after the final heat treatment. 6. The semiconductor substrate according to claim 1, wherein a step of performing a heat treatment in an oxidizing atmosphere after removing the oxide film after the final heat treatment is performed. 7. The semiconductor substrate according to claim 1, wherein after the final heat treatment, after removing the oxide film, a heat treatment is performed in a reducing atmosphere containing hydrogen. 8. The semiconductor substrate according to claim 1, wherein a step of removing a surface insulating layer after the final heat treatment is performed. 9. The semiconductor substrate according to claim 1, wherein said first Si substrate is a wafer with no specified concentration or a reclaimed wafer. 10. The semiconductor substrate according to claim 1, wherein the insulating layer is a thermal oxide layer. 11. The semiconductor substrate according to claim 1, wherein after the heat treatment, the oxide layer formed on the surface is peeled off, and then heat treatment is performed in a reducing atmosphere containing hydrogen. 12. The semiconductor substrate according to claim 1, wherein the step of forming the epitaxial Si layer without generating a new defect is performed at a temperature of 850 ° C. or higher. 13. The semiconductor substrate according to claim 1, wherein the new defect is a defect due to lattice misfit dislocation. 14. The Si substrate and the epitaxial S
The semiconductor substrate according to claim 1, wherein the conductivity types of the i-layers are different from each other. 15. The Si substrate and the epitaxial S
2. The method according to claim 1, wherein the specific resistances of the i-layers are different from each other.
Or the semiconductor substrate according to 2. 16. The semiconductor substrate according to claim 1, wherein the step of forming the epitaxial Si layer is performed by a CVD method. 17. A step of implanting oxygen ions into a Si substrate to form an ion-implanted layer, heat treating the Si substrate,
forming a silicon oxide layer inside the i-substrate;
A semiconductor substrate formed by forming a silicon oxide layer inside a substrate and then forming an epitaxial Si layer on the surface of the Si substrate without generating new defects. 18. A method for producing a semiconductor substrate according to claim 1.