JPH11313345A - Convergence adjustment device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a signal corresponding accurately to an amount of light incident onto an optical sensor in the case of adjusting convergence of a display device using a CRT. SOLUTION: A convergence adjustment pattern is displayed 14, a correction current with respect to a convergence yoke of a CRT is changed 24, and based on an output of an optical sensor 10 provided opposite to a screen 8 of a display device, an optimum correction current is obtained. A result of comparing an output of the optical sensor with a threshold value is latched with a timing signal generated in a prescribed time after the production of a vertical synchronizing signal and the optimum correction current is obtained based on the latched comparison result. Instead, an output of the optical sensor is monitored and when the output reaches a threshold value or over, the comparison result is latched and the optimum correction current may be obtained based on the latched comparison result.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a convergence adjusting device for a display device using a CRT, and more particularly, to detecting and adjusting a projection position of a convergence adjusting pattern by using an optical sensor. The present invention relates to a device for obtaining a signal corresponding to a quantity.

[0002]

2. Description of the Related Art In a projection type color display device in which images on a display screen of three CRTs emitting three primary colors are enlarged and projected on a screen, color shift occurs due to various causes. Convergence adjustment is performed to eliminate the color shift and superimpose the three primary color images. In the convergence adjustment, for example, an adjustment pattern of a lattice pattern is
T is displayed on the screen and projected on the screen, the projection position on the screen at that time is detected, and the three-color adjustment pattern is projected at the same position. In one of the methods, an optical sensor is arranged at a position where the high-brightness part of the adjustment pattern is to be projected, and more strictly, the high-brightness part of the adjustment pattern is located at that position. The current flowing through the convergence correction yoke is adjusted so that the center coincides with the center of the optical sensor.

[0003]

In the conventional adjusting device,
A signal that accurately corresponds to the amount of light incident on the optical sensor could not be obtained. An object of the present invention is to make it possible to obtain a signal that accurately corresponds to the amount of light incident on an optical sensor.

[0004]

A convergence adjusting device according to the present invention is provided opposite to a screen of the display device, and a pattern generating means for displaying a convergence adjusting pattern on a projection type display device using a CRT. By changing the current value of an optical sensor for detecting when the position on the opposing screen has high brightness and a correction circuit for providing a correction current for the convergence yoke of the CRT, the optimum value is obtained based on the output of the optical sensor. Correction value optimizing means for determining a correction current value and performing convergence adjustment using the optimum correction current value, wherein the correction value optimizing means compares the output of the optical sensor with a threshold value, And a timing circuit for generating a timing signal after a lapse of a predetermined time from the generation of the vertical synchronization signal. And a means for latching an output of the comparison circuit when a timing signal is generated from the timing circuit, and a means for calculating the optimal correction current value based on the output of the latched comparison circuit. Things.

Further, a timing adjuster which can be operated by an operator and adjusts the timing of generation of the timing signal may be provided for the timing circuit.

[0006] Instead of the correction value optimizing means, a comparison circuit for comparing the output of the optical sensor with a threshold value, and monitoring the output of the comparison circuit to indicate that the output of the optical sensor has exceeded the threshold value. A timing circuit for generating a timing signal when the state is reached, a means for latching an output of the comparison circuit when a timing signal is generated from the timing circuit, and
Correction value optimizing means including means for obtaining the optimum correction current value may be used.

Instead of the correction value optimizing means, a smoothing circuit for smoothing the output of the optical sensor, a comparing circuit for comparing the output of the smoothing circuit with a threshold value, and a means for latching the output of the comparing circuit And a correction value optimizing means including means for calculating the optimum correction current value based on the output of the latched comparison circuit.

In any of the above cases, the display device projects the image of the display screen of the CRT on the screen, and the pattern generating means is located at a position on the screen facing the optical sensor. The brightness of the video signal may be increased when the corresponding position on the display screen of the CRT is scanned by the electron beam.

[0009]

Embodiments of the present invention will be described below with reference to the drawings.

Embodiment 1 First, the overall configuration of a display device including a CRT and its convergence correction device will be described. FIG. 1 shows a CRT 2, a circuit 4 for driving it, C
A screen 8 on which the image projected on RT2 is projected,
And optical sensor 10 for detecting a high-luminance portion on a screen
Is shown. To project a color image on the screen,
Although one CRT and a corresponding driving circuit are required, FIG. 1 shows only a CRT and a driving circuit corresponding to one color.

In FIG. 1, an image displayed on a display screen of a CRT 2 is projected on a screen 8 by a projection lens 3. The CRT 2 is supplied with a video signal input via the normal video signal terminal 12 and displays it. At the time of convergence adjustment, an adjustment pattern generated by the pattern generation circuit 14 is displayed.

The convergence adjustment pattern is, for example, a lattice-like pattern composed of a plurality of horizontal and vertical lines, and a plurality of optical sensors 10 are usually provided around the screen. However, in the following description, it is assumed that the convergence adjustment pattern is composed of one horizontal line as shown in FIG. 3 and that the number of the optical sensors 10 is one.

Switching between the video signal from the video signal terminal 12 and the video signal from the pattern generation circuit 14 is performed by a switching circuit 16. The deflection circuit 18 receives a synchronization signal input via the synchronization signal terminal 20, supplies a deflection current to the deflection yoke 22, and performs horizontal and vertical sweeps on the CRT 2. The correction circuit 24 supplies a correction current to the convergence yoke 26.

The correction value optimizing circuit 28 supplies the correction circuit 24 with a signal indicating a correction current value. During the convergence adjustment, the correction current is changed, and the optimum correction current value is obtained as follows.

The optical sensor 10 is used for detecting a high brightness position on the screen 8. The optical sensor 10 is provided to face a predetermined point (position) on the screen 8 and generates an output according to the luminance of the predetermined point. That is, the above-mentioned predetermined point constitutes (part of) a high-luminance portion of the adjustment pattern,
When the amount of light incident on the optical sensor 10 increases, an output (for example, a high-potential output) representing the amount of light is generated, and the predetermined point does not constitute a high-luminance portion of the adjustment pattern. When the amount of incident light is small, an output representing the amount (for example, a low potential output) is generated. However, the optical sensor 10 has a property that, when the incident light amount increases, the output immediately follows and increases, but even when the incident light amount decreases, the output follows only slowly and gradually decreases. . This is shown in FIGS. 4B and 4C, which will be described in detail later. 3B and 3C, the solid line Q indicates the amount of light incident on the optical sensor 10, and the broken line R indicates the output signal of the optical sensor 10.

FIG. 2 shows a correction value optimizing circuit 28 according to this embodiment. The correction value optimization circuit 28 includes a comparison circuit 36, a timing circuit 38, a latch circuit 40, a storage device 49, and a microprocessor 52. The storage device 49 includes an end storage unit 46 and the optimum correction value storage unit 32. The end storage unit 46 will be described later. The optimum correction value storage unit 32 stores a value (optimum correction value) indicating the optimum convergence correction current in the correction circuit 24.

The microprocessor 52 includes a CPU 54 and a program memory 56. Program memory 56
Stores a program for the operation of the CPU 54.

The correction circuit 24 is selectively supplied with a correction value signal output from the optimum correction value storage section 32 or the microprocessor 52 in the storage device 49 by the switching circuit 30. During the convergence adjustment, the output of the microprocessor 52 is supplied to the correction circuit 24, and during the normal display operation of the display device, the output of the optimum correction value storage unit 32 is supplied to the correction circuit 24.

When the correction current generated by the correction circuit 24 in response to the output from the microprocessor 52 changes, the position of the high luminance portion of the adjustment pattern, for example, the position of the horizontal line shown on the screen changes. For example, when the correction current increases, the position of the horizontal line decreases. That is, the position of the horizontal line corresponds to the magnitude of the correction current.

The microprocessor 52 changes the correction value according to a predetermined sequence. For example, the value is gradually increased from a value lower than the value (design value) expected to be optimal by a predetermined value. When the correction value can take a negative value and a positive value centered on zero, the correction value is gradually increased from a predetermined negative value (the magnitude of the negative value is first reduced, and after passing through zero, the value becomes positive). Is increased in magnitude).

The comparison circuit 36 receives the output R of the optical sensor 10 and compares it with a predetermined threshold value Th. If R ≧ Th, a logical 1 signal is output. Otherwise, a logical 0 signal is output. I do.

The timing circuit 38 receives the vertical synchronizing signal V and generates a timing signal Ta with a predetermined delay. The timing is determined according to the mounting position of the optical sensor 10. That is, since it is known in advance which horizontal line should match the position of the optical sensor 10, the timing circuit 38 is designed and configured so as to generate the timing signal Ta slightly later than the position of the horizontal line to be matched. For example, if the nth horizontal line should match the position of the optical sensor 10, the (n + m) th (m is 5 to 20)
degree. It is determined in consideration of the difference in the delay time of the circuit operation and the like. The timing signal is generated at the horizontal line of ()).
The timing of the sampling of the output of the optical sensor 10, that is, the latch of the output of the comparison circuit 36 is determined by the timing signal.

The latch circuit 40 receives the timing signal Ta from the timing circuit 38 and latches the output of the comparison circuit 36 at that timing.

The microprocessor 52 includes a comparison circuit 36
, The both ends of the correction value range in which the comparison result is logical 1, that is, the start end Ib and the end Ic (correction values thereof) are detected based on the comparison result from the comparison result and the correction value at that time.
To memorize.

The microprocessor 52 further obtains an intermediate value Id as an optimum correction value based on the end values Ib and Ic stored in the stored end storage 46, and calculates the optimum correction value. The correction value is stored in the correction value storage unit 32. The optimum stored value stored in the optimum correction value 32 is used as a correction value during the subsequent normal display operation.

As described above, the convergence adjustment pattern shown in FIG. 3 is made up of one horizontal line, and this horizontal line is made up of the nth horizontal line (horizontal scanning line). That is, in this adjustment pattern, only the n-th horizontal line is bright (high brightness), and the other portions are dark. FIG.
(A) shows a video signal that generates such a convergence adjustment pattern.

As described above, during the convergence adjustment, when the correction current of the correction circuit 24 continuously changes due to the output from the microprocessor 52, the horizontal line of the adjustment pattern moves up and down accordingly. Moving. As the horizontal line moves from top to bottom, the amount of light incident on the optical sensor 10 changes. FIGS. 4B, 4C, and 4D respectively show the amount of light (solid line Q) incident on the optical sensor 10 and the output of the optical sensor 10 (dashed line R) when the horizontal lines are at different positions.
Is shown.

As shown in FIG. 3 (a), when the position (height) of the horizontal line P corresponds to (coincides with) the position of the optical sensor 10, the optical sensor 10 is moved as shown in FIG. 4 (b). In addition, when the position of the display screen of the CRT 2 corresponding to the position on the screen 8 facing the optical sensor 10 is scanned by the electron beam, and thus the screen facing the optical sensor 10 becomes high brightness during one horizontal period. When the light spot passes through the upper position, the amount of incident light Q increases, and the optical sensor 10
Is as shown by the broken line in FIG. 4 (b). As shown in the figure, the output R of the optical sensor 10 rises immediately when light is incident (Q), and gradually decreases when light is not incident.
After one vertical cycle, it continues to fall until there is incidence again. After one vertical period, for example, it is about 60% of the peak time. Thus, the output of the optical sensor 10 has a sawtooth shape.

As shown in FIG. 3B, when the position (height) of the horizontal line P is slightly lower than the position of the optical sensor 10, as shown in FIG. Receive less light Q. Therefore, the peak of the output R of the optical sensor 10 also decreases.

As shown in FIG. 3C, when the position (height) of the horizontal line P is significantly lower than the position of the optical sensor 10,
The optical sensor 10 does not receive any light. Therefore, the output R of the optical sensor 10 becomes zero or a value close thereto as shown in FIG.

When the position (height) of the horizontal line P is higher than the position of the optical sensor 10, the amount of light Q
And its output R are the same as in FIGS. 4 (c) and 4 (d).

When the correction current value is gradually changed and the position of the horizontal line P is gradually changed, the peak value of the output of the optical sensor 10 is gradually changed. FIG. 5 shows this state. In this figure, the horizontal axis indicates the correction current value (corresponding to the position (height) of the horizontal line), and the vertical axis indicates the peak value of the output of the optical sensor 10.

The optimum correction current value is a correction current value that causes the peak in FIG. In order to quickly determine the optimum correction value, the correction current value is changed stepwise, that is, discretely, so that the correction current value at which light incidence has started and the correction current value at which light incidence has ended, that is, the output of the optical sensor 10, Find both ends of the range that is greater than or equal to the threshold. For example, when the correction value is gradually increased, the value I when the threshold value (for example, 25% of the expected peak value) Th is equal to or greater than the first threshold value is set as the correction value (starting end portion) Ib at which light incidence has started. Finally, the value I when the value is equal to or greater than the threshold value Th is set as a correction value (end portion) Ic at which the light incident position ends, and an intermediate value Id between them is estimated as a correction current value that causes a peak. That is, Id = (Ic−Ib) / 2 + Ib. . . In (1), a correction value that causes a peak is obtained, and this is treated as an optimum correction value.

The operation of the circuit of FIG. 2 will be described below with reference to the flowcharts of FIGS.

First, an operation for changing the correction value will be described with reference to FIG.

Firstly, to set the correction value I _i to the initial value I _min (101). This initial value is a correction value such that the horizontal line P of the convergence adjustment pattern shown in FIG. 3 appears sufficiently above the optical sensor 10, that is, the correction value is sufficiently small (large in the negative direction). Is a correction value that ensures that the output of the optical sensor 10 does not exceed the threshold Th.

Next, it waits for the synchronizing signal V to appear (10
2). Next, the correction value is increased by a predetermined width ΔI (10
3). Then the correction value I _i is checked to see if it has reached the final value I _max (104). As for this final value, the horizontal line is
5, the correction value is sufficiently large (large in the positive direction), is surely located on the right side of Ic in FIG. 5, and the output of the optical sensor 10 does not exceed the threshold value Th. Correction value. It does not reach the final value I _max, the flow returns to step 102. If you have reached
End the operation.

As described above, the correction is performed using the different correction values for each vertical cycle, and the position of the horizontal line of the adjustment pattern is gradually lowered. At the position where the horizontal line faces the optical sensor,
The output of the optical sensor is high, otherwise the output of the optical sensor is relatively low.

In the above example, the correction value is changed every one vertical cycle. However, the correction value may be changed every plural vertical cycles.

Next, referring to FIG. 7, an operation for obtaining the ends Ib and Ic will be described. This operation is performed in parallel with the operation of changing the correction value shown in FIG.

First, it is determined whether or not the correction value changing operation of FIG. 6 is performed (111), and if not, the process waits. If so, it waits for the next sample timing (112). That is, it waits for a timing signal to be supplied from the timing circuit 38. When the timing signal is supplied, the output S of the comparison circuit 36 at that time is latched (113). Then, it is determined whether or not the output of the latched comparison circuit is logic 1 (11).
4). If S = 1, the process returns to step 112. S =
When 1 is confirmed, the correction value I at that time is written into the end memory 46 as the end Ib (115). Next, it waits for sample timing again (116). When the sample timing comes again, the output of the comparison circuit 36 is latched (117), and it is determined whether the latched comparison result S is logic 1 (118). If it is logic 1, the process returns to step 116. If it is not logic 1, a value obtained by subtracting ΔI from the correction value I at that time is used as the end Ic and stored in the end storage 4.
6 (119), and the operation ends.

Next, an operation for obtaining the optimum correction value Id will be described with reference to FIG. This operation is performed after the ends Ib and Ic are obtained in the operation of FIG. It is not necessary to do it immediately.

First, the end parts Ib and Ic are stored in the end storage part 46.
(131). Next, the intermediate value Id is calculated using this (132). This calculation is performed according to the above equation (1). Next, the calculated Id is written into the optimum correction value storage unit 32 as the optimum correction value (133).

After the optimum correction value is obtained in this manner, the convergence correction is performed using the correction value when the display device performs a normal display operation thereafter.

In the above operation, the timing of latching (ie, sampling) the output of the comparison circuit 36 is determined by the timing circuit 38. This timing is a timing slightly delayed from the timing at which the peak of the sawtooth output of the optical sensor 10 should appear. The reason for setting the timing slightly delayed is to prevent the sampling from being performed before the peak due to the length of the delay time of the circuit operation. If you sample before the peak, you will latch the comparison result for a lower position (a value that is significantly lower than the previous peak), and the value used for comparison will be far from the peak value, and it will be accurate The correction value cannot be determined. On the other hand, if it is slightly after the peak, the result of the comparison using a value that is not so large from the peak value and substantially equal to the peak value can be obtained.

Therefore, in the present embodiment, when the n-th horizontal line originally forms a horizontal line, the (n + m) -th horizontal line (m = 5-2)
The timing circuit 38 is designed so as to generate a timing signal at the timing of the horizontal cycle of 0).

As a result, a value close to the peak value can be sampled, and the correction value giving the peak can be accurately and reliably obtained.

In the above example, two ends Ib and I
c, and an intermediate value Id is determined based on these values to obtain an optimal correction value. However, a threshold value is set so that only one comparison result that satisfies R ≧ Th appears, and R ≧ Th is satisfied. The correction value at that time may be used as the optimum correction value.

The function of the timing circuit 38 may be provided to the microprocessor 52. In this case, a separate timing circuit 38 is not required for the microprocessor 52.

Embodiment 2 FIG. 9 shows a part of the apparatus according to the second embodiment. This embodiment is generally similar to the first embodiment.
Is the same as The only difference is that a timing adjuster 58 for adjusting the sample timing is provided. The timing adjuster 58 allows an operator to input a timing adjustment value by manual input (key input or volume operation) to adjust the timing.

The output of the timing adjuster 58 is supplied to the timing circuit 38, and the timing circuit 38 adjusts the timing of the generation of the timing signal based on the output from the timing adjuster 58.

The adjustment by the timing adjuster 58 is performed as necessary according to the actual use result. Therefore, this can be corrected when the difference between the actual value and the design value is large, and the output of the comparison circuit 36 is latched at a timing closer to the peak of the output of the optical sensor 10 to determine the optimum correction value. Can be used.

Embodiment 3 FIG. 10 shows a part of the apparatus according to the third embodiment. This embodiment is generally the same as the first embodiment. However, the timing circuit 5 of this device
9 generates a second timing signal Tb in addition to the timing signal Ta supplied to the latch circuit 40. This second
Is supplied to the pattern generating circuit 14 and slightly before the timing signal Ta supplied to the latch circuit 40, that is, the signal of the CRT 2 corresponding to the position on the screen 8 facing the optical sensor 10. It is set to a high level during a predetermined short period (part of the horizontal cycle) Tp (FIG. 11B) including the time when the position on the display screen is scanned by the electron beam.

The pattern generation circuit 14 includes a timing circuit 5
During the period when the second timing signal of No. 9 is at a high level, the luminance of the video signal is further increased. That is, the output of the pattern generation circuit 14 is normally (in the first embodiment and the like) shown in FIG.
As shown in FIG. 11A, the luminance signal is increased by one horizontal period (n-th horizontal period) of the vertical period. In the present embodiment, as shown in FIG. In the horizontal period, the luminance is further increased only in the above-described period Tp, and the luminance is suppressed to be relatively low in other periods.

The position on the screen facing the optical sensor 10 can be known once the mounting position of the optical sensor 10 is determined, and therefore can be known at the time of design. Therefore, when designing the timing circuit 59, a period during which the second timing signal is to be generated is obtained for the correction circuit 24, and the luminance of the video signal is increased as shown in FIG.

As a result of employing such a configuration, the output of the optical sensor 10 is further increased, and light can be reliably detected. In addition, since the brightness is reduced at a position that does not face the optical sensor 10, the screen of the CRT can be prevented from burning.

Embodiment 4 FIG. FIG. 12 shows the fourth embodiment. The timing circuit 60 of the device of this embodiment constantly monitors the output of the comparison circuit 36, and when the output of the comparison circuit 36 becomes logic 1, generates a timing signal immediately or after a predetermined delay time therefrom. Every time one vertical period elapses, the same timing signal is generated. When the output of the comparison circuit 36 becomes logic 0, the timing circuit 60 stops generating a timing signal.

The latch circuit 40 receives these timing signals and latches the output of the comparison circuit 36. The delay time by the timing circuit 60 is a short time, for example, 5 to 20 horizontal periods.

The operation for changing the correction value is the same as that described in the first embodiment with reference to FIG.

The operation for obtaining the ends Ib and Ic will be described below with reference to FIG. First, the output S of the comparison circuit
Waits for a logical 1 (301). This is performed by sampling the output of the comparison circuit at a cycle shorter than the vertical cycle. When S = 1, it waits for a predetermined time to elapse (302), and then the comparison circuit 36
Is latched (303). Then, it is determined whether the output of the latched comparison circuit is logic 1 (30).
4). If S = 1, the process returns to step 301. S =
When 1 is confirmed, the correction value I at that time is written into the end storage 46 as the end Ib (305). Then step 30
Wait for one vertical period to elapse from the latch of No. 3 (30
6) Latch the output of the comparison circuit 36 again (30)
7). It is determined whether the latched comparison result S is logic 1 (308). If it is logic 1, step 3
Return to 06. If it is not logic 1, a value obtained by subtracting ΔI from the correction value I at that time is written to the end memory 46 as the end Ic (309), and the operation is terminated.

When the ends Ib and Ic are obtained, the end storage section 46 is then processed in the same manner as described with reference to FIG.
An intermediate value is obtained based on the ends Ib and Ic written in
The optimum correction value Id is written into the optimum correction value storage unit 32.

As described above, in the fourth embodiment, the comparison circuit 3
Since the output of the comparison circuit 36 is latched a predetermined short delay time after the output of the comparator 6 becomes the logic 1, the output of the comparator 36 is latched.
There is no need to predict the time that the light spot will pass through the optical sensor 10. Note that the predetermined time in step 302 may be zero. In this case, S 301
As soon as = 1 is detected, the output of the comparison circuit is latched.

The temporary increase in luminance described in the third embodiment can be combined with the fourth embodiment.

Embodiment 5 FIG. 14 shows a part of the device of the fifth embodiment. The device of this embodiment has a smoothing circuit 64. The smoothing circuit 64 receives the output of the optical sensor 10 and performs smoothing. That is, the output of the optical sensor 10 indicated by a solid line R in FIG.
In FIG. 5, ascending and descending are changed to gentler ones as shown by a broken line U. The comparison circuit 36 receives the output U of the smoothing circuit 64 and compares it with a threshold value.

The timing circuit 66 is provided in the first embodiment.
The timing signal is generated at an arbitrary timing (determined by the convenience of other parts of the device) without being limited by the restrictions described in the above. The latch circuit 40 latches the output of the comparison circuit 36 when receiving the timing signal. Other operations are the same as in the first embodiment.

In this embodiment, since the smoothing circuit 64 is used, the output of the smoothing circuit 64 corresponding to the output of the optical sensor 10 is less reduced from the peak. Therefore, no matter what timing (phase within the vertical cycle) sampling is performed,
A sample value (comparison result) accurately corresponding to the peak value can be obtained (without controlling the timing). The temporary increase in luminance described in the third embodiment can be combined with the fifth embodiment.

[0067]

As described above, according to the present invention, it is possible to obtain a signal accurately corresponding to the amount of light incident on the optical sensor.

In particular, according to the first aspect of the present invention, the comparison result can be latched or sampled at a timing when the output of the optical sensor is close to the peak, and a signal accurately corresponding to the amount of light incident on the optical sensor can be obtained. Obtainable.

According to the second aspect of the present invention, sampling timing can be adjusted and optimized according to the result of actual use.

According to the third aspect of the present invention, sampling is performed when light is incident on the optical sensor, so that a signal accurately corresponding to the amount of light incident on the optical sensor can be obtained.

According to the fourth aspect of the present invention, a signal accurately corresponding to the amount of light incident on the optical sensor can be obtained without adjusting the timing.

According to the fifth aspect of the invention, the output of the optical sensor can be further increased, and the incidence of light can be reliably detected.

[Brief description of the drawings]

FIG. 1 is a schematic diagram showing a display device provided with a convergence adjusting device of the present invention.

FIG. 2 is a block diagram illustrating a correction value optimizing circuit according to the first embodiment;

FIG. 3 is a diagram illustrating an example of a convergence adjustment pattern.

FIG. 4 is a time chart showing a video signal for generating a convergence adjustment pattern and an output of an optical sensor.

FIG. 5 is a graph showing a relationship between a correction current value and an output of an optical sensor.

FIG. 6 is a flowchart illustrating an operation for changing a correction value according to the first embodiment;

FIG. 7 is a flowchart showing an operation for edge detection according to the first embodiment;

FIG. 8 is a flowchart illustrating an operation for obtaining an optimum correction value according to the first embodiment.

FIG. 9 is a block diagram showing a part of the device according to the second embodiment.

FIG. 10 is a block diagram showing a part of the device according to the third embodiment.

FIG. 11 is a time chart showing the operation of the third embodiment.

FIG. 12 is a block diagram showing a correction value optimizing circuit of the device according to the fourth embodiment.

FIG. 13 is a flowchart showing an operation of the correction value optimizing circuit according to the fourth embodiment.

FIG. 14 is a block diagram showing a part of the device according to the fifth embodiment.

FIG. 15 is a time chart showing the operation of the fifth embodiment.

[Explanation of symbols]

2 CRT, 8 screens, 10 optical sensors,
14 pattern generation circuit, 24 correction circuit, 26
Convergence yoke, 28 correction value optimization circuit,
32 optimum correction value storage unit, 36 comparison circuit, 3
8, 59, 60, 66 timing circuit, 40 latch circuit, 46 end storage unit, 52 microprocessor, 58 timing adjuster, 64 smoothing circuit.

Claims (5)

[Claims] 1. A pattern generating means for displaying a convergence adjustment pattern on a projection type display device using a CRT, and provided opposite to a screen of the display device, and a position on the opposed screen has high brightness. Sometimes, a current value of an optical sensor that detects this, and a correction circuit that supplies a correction current to the convergence yoke of the CRT are changed, and an optimum correction current value is obtained based on the output of the optical sensor. Correction value optimizing means for performing convergence adjustment by using the correction value optimizing means. The correction value optimizing means compares the output of the optical sensor with a threshold value and generates an output according to the comparison result. A timing circuit for generating a timing signal after a predetermined time has elapsed from the generation of the synchronization signal; and a timing signal from the timing circuit. A convergence adjusting device comprising: means for latching an output of the comparison circuit when a signal is generated; and means for obtaining the optimum correction current value based on the output of the latched comparison circuit. 2. The convergence adjusting device according to claim 1, further comprising a timing adjuster operable by an operator and adjusting a timing of generating a timing signal with respect to the timing circuit. 3. A pattern generating means for displaying a convergence adjustment pattern on a projection type display device using a CRT, and a pattern generation means provided to face the screen of the display device, and a position on the screen facing the screen has high brightness. Sometimes, a current value of an optical sensor that detects this, and a correction circuit that supplies a correction current to the convergence yoke of the CRT are changed, and an optimum correction current value is obtained based on the output of the optical sensor. Correction value optimizing means for performing convergence adjustment by using the correction value optimizing means, wherein the correction value optimizing means compares the output of the optical sensor with a threshold value, monitors the output of the comparison circuit, and monitors the output of the optical sensor. A timing circuit for generating a timing signal when the output becomes equal to or greater than the threshold value; A convergence adjustment device comprising: means for latching an output of the comparison circuit when a switching signal is generated; and means for obtaining the optimum correction current value based on the output of the latched comparison circuit. 4. A pattern generating means for displaying a convergence adjustment pattern on a projection type display device using a CRT, and provided opposite to a screen of the display device, and a position on the opposite screen has high brightness. Sometimes, a current value of an optical sensor that detects this, and a correction circuit that supplies a correction current to the convergence yoke of the CRT are changed, and an optimum correction current value is obtained based on the output of the optical sensor. Correction value optimizing means for performing convergence adjustment using the correction value optimizing means, the correction value optimizing means, a smoothing circuit for smoothing the output of the optical sensor, a comparison circuit for comparing the output of the smoothing circuit with a threshold value, Means for latching the output of the comparison circuit; and means for determining the optimum correction current value based on the output of the latched comparison circuit. Obtain convergence adjusting apparatus. 5. The display device according to claim 1, wherein the display device projects an image on the display screen of the CRT onto the screen, and the pattern generating means is configured to detect the position of the CRT corresponding to a position on the screen facing the optical sensor. 5. The convergence adjusting device according to claim 1, wherein the brightness of the video signal is increased when the position on the display screen is scanned by the electron beam.