JPH1131236A - Sorting method of polygon data and picture processor using the method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To inexpensively execute a high speed processing by sorting plural polygons where ridge lines cross on one scanning line in the direction of an X-axis on the scanning line with a specified position as a reference and sorting it with the Z-coordinate value as the reference. SOLUTION: When all the polygons are read into the active polygon list 103 of an inner cache memory by a control circuit 102 in picture plotting LSI, active data is transferred to the processing scanning line from the list and an active detection circuit 104 detects the ridge lines crossing the scanning line from top data of the polygon. When a polygon edge detection circuit 105 obtains the coordinate (X value) of a point where the ridge line and the scanning line cross, a scanning line X sorting circuit 107 sorts all the active polygons out the pertinent scanning line by notifying a left edge. Then, edge data are inputted to a scanning line Z sorting circuit 108 in the sorting order and only polygon data whose Z value is the smallest is transferred to a plotting block.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for sorting polygon data and an image processing apparatus using the same, and more particularly to a method for sorting polygon data which can reduce the memory capacity.

[0002]

2. Description of the Related Art Recent game machines consider a figure represented by three-dimensional coordinates as a polygonal surface, that is, a collection of polygons, in order to provide a sense of virtual reality.
The coordinates are converted into the coordinates of a display element having a two-dimensional display plane such as an RT and displayed.

FIG. 36 shows a schematic block diagram of an image display device for displaying such a three-dimensional image on a screen. FIG.
In, the overall functions of the image display device are controlled by the CPU 1 as control means. The CPU 1 writes data of a plurality of polygons forming the display object into the data buffer 2.

The polygon data is vertex data of a polygon, and includes tertiary dimension coordinates of each vertex in a predetermined three-dimensional space, vertex colors, texture map coordinate addresses, vertex transparency, vertex normal vectors, and the like.

The geometry section 3 reads vertex data and register functions of polygons from the data buffer 2 in accordance with the progress of the program and the processing speed of the CPU 1. Further, the geometry unit 3 arranges the polygons in the three-dimensional space based on the vertex coordinate data, determines a viewport to which region of the three-dimensional space is to be displayed, and calculates the brightness of each vertex based on the normal vector. Perform calculations, etc.

In addition, the vertices of a polygon that protrudes from the viewport are removed, that is, clipping is performed. Further, the polygons arranged in the viewport are projected on a two-dimensional plane with reference to a predetermined viewpoint, and coordinate conversion from three-dimensional to two-dimensional is performed.

[0007] The polygon data converted into two-dimensional coordinates is sent to the rendering unit 4. Rendering unit 4
Has a painting circuit, a texture pasting circuit, a sorting circuit, and the like (not shown).

The filling circuit calculates data of a pixel (pixel) within a range surrounded by each vertex of the polygon,
It has a function of passing data to each circuit in the other rendering unit 4. In the calculation for such a filling circuit, the data of the pixels between the vertices of the polygon are obtained by, for example, linear interpolation based on the data of the corresponding vertices, and similarly, the data of all the pixels are sequentially obtained.

The texture pasting circuit is a circuit that reads out texture data stored at an address corresponding to a texture map coordinate address of a pixel from the texture map 5 and calculates and calculates a color for each pixel.

Here, in such a game device, when displaying a polygon converted into two-dimensional plane coordinates, a polygon disposed below one of the overlapping opaque polygons is not displayed. Hidden surface processing is performed. For this hidden surface processing, the drawing order of polygons in the frame buffer memory 7 must be determined in consideration of the distance in the depth direction of the screen.

That is, polygon data is sorted based on the Z value stored in the depth buffer 6 at the time of drawing. For this purpose, there is a sorting circuit, which has a function of comparing the anteroposterior relationship of a plurality of polygons, rearranging the polygon data in the depth buffer 6 in the sorted order, and storing the sorted data.

When a new polygon is displayed at a position overlapping the previously drawn polygon on the screen, the Z value of each pixel constituting the new polygon and the value of the previously drawn polygon read from the depth buffer 6 are displayed. Compare with the Z value of the pixel.

If the result of the comparison is that the pixel of the new polygon is in the foreground (the Z value is small), this is overwritten in the frame buffer memory 7 and the data for one screen is sequentially stored in the frame buffer memory 7. . The data written in the frame buffer memory 7 is sequentially read and displayed on a display device 8 such as a CRT.

For such a purpose, a Z-sort method or the like is known as a simple and mainstream sorting method so far. In such a sorting method, all polygons are subjected to coordinate conversion, sorted, stored in the order of distance in the depth direction of the display screen, and stored.

Therefore, as a feature, it is necessary to convert the coordinates of all polygons for sorting and then temporarily store the converted data in a memory. A large-capacity memory area is separately required for storing the converted data.

Further, it is necessary to have a procedure for sorting all the converted data in order of the distance in the depth direction of the display screen. Therefore, there is a problem that it takes time for the sorting process. Therefore, such a general sort method is not suitable for use in a game device requiring high speed.
In particular, it is difficult to realize high-speed processing while realizing low cost.

Further, in the configuration example shown in FIG. 36, a depth buffer 6 for storing Z value data for one screen of polygons sorted by the sorting circuit is required.

[0018]

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a polygon data sorting method capable of reducing the capacity of the depth buffer 6, and an image processing apparatus using the same.

A further object of the present invention is to provide a method of sorting polygon data which enables a frame buffer memory as an external memory to be a line buffer having a capacity of one scanning line, thereby realizing a low cost. To provide an image processing apparatus using the same.

It is another object of the present invention to provide a polygon data sorting method for speeding up the writing of pixels to the line buffer in pixel units, and an image processing apparatus using the same.

[0021]

According to the present invention, there is provided a method of sorting polygon data, comprising the steps of: rendering a plurality of polygon data having three-dimensional coordinates by a plurality of scanning lines; Assuming a method of sorting polygon data for determining the drawing order of data in the buffer memory, a plurality of polygons whose ridges intersect on one scanning line are identified in the X-axis direction on this one scanning line. A first sorting step for sorting based on a position, and a second sorting for sorting based on Z coordinate values of a plurality of polygons whose edges intersect with the one scanning line, sorted by the first sorting step With steps.

Further, as one embodiment, in the above,
The specific position used as a reference for sorting in the first sorting step is the left end coordinate where the one scanning line intersects the left ridge line of the polygon, and the ridge line intersects one scanning line in the order of the size of the left end coordinate. A plurality of polygons to be sorted.

Further, as one aspect, the second sorting step further includes a second edge to be compared with a right end coordinate value of the first polygon data which is sorted first in the first sorting step. And comparing the left edge line of the polygon data with the left end coordinate value intersecting the one scanning line, and determining whether the one polygon data is a transparent polygon.

As another aspect, in the course of comparison in the second sorting step, it is determined that the left end coordinate value of the second polygon data is smaller than the right end coordinate value of the first polygon data. Until the case, the first polygon data is output.

Further, when it is determined that the left end coordinate value of the second polygon data is smaller than the right end coordinate value of the first polygon data, the right end coordinate value of the first polygon data is changed to the second coordinate data. It is characterized in that it is replaced with the left end coordinate value of the polygon data.

In one embodiment, the output first polygon data is output to a line buffer having a capacity of one scanning line in pixel units on the one scanning line.

As another aspect, in an image processing apparatus for drawing a plurality of polygon data having three-dimensional coordinates by a plurality of scanning lines, a polygon for determining a drawing order of the plurality of polygon data in a buffer memory. In the data sorting method, the plurality of polygon data is subjected to geometry conversion in frame units, and a polygon list is generated by linking the plurality of polygons based on a Y coordinate value of the converted polygon data. A list of polygons in which the edges of the polygons read out from each other intersect at each of the plurality of scanning lines is generated as an active polygon list, and for each scanning line in the active polygon list, the left edge of the active polygon is scanned. Sort based on the X coordinate value that intersects the line, and in that order To generate an active list that lists, reading the active polygon order listed in the active list, sorted by Z value of the active polygon, and obtaining the polygon to output data.

Further, as one aspect, the sorting based on the Z value of the active polygon is performed by comparing the right end coordinate value of the first polygon data which is ranked first in the active list with the rightmost coordinate value. This is executed by comparing the left edge line of the two polygon data with the left end coordinate value intersecting with the one scanning line and determining whether the one polygon data is a transparent polygon.

When it is determined that the left end coordinate value of the second polygon data is smaller than the right end coordinate value of the first polygon data, the right end coordinate value of the first polygon data is changed to the second polygon data. It is characterized in that it is replaced with the left end coordinate value of the data.

Further, the output first polygon data is output to a line buffer having a capacity of one scanning line in pixel units on the one scanning line.

An image processing apparatus for achieving the above object of the present invention is an image processing apparatus for rendering a plurality of polygon data having three-dimensional coordinates by a plurality of scanning lines, wherein a plurality of polygons whose ridge lines intersect on one scanning line are provided. A first sort processing unit that sorts in the X-axis direction on the one scan line, and Z coordinates of a plurality of polygons whose edges intersect the one scan line, sorted by the first sort processing unit. It is characterized by having a second sort processing unit for sorting based on the value, and a line buffer for storing polygon data for one scanning line generated by the sorting by the second sort processing unit.

Further, as one mode, the specific position used as a reference for sorting in the first sort processing section is a left end coordinate at which the one scanning line intersects a left ridge line of a polygon, and the size of the left end coordinate is In this order, a plurality of polygon data whose ridge lines intersect on the one scanning line are sorted.

In one embodiment, the second sort processing section has a register file having a plurality of words into which polygon data input in the order sorted by the first sort processing section is written. The right end coordinate value of the first polygon data previously written in the register file intersects with the one scan line of the left ridge line of the second polygon data newly input by the first sort processing unit. It is characterized by comparing the magnitude with the left end coordinate value and determining whether the one polygon data is a transparent polygon.

As another form, the register file includes: a left end coordinate value, a right end coordinate value, a Z axis coordinate value of the polygon data written in each word of the plurality of words on the one scanning line; Includes a region for indicating whether the word is transparent or not, and a region for the rightmost coordinate value and the Z-axis coordinate value of each word has a comparator for comparing the corresponding rightmost coordinate value and the Z-axis coordinate value of the input data. It is characterized by the following.

Further, as one mode, the first polygon data previously written in the register file, which is to be compared with the second polygon data newly input by the first sort processing unit, is: The plurality of words in the register file are sequentially verified, and when the n-th polygon data is opaque or the Z coordinate of the input data is smaller than the Z coordinate of the n-th polygon data, the n-th polygon data is It is characterized in that polygon data to be drawn on the one scanning line is created and output.

In another aspect, opaque polygon data among polygon data to be drawn on the one scanning line is generated and output to the line buffer, and thereafter, transparent data is generated. Is output to the line buffer.

Further objects and features of the present invention will become apparent from the embodiments of the present invention described below.

[0038]

Embodiments of the present invention will be described below with reference to the drawings. In the drawings, the same or similar components will be described with the same reference numerals or reference symbols.

FIG. 1 is a block diagram showing a configuration example of an image processing apparatus using a sorting method according to the present invention. In FIG. 1, a CPU serving as control means is passed through a CPU bus BS.
1. a work memory 2 having a data buffer function;
Image drawing LS for realizing the sorting method characterized by the present invention
I40 is connected.

The image drawing LSI 40 includes a texture memory 5 and a digital / analog conversion circuit 80 for outputting an image signal to a display device (not shown in FIG. 1).
Is connected.

The CPU bus BS further includes an input device and
An external device interface 10 such as an external memory for storing an application program is connected.

FIG. 2 is a detailed block diagram of the image drawing LSI 40 shown in FIG. The image drawing LSI 40 has a four-stage pipeline L0 to L3 as an internal module with a scanning line (hereinafter referred to as a scan line) as a basic unit. The configuration of the image drawing LSI 40 shown in FIG. 2 realizes the scan line three-dimensional sorting method, which is a feature of the present invention, and realizes the basic structure of hidden surface processing by the scan line method and the Z comparison by the Z sort method.

FIG. 3 is an operation flow of the scan line three-dimensional sorting method according to the present invention. The operation of the embodiment of FIGS. 1 and 2 will be described below in accordance with the operation flow of FIG.

"Three-dimensional to two-dimensional coordinate conversion" (step S
01) The CPU 1 or the geometry calculator in FIG. 1 moves and deforms a polygon having three-dimensional coordinates as necessary according to an application program, and performs a corresponding three-dimensional coordinate conversion. Further, perspective projection transformation is performed on the two-dimensional plane screen to convert the two-dimensional screen into two-dimensional coordinates. That is, the corresponding X and Y coordinates of each vertex of the polygon on the two-dimensional plane screen are calculated.

[Generation of External Polygon List (Y Sort)] (Step S02) Next, an external polygon list is generated. The external polygon list is generated in the work memory 2 and, as shown in FIG. 4, a PAT (polygon allocation table)
It has an area I and a data area II.

Step S01 in FIG. 3 and
The processing in step S02 is performed for each frame.

This external polygon list is first stored in the PAT
All the data in the area I are initialized to 0. PAT area I
Indicates the number of scan lines constituting one display screen, and indicates a link start position of a polygon starting from each scan line.

In the external polygon list generation processing, among the vertices of the above polygons, (Y
A vertex having the smallest axis value is selected, and the Y-axis value of the selected vertex is used as the scan line number of the polygon.

The generation of the external polygon list is performed in the following procedure. The PAT area I of the external polygon list corresponding to the relevant scan line number is read, and the last polygon of the currently registered relevant scan line is searched (if the PAT data is blank, no polygon exists in the relevant scan line). ).

Next, polygon data is written at an arbitrary position in the data area II. At this time, the link information includes a PAT area.
The link value read from I (the last last polygon position of the corresponding scan line) is written, and the position information of the polygon being processed (the head relative address / 20H) is written to the PAT area I.

The above processing is performed on all the polygons to complete the link information of the polygon corresponding to each scan line.

In the embodiment shown in FIG. 4, the contents of the completed external polygon list are the polygons shown in FIG.
Corresponds to the display image example. For example, address 0
28H, link information (220H / 20H) in the data area II to the polygon is registered.

Therefore, the link destination address (220H /
20H), link information (200H / 20H) in the data area II to the polygon and the contents of the polygon are registered as data.

In the link destination address (200H / 20H) in the data area II for the polygon, there is no further link destination in this line, and the contents of the polygon are registered as data.

The head address of the external polygon list generated in this manner is registered in the image drawing LSI 40 at the changing point of the frame (the unit of switching time of the display screen), and drawing is started.

[Active Polygon List (LSI Internal Polygon Cache)] (Step S03) As described above, the rendering process in the image rendering LSI 40 proceeds in units of scan lines. At the start of the scan line, all the corresponding polygons of the processing scan line are read from the external polygon list into the active polygon list of the internal cache memory 103 through the CPU interface 100 and the host interface 101 under the control of the polygon control circuit 102.

The reading method is as follows. The display example shown in FIG. 6 indicates that the line currently at the Y address 70 is the processing scan line. First, the corresponding scan line portion of the PAT area I for the processing scan line is read, and the polygon data at the link destination is read.

Further, the next polygon is read based on the link information in the data (see FIG. 4). All the read polygon data is stored in the internal cache memory 10
3 is stored in the active polygon list.

As shown in FIG. 7, the active polygon list secures a finite number and 512 pieces of polygon data being processed as an embodiment. All polygons span a continuous scan line. Therefore, once processed (read from the external polygon list),
As long as the processing is not completed, it is held so as to be used in the next scan line.

Next, the list area of the processed polygon is released. Thus, the polygon data once read is configured so as not to be read again. Therefore, the bus bottleneck of the external polygon list is greatly reduced, and high-speed processing can be expected.

However, since the number of polygons that can be processed for each scan line depends on the cache capacity, polygons are concentrated locally and the active polygon list is
When the overflow occurs, the image display is broken.

In order to prevent this, as an embodiment, a priority tag 113 is added to the polygon attribute. Priority tag 11
Reference numeral 3 denotes the priority of the polygon. When the overflow of the active polygon list is detected by the list tag 123, it is used to overwrite the polygon having the lower priority based on the priority tag 113.

The priority tag 113 is arbitrarily attached by the CPU 1 according to the importance of the polygon. Also, CP
Apart from the method of providing the priority tag by U1, the polygon acquisition control circuit 102 is provided with a function of detecting the size of the processing polygon, and the detected size is registered in the list tag 123. Then, when the size is equal to or larger than the designated size with reference to the list tag 123, it is possible to control to increase the priority.

With these methods, it is possible to reduce the probability that more important polygons are deleted, and to reduce the actual processing amount.

[Detection of active line] (Step S0)
4) Next, from the active polygon list of the internal cache memory 103, the data of the active polygon for the processing scan line
4 is transferred. The circuit 104 detects a ridge line crossing the scan line from the vertex data of the transferred polygon.

The vertex coordinates A (Xa, Ya), B shown in FIG.
Assuming a polygon having (Xb, Yb) and C (Xc, Yc), a ridge line intersecting with the scan line YL is detected from the vertex data (A, B, C). In this example, A
-B, CA are ridge lines that intersect.

The detection of the ridge line intersecting with the scan line is executed in the active line detection circuit 104 by the following logic.

[0068]

(Equation 1)

Next, the polygon edge detection circuit 105 obtains the point where the relevant ridge line and the scan line intersect, that is, the coordinates (only the X value) of the edge point. The calculation of the coordinate values in the circuit 105 is performed using an equation derived from the following linear equation.

[0070]

(Equation 2)

Two coordinates (X values) intersecting the scan line with the two ridge lines are compared. The smaller coordinate value is stored in the active edge list 106 as XL and the larger coordinate value as XR. The active edge list 106 is a buffer for storing intersections XL and XR with a scan line as edge data for left and right, using the storage location of the active polygon list in the internal cache 103 as an address.

[Scan Line X Sort] (Step S
05) The scan line X sort circuit 107 sorts all active polygons on the corresponding scan line from the edge data stored in the active edge list 106, focusing on the left edge XL.

The sorting method is as follows.
Consider the display image as shown in FIG. FIG.
Is a diagram schematically illustrating the scan line X sort circuit 107, which is configured to include a comparator 117 and a register 127 with a shifter function corresponding to 512 word areas. (1) First, all the contents of the register 127 of the scan line X sort circuit 107 are initialized to the maximum value. (2) Next, the left edge of the input polygon input from the active edge list 106 is compared with all of the registers 127. As an example, there are three left edges of the input polygon on the processing line in the display image of FIG. Therefore, these are input in order. (3) Then, a boundary between a value larger than the input left edge data and a value smaller than the input left edge data is detected. (4) Large values are all shifted to larger values. A small value is left as it is. (5) Store the left edge data of the input polygon in the register at the shifted boundary position. (6) The above processes (1) to (5) are executed for all the active polygons (for the processing lines of the display image in FIG. 9, three active polygons. Then, the change point of the scan line (the scan line is switched). At the time), the contents of the scan line X sort circuit 107 are
The data is transferred to the two-line scan line Z sort circuit 108.

As described above, by performing the scan line X sorting, polygons are ranked in the X direction for each processing line, and an active polygon can be determined in a scan line Z sorting embodiment described below.

[Scanline Z Sort] (Step S
06) The detailed configuration and operation of the scan line Z sort circuit 108 will be described later again. First, the operation outline will be described based on the display image shown in FIG.

FIGS. 12 to 17 are state diagrams of the registers of the scan line Z sort circuit 108 in the process of processing corresponding to the display image of FIG.

First, in initialization, scan line Z
The maximum Z value (the value located at the innermost position) is stored in all the registers of the sort circuit 108 (see FIG. 12).

Next, the scan line X sort circuit 10
At 7, the polygon edge data is newly input to the scan line Z sort circuit 108 in the sorted order (FIG. 13).

In the processing line of FIG. 11, polygons have the left edge at the leftmost end and are sorted in order 1. Therefore, in FIG. 13, the Z value of the input polygon is compared with the initially set maximum value. Since the Z value of the polygon is smaller, the Z value of the polygon and its right end value are stored in the first register. In addition, the left end value and the right end value of the polygon are held in the holding register.

Next, in the corresponding processing line of the display image of FIG. 11, data of a polygon whose left edge is sorted in order 2 is input (FIG. 14). The Z value of the polygon is larger than the Z value of the polygon and smaller than the initially set maximum value. Therefore, as shown in FIG. 14, the polygon data is arranged below the polygon data, and the subsequent initial value data is sequentially shifted downward. At this time, the left end value and the right end value of the polygon are held as they are.

Here, the scan line X sort circuit 10
As shown in FIG. 15, the data output from 7 is polygon data until the timing at which the data of the polygon whose left end value is sorted into rank 3 is input.

In FIG. 16, data of a polygon whose left end value is the lowest in the processing line is input. Then, the Z value of the polygon is compared with the Z value of the polygon already registered in the register. Since the Z value of the polygon is the minimum, the register value is sequentially shifted downward as shown in FIG.
The value and the rightmost value are set at the top of the register.

Accordingly, as shown in FIG. 17, polygon data is output while the scan line reaches the right end value of the polygon. Then, the data of the polygon is erased by sequentially shifting the value of the register upward, and then the polygon data is erased in the order of the polygon and the polygon.

As described above, the scan line Z sorting circuit 108 transfers only the foremost (smallest Z value) polygon (opaque polygon) data to the L1 line drawing block while sorting the Z values of the polygons. . Therefore, the scan line Z sort circuit 108 does not output data redundantly when polygons overlap.

The above description is based on the display image of FIG. 11.
The procedure of the sorting process (step S06) is summarized as follows. (1) The scan line Z sort circuit 108 has substantially the same configuration as the scan line X sort circuit 107,
It has a comparison circuit and a Z value register for storing a Z value with a shifter function and a left end value. At the time of initialization, all the Z value registers are set to the maximum Z value. (2) In the Z sorting process, new polygon data is transferred from the scan line X sort circuit 107. (3) For the transferred new polygon,
Detects which of the above conditions applies. State a is a state in which there is no polygon data in the buffer of the scan line Z sort circuit 108 and only new polygons are transferred. State b is a state in which the new polygon intersects the frontmost polygon of the buffer at the front. State c is a state in which the new polygon intersects the forefront of the buffer on the back. State d is a state in which the new polygon does not intersect the forefront of the buffer. (4) In the case of the state a: Both end values of the new transfer polygon are stored in the left position holding buffer and the right position holding buffer of the scan line Z sort circuit 108, and the buffer store processing (the processing after (5) and thereafter) is performed. (See FIG. 12).

In the case of state b: This corresponds to the relationship with the polygon in FIG. The frontmost polygon of the buffer is output, and the Z sort buffer is shifted to the rear. As the attributes of the output polygon, the value of the left holding buffer is transferred to the left position, and the left end value of the new polygon is transferred to the right position. Further, both end values of the new polygon are stored in the left position holding buffer and the right position holding buffer, and the process proceeds to the buffer storing process.

In the case of state c: This corresponds to the relationship with the polygon on the processing line in FIG. Move on to buffer store processing.

In the state d: the frontmost polygon in the buffer is output, and the Z sort buffer is shifted to the front.
As attributes of the output polygon, the value of the left position holding buffer is transferred to the left position, and the right end value of the output polygon is transferred to the right position. Further, the output polygon is stored in the left position holding buffer. (5) As a buffer store process, i) compare the Z value of the input polygon with all the Z values. ii) Detect a boundary between a value larger than the input Z value and a smaller value. iii) All large values are shifted to larger values, while smaller values remain unchanged. iv) Store the input polygon Z value in the register of the boundary. (6) The above (2) to (5) are executed for all transfer polygons.

[Pixel Drawing] (Step S07) Next, pixel drawing processing is performed on a pixel-by-pixel basis with respect to the polygon on which hidden surface processing has been completed by the scan line Z sort circuit 108.

The rendering data calculator 109 sequentially calculates an interpolation value such as a texture address and a shading count for each pixel. As a method of calculating an interpolation value, first, an interpolation value at the left and right edges of each coefficient is calculated, and an interpolation value of a drawing pixel is calculated from both edge interpolation values.

At this time, the following expression derived from the following linear equation is used as the arithmetic expression for calculating the interpolation value. When the left ridge is between vertices AB and the right ridge is between vertices AC, the symbol is:
This corresponds to the symbols shown in FIGS.

FIG. 19 shows three vertices A (Xa, Ya), B
20 is a display image of a polygon having (Xb, Yb) and C (Xc, Yc). FIG. 20 shows a texture map stored in the texture memory 5.

[0093]

(Equation 3)

[Obtain Texture Data] (Step S0)
8) The color data is acquired from the texture memory 5 by the texture address shown in FIG. The bitmap synthesizing circuit 110 corrects the acquired color data with a glow coefficient shown in FIG. The output is output to the corrected line buffer 112.

The correction equation at this time is as follows.

Display RGB Each Luminance = Acquired Color Data Each Luminance + Guro Coefficient [Line Buffer Store] (Step S09) Next, as the processing of the L0 line, the completed pixel data is written into the line buffer 112. In the case of translucent data, the data is read once from the corresponding position in the line buffer 112, and is written after being combined. As will be described later, in the scan line Z sorting process, by ensuring a translucent Z value mutual relationship, no data breakdown occurs. At this time, the combining operation expression follows the following expression.

Display RGB each luminance = ｛pixel luminance X (2
56−transparency) + underlay luminance X and transparency｝ / 256 Here, the scan line Z sorting process (step S
In the description of 06), it has been described that the sort target polygon is considered to be an opaque polygon. Accordingly, a specific embodiment of the scan line Z sort circuit 108 will be further described below, including the handling of translucent polygons.

FIG. 21 shows a scan line Z sort circuit 1.
08 is a block diagram of a configuration example 08. FIG. 21 is a state transition diagram of FIG. Scan line Z sort circuit 108
Are the register file 410 and the register file 41
A selection output circuit 411 is provided for sequentially selecting and outputting one of the upper 33 data of 0. Select output circuit 41
The order of sequentially selecting and outputting from 1 is set by the Z counter 412.

The polygon data is input to the register file 410 in the order in which the polygons are ranked on the scan lines from the scan line X sort circuit 107. The output from the register file 410 is guided to the selection output circuit 411.

When the data output from the selection output circuit 411 is opaque polygon data, the data is input to the output buffer 413. Further, when the output data from the selection output circuit 411 is data of a translucent polygon, the data is input to the stack register 414.

The data read from the output buffer 413 and the stack register 414 is output to the output selector 41.
7 and is input to the drawing data calculator 109 on the L1 line in FIG.

When data is written to or read from the stack register 414, the T counter 415 is incremented or decremented. When the value of the T counter 415 is “1” or more, data is read from the stack register 414 and sent to the output selector 417.

In FIG. 21, the controller 416
This is a control circuit for controlling each block of the scan line Z sort circuit 108. The state transition of the scan line Z sort circuit 108 having the configuration shown in FIG.
This will be described below.

First, an initial state is set (INIT
IAL). Next, the process waits for input of data from the scan line X sort circuit 107 to the register file 410 (step ST1). Further, unnecessary data in the register file 410 is deleted (step ST).
2). Thereafter, the initial value of the Z counter 412 is determined (step ST3).

Next, the scan line X sort circuit 10
Then, output data is created based on the input data from Step 7 (Step ST4). Further, a transition is made to the storage of the created data in the output buffer 413, the shift operation of the register file 410 and the data write state, and the output state from the output buffer 413 to the output selector 417 (step ST5).

Next, a transition is made to writing to stack register 414 (step ST6) and reading of stack data (step ST7).

Here, the operation of scan line Z sort circuit 108 executed by the state transition of FIG. 22 will be described with reference to FIG.
3 will be described.

In FIG. 23, consider the polygons A and B on the scan line S. The X-axis coordinate at the left end crossing the scan line S of the polygon A is XLa, and the X-axis coordinate at the right end is XRa. On the other hand, polygon B
The X-axis coordinate at the left end crossing the scanning line S is XLb,
The X coordinate on the right end is XRb.

The above polygon A and polygon B are shown in FIG.
As shown in the figure, the right end XRb of the polygon A and the left end XLb of the polygon B overlap each other. The scan line Z sort circuit 108 is based on the X-axis coordinates of the polygons A and B on the scan line S and sent from the scan line X sort circuit 107, and is a polygon A having a small X coordinate value at the left end.
And the X coordinate XRa at the left end of the polygon B
Compare Lb.

As a result of the comparison, it is determined that the X-coordinates XRa and XLb overlap each other. Further, the Z-axis coordinates of polygon A and polygon B are compared. As a result, polygon B
Is smaller than that of the polygon A and can be determined to be on the viewpoint side of the observer.

In this case, the scan line Z sort circuit 1
In step 08, the X coordinate value of the right end of the polygon A is changed to X'Ra equal to XLb, and the display range (output data) of the polygon A on the scan line S is determined as the range indicated by the double arrow in FIG.

FIG. 24 shows the register file 41 of FIG.
0 is a configuration example. Right coordinate R value (12 bits), Z value (16 bits), attribute bit AT (4 bits), opaque / semi-transparent bit T value (1 bit), and texture map address AD for a total of 128 words for 128 words It is the size to have.

Further, 0 to 32 words out of 128 words have the left coordinate L value (12 bits). The comparator C is provided for each word in order to compare the R value and the Z value with the input value. The output data is the output value of the comparator C and the opaque / translucent bit T
It is determined as in the following example depending on the relationship between the combinations of values.

That is, FIG. 25 is a diagram showing the relationship between the output of the comparator C for the R value and the Z value and the combination of the opaque / semi-transparent bit T value. In FIG. 25, STRPn is
This is an opaque / translucent bit T value. When STRPn = 0, opaque, and when STRPn = 1, translucent.

Further, FLAGRn is an R value comparator C
And when FLAGRn = 1, the input data L
This is a case where the range of the coordinate value and the range of the R coordinate value of the register data do not overlap, and when FLAGRn = 0, the input data L
Whether the range of the coordinate value and the R coordinate value of the register data overlap,
Or if they match.

FLAGZn is the output of the comparator C for Z value. When FLAGZn = 1, the Z coordinate of the input data is larger than the Z coordinate value of the register data.
When FLAGZn = 0, the Z coordinate value of the input data is smaller than or equal to the Z coordinate value of the register data.

As described above, in FIG. 24, the register file 410 contains the scan line X sort circuit 107.
, Are sequentially transmitted as input data, and are compared by the comparator C with the previously processed data stored in the register file 410, thereby obtaining FLAGRn and FLAGZn.

FIG. 26 is a diagram for explaining the determination of the initial value of the Z counter 412 indicating the output start word. The controller 416 of the scan line Z sort circuit 108 in FIG. 21 first determines which word to output from.

The controller 416 performs verification in order from the 0th word, and the nth is opaque (STRPn = 0) or
If the input data is up (FLAGZn = 0), the initial value of the Z counter 412 is determined so that the n-th becomes the output start word.

In FIGS. 26A and 26B, broken lines represent translucent polygons, and solid lines represent opaque polygons. Therefore, in the example of FIG.
Since word 2 written in 10 is opaque for the first time, scan line Z sort circuit 108
Starts the data creation work.

In the example of FIG. 26B, since there is opaque input data on the semi-transparent word 4, the data creation operation starts from word 4.

In the drawings corresponding to the following embodiments, broken lines represent translucent polygons and solid lines represent opaque polygons.

In the example shown in FIG. 27, the Z value of input data b is smaller than the Z value of data a of the output candidate register, and the L value of input data b is smaller than that of the output candidate register which is the n-th register. The relationship is smaller than the R value of the data a. Further, there is a case where the data a of the output candidate register is opaque.

Therefore, the example of FIG. 27 matches pattern 1 in relation to FIG. In such a case, the left end coordinate L outputs the n-th value of the register file 410 and the right end coordinate R outputs the left end coordinate of the input data b as the output data c.

After outputting the output data c, the R value of the right end coordinate of the output buffer 413 is stored in the register file 410.
Is written to the left end coordinates L of all the nth and subsequent data.

Next, the example of FIG.
This is a case where the value is larger than the register data a, and matches the pattern 2 in the relationship of FIG. In such cases,
Only the input data b is stored in the register file 410, and no data is output.

In the example of FIG. 29, the Z value of the input data b is smaller than the register data b, but does not overlap with the register data a. This example is based on the relationship of FIG.
Matches pattern 3. In such a case, the left end coordinate L is
The L value of the register data a is output, and the right end coordinate R outputs the R value of the register data a.

After the output, the output buffer 41
3 is written to the nth and subsequent L values of the data in the register file 410. Further, the register file 410
Are shifted in the register 0 direction after n + 1. Output data is created for the new n-th data after the shift.

FIG. 30 shows an example in which the input data b has a larger Z value than the register data a and does not overlap.
In this case, the processing is performed in the same manner as in the example of FIG.

FIG. 31 shows a case where the input data b overlaps the register data a, but the register data a is translucent. Therefore, it corresponds to pattern 4 in FIG.
The basic processing contents in this case are the same as those in the example of FIG. 27, but the translucent output data c is written not in the output buffer 413 but in the stack register 414. Further, the R value of the stack register 414 is stored in the file register 410.
To the n-th L value of
Create output data.

FIG. 32 shows a case where the input data b has a larger Z value than the register data a in the example of FIG. In this case, the output data is not created, and the initial value of the Z counter 412 is reset.

Further, the basic processing of the example of FIG.
9, the translucent output data is written to the stack register 414 instead of the output buffer 413, as in the example of FIG.

FIG. 34 shows a case where the input data b has a larger Z value than the register data a in the example of FIG. In this case, the initial value of the Z counter 412 is reset without generating the output data.

When the translucent output data is written to the stack 414 as in the examples of FIGS.
The translucent counter (TCNT) 415 advances by one.
Therefore, when the count value of the translucent counter 415 is 1 or more, it indicates that translucent data exists in the stack 414.

After the opaque data is output from the output buffer 413, if the count value of the translucent counter 415 is 1 or more, the translucent data is stored in the stack register 414.
Output from FIG. 35 is a diagram illustrating an example of the state of the stack register 414. It has a capacity of 33 words, and translucent output data is sequentially written. Also, translucent output data is read in the reverse direction. One by one translucent counter 415 corresponding to writing and reading of this translucent output data.
Is incremented and decremented.

As described above, in the scan line Z sort circuit 108, the basic relationship between the register data a and the input data b of the register file 410 is summarized into eight patterns. Output data is determined corresponding to these eight patterns.

Further, the scan line Z sort circuit 10
The output data from 8 is stored in the line buffer 42. The line buffer 42 has a capacity for one scanning line, and the circuit scale can be reduced in the configuration of FIG. 36 as compared with a configuration that requires one frame.

[0138]

According to the present invention, as described above with reference to the drawings, the sorting process is performed in units of scan lines. Further, the result of the sorting process is stored in the line buffer.

Therefore, in the present invention, it is possible to reduce the frame buffer as an external memory in principle. Furthermore, since one polygon is selected for one pixel for writing to the line buffer, it is not necessary to perform a pixel overwrite process on opaque polygon data. As a result, the speed can be increased.

The embodiments described with reference to the drawings are for understanding the present invention, and the scope of protection of the present invention is not limited thereto. The scope of protection of the present invention is defined by the appended claims, and the scope of protection of the present invention includes equivalents of the claims.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration example of an image processing apparatus using a sorting method according to the present invention.

FIG. 2 is a block diagram of an embodiment of the image drawing LSI 30 in FIG.

FIG. 3 is an operation flow of the image processing apparatus of FIG. 1;

FIG. 4 is a diagram illustrating an example of the polygon list in FIG. 2;

FIG. 5 is an example of a display image of polygons.

FIG. 6 is a display example showing that a line at a Y address 70 is a processing scan line.

FIG. 7 is a diagram illustrating an example of an active polygon list.

FIG. 8 shows vertex coordinates A (Xa, Ya) and B (Xb, Y).
FIG. 4B is a diagram illustrating a polygon having C (Xc, Yc).

FIG. 9 is a display image diagram illustrating scan line X sort processing.

FIG. 10 is a diagram schematically showing a scan line X sort circuit 107;

FIG. 11 is a display image diagram illustrating a scan line Z sort process.

12 is a state diagram (at initialization) of a register of the scan line Z sort circuit in a process corresponding to the display image of FIG. 11;

13 is a state diagram of a register of the scan line Z sort circuit in the process of processing corresponding to the display image of FIG. 11 (when a polygon is input).

14 is a state diagram of a register of the scan line Z sort circuit 108 (when a polygon is input) in the process of processing corresponding to the display image of FIG.

FIG. 15 is a state diagram of a register of the scan line Z sort circuit in the process of processing corresponding to the display image of FIG. 11 (when polygons are output).

FIG. 16 is a state diagram of a register of the scan line Z sort circuit in the process of processing corresponding to the display image of FIG. 11 (when polygons are input).

17 is a state diagram of a register of the scan line Z sort circuit in the process of processing corresponding to the display image of FIG. 11 (when outputting a polygon).

FIG. 18 is a diagram illustrating a relationship between polygon data in a buffer of a scan line Z sort circuit and new input data.

FIG. 19 shows three vertices A (Xa, Ya) and B (Xb, Y).
b) and a display image of a polygon having C (Xc, Yc).

FIG. 20 is a diagram showing a texture map stored in a texture memory 5;

FIG. 21 shows a scan line Z sort circuit 1 according to the present invention.
08 is a block diagram of a configuration example 08.

22 is a scan line Z sort circuit 108 shown in FIG. 21.
3 is a state transition diagram of FIG.

23 is a diagram illustrating the basic principle of the operation of the scan line Z sort circuit executed by the state transition of FIG.

FIG. 24 is a configuration example of a register file 410 of FIG. 21;

FIG. 25 is a diagram illustrating a relationship between an output of an R value and a Z value comparator C and a combination of an opaque / translucent bit T value.

FIG. 26 is a diagram for describing determination of output start word data (initial value of Z counter 412).

FIG. 27 is an example corresponding to pattern 1 in the relationship of FIG.

FIG. 28 is an example corresponding to pattern 2 in the relationship of FIG.

FIG. 29 is an embodiment corresponding to pattern 3 in the relationship of FIG.

FIG. 30 is an embodiment corresponding to pattern 4 in the relationship of FIG.

FIG. 31 is an embodiment corresponding to pattern 5 in the relationship of FIG.

FIG. 32 is an embodiment corresponding to pattern 6 in the relationship of FIG.

FIG. 33 is an embodiment corresponding to pattern 7 in the relationship of FIG.

FIG. 34 is an embodiment corresponding to pattern 8 in the relationship of FIG.

FIG. 35 is a diagram illustrating a state example of a stack register 414;

FIG. 36 is a schematic configuration block diagram of an image display device that displays a three-dimensional image on a screen.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 CPU 2 Work memory 3 Geometry part 40 Image drawing LSI 107 Scan line X sort processing part 108 Scan line Z sort processing part 5 Texture map 410 Register file 411 Selection output circuit 412 Z counter 413 Output buffer 414 Stack register 415 T counter 416 Controller 417 Output selector

Claims (16)

[Claims] 1. An image processing apparatus for rendering a plurality of polygon data having three-dimensional coordinates by a plurality of scanning lines.
A polygon data sorting method for determining a rendering order of the plurality of polygon data in a buffer memory, wherein a plurality of polygons whose ridge lines intersect on one scan line are arranged in the X-axis direction on the one scan line. A first sorting step of sorting on the basis of the specific position, and a second sorting on the basis of Z coordinate values of a plurality of polygons whose edges intersect with the one scanning line, sorted by the first sorting step. A sorting method for polygon data, comprising: 2. The method according to claim 1, wherein the specific position used as a reference for sorting in the first sorting step is a left end coordinate at which the one scanning line intersects a left ridge line of a polygon. Sorting a plurality of polygons whose ridge lines intersect on said one scanning line in the following order: 3. The method according to claim 2, wherein the second sorting step further includes a step of comparing the right end coordinate value of the first polygon data which is sorted first by the first sorting step with the right end coordinate value. Sorting the polygon data by comparing the left edge of the second polygon data with the left end coordinate value intersecting the one scanning line and determining whether the one polygon data is a transparent polygon. Method. 4. The method according to claim 3, wherein the left end coordinate value of the second polygon data is determined to be smaller than the right end coordinate value of the first polygon data in the comparison process of the second sorting step. Outputting the first polygon data until the case. 5. The method according to claim 4, wherein when it is determined that the left end coordinate value of the second polygon data is smaller than the right end coordinate value of the first polygon data, the right end coordinate value of the first polygon data is changed. A polygon data sorting method, wherein the polygon data is replaced with a left end coordinate value of the second polygon data. 6. The polygon according to claim 4, wherein the output first polygon data is output to a line buffer having a capacity of one scanning line in pixel units on the one scanning line. How to sort the data. 7. An image processing apparatus for rendering a plurality of polygon data having three-dimensional coordinates by a plurality of scanning lines.
In a polygon data sorting method for determining a rendering order of the plurality of polygon data in a buffer memory, the plurality of polygon data is subjected to a geometry conversion in frame units, and a Y coordinate value of the geometry-converted polygon data is used as a reference. Generating a polygon list in which the plurality of polygons are linked, and generating, as an active polygon list, a list of polygons in which the edges of the polygons read from the polygon list intersect at each of the plurality of scanning lines; For each scanning line in the active polygon list, the active polygon is sorted on the basis of the X coordinate value at which the left ridge line intersects the scanning line to generate an active list listing the order, and the active list is listed in the active list. The active polygon is read out in the order And sorted on the Z value of the polygon, sorting the polygon data and obtains the polygon to output data. 8. The method according to claim 7, wherein the sorting based on the Z values of the active polygons comprises:
The right end coordinate value of the first polygon data whose order listed in the active list is first, and the left end coordinate value of the second polygon data to be compared, which intersects with the one scanning line of the left ridge line, A method for sorting polygon data, wherein the method is performed by comparing and determining whether the one polygon data is a transparent polygon. 9. The method according to claim 8, wherein when it is determined that the left end coordinate value of the second polygon data is smaller than the right end coordinate value of the first polygon data, the right end coordinate value of the first polygon data is changed. A polygon data sorting method, wherein the polygon data is replaced with a left end coordinate value of the second polygon data. 10. The polygon according to claim 7, wherein the output first polygon data is output to a line buffer having a capacity of one scanning line in pixel units on the one scanning line. How to sort the data. 11. An image processing apparatus for rendering a plurality of polygon data having three-dimensional coordinates by a plurality of scanning lines, wherein a plurality of polygons whose ridge lines intersect on one scanning line are drawn in the X-axis direction on the one scanning line. A first sort processing unit that sorts a plurality of polygons whose edges intersect with the one scanning line, the second sort processing being performed based on Z coordinate values sorted by the first sort processing unit And a line buffer for storing polygon data for one scanning line generated by the sorting by the second sort processing unit. 12. The method according to claim 11, wherein the specific position used as a reference for sorting in the first sort processing section is a left end coordinate at which the one scanning line intersects a left ridge line of a polygon, and the size of the left end coordinate is An image processing apparatus, which sorts a plurality of pieces of polygon data whose ridge lines intersect on the one scanning line in the order of the order. 13. The system according to claim 12, wherein the second sort processing unit has a register file having a plurality of words into which polygon data input in the order sorted by the first sort processing unit is written. The right end coordinate value of the first polygon data previously written in the register file intersects with the one scan line of the left ridge line of the second polygon data newly input by the first sort processing unit. An image processing apparatus for comparing the magnitude of the left end coordinate value with the left end coordinate value and determining whether the one polygon data is a transparent polygon. 14. The register file according to claim 13, wherein said register file includes a left end coordinate value, a right end coordinate value, a Z axis coordinate value of said polygon data written on each word of said plurality of words on said one scanning line. A region for indicating whether the data is transparent or not, and a region for the rightmost coordinate value and the Z-axis coordinate value of each word include a comparator for comparing the corresponding rightmost coordinate value and the Z-axis coordinate value of the input data. An image processing apparatus comprising: 15. The first polygon data written in the register file, wherein the first polygon data to be compared with the second polygon data newly input by the first sort processing unit is: The plurality of words in the register file are sequentially verified, and when the n-th polygon data is opaque or the Z coordinate of the input data is smaller than the Z coordinate of the n-th polygon data, the n-th polygon data is An image processing apparatus for generating and outputting polygon data to be drawn on the one scanning line. 16. The polygon buffer according to claim 15, wherein opaque polygon data of polygon data to be drawn on said one scanning line is first outputted to said line buffer, and thereafter, transparent polygon data is outputted. An image processing apparatus for outputting the polygon data of (a) to the line buffer.