JPH11308060A - Amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high frequency amplifier for microwave and millimeter wave bands which has increased stability and prevents parasitic oscillation, etc., from occurring. SOLUTION: This device consists of a high frequency transistor 1, a bias supplying circuit 10 that comprises a 1st resistor 101 connected to the gate of the high frequency transistor, a 1st distributed constant line 103 which is connected to the other end of the 1st resistance and has λ/4 electric length and a 2nd distributed constant line 102 which short-circuits the 1st resistor for a required high frequency and supplies a bias to the gate of the transistor 1, a 2nd bias supplying circuit 9 which supplies a bias to the drain of the transistor 1 that is constituted of a 3rd distributed constant line 91 and has λ/4 electric length, and the other terminal of the lines 103 and 91 are provided with a voltage input terminal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency circuit used for a communication device in a microwave or millimeter-wave band, and more particularly to a circuit that sufficiently exhibits the circuit performance of an amplifier.

[0002]

2. Description of the Related Art In microwave circuits and millimeter wave circuits, GaAs is used.
A high-frequency amplifier is formed by a high-frequency amplifying element such as a FET and an input / output matching circuit, and a plurality of these are connected to amplify in multiple stages to obtain a required gain. Hereinafter, the configuration and operation of a conventional high-frequency amplifier will be described.

FIG. 9 is a circuit diagram of a conventional one-stage amplifier.
This is a case where a GaAs FET is used as an amplification element. In FIG. 9, a conventional one-stage amplifier circuit includes an input matching circuit 2 and a GaAs
FET (hereinafter referred to as transistor 1) and output matching circuit 3
And a gate bias supply circuit 8 for supplying a voltage to the gate of the transistor 1 and a drain bias supply circuit 9 for supplying a voltage to the drain of the transistor 1.

FIG. 9 also shows a signal input terminal 4, a signal output terminal 5, a gate voltage input terminal 6, and a drain voltage input terminal 7.

The gate bias supply circuit 8 includes a distributed constant line 81 connected to the gate of the transistor 1 and having an electrical length of λ / 4, a capacitor 84 for grounding the λ / 4 distributed constant line 81 at high frequency, Transistor 1 in low frequency region
Resistor 82 and high-frequency coil for stable operation
83 and a resistor 85 and a capacitor 86 in parallel with a capacitor 84 to suppress parasitic oscillation at a low frequency.

The drain bias supply circuit 9 has an electrical length connected to the drain of the transistor 1 of λ /
4, a distributed constant line 91, a capacitor 94 for grounding the λ / 4 distributed constant line 91 at high frequency, a high frequency coil 93,
Capacitors to further suppress low-frequency parasitic oscillations
It is composed of a resistor 95 and a capacitor 96 in parallel with 94.

In the conventional amplifier circuit having such a configuration, when a high-frequency signal is input to the input terminal 4, it is transmitted to the gate of the transistor 1 without causing reflection due to conjugate matching of the input matching circuit 2. The transistor 1 performs an amplifying operation of a high-frequency signal at an operating point determined by the gate bias supply circuit 8 and the drain bias circuit 9.

The high-frequency signal output from the drain of the transistor 1 is output from the signal output terminal 5 without reflection due to conjugate matching of the output matching circuit 3.

In this case, the bias supply circuit 8 (see FIG. 10) and the bias supply circuit 9 are set so that the impedances of the capacitors 84 and 94 are close to zero in the high frequency region, so that the distributed constant line 81 at the required frequency is provided.
And 91 can be regarded as short-circuited at one end, so that λ /
The impedance of the four distributed constant lines 81 and 91 becomes infinite. Therefore, the bias supply circuit hardly affects the input / output matching circuit.

FIGS. 11 (a) and 11 (b) show an example of the S-parameter and the pass characteristic as seen from the main line as shown in FIG. 10 when the constant of the gate bias supply circuit 8 is set to a required frequency f ₀ of 25 GHz. It is a thing. As is clear from FIGS. 11A and 11B, at the required frequency f ₀ = 25 GHz, the impedance of the gate bias supply circuit 8 becomes almost infinite, and the attenuation of the passing characteristic is close to zero.

A resistor 85 and a capacitor 86 and a resistor 95 and a capacitor 96 connected to suppress parasitic oscillation are provided.
Operates to attenuate signals in the low frequency band.

[0012]

In such a conventional high-frequency amplifier circuit configuration, when the gain of the transistor 1 is large or the parasitic capacitance is large, the stability coefficient K obtained from the S parameter of the amplifier is small. It may be smaller than 1 at the required frequency. FIG. 12A shows an example of the pass characteristic at this time, and FIG.
It is shown in (b). In this case, as the input / output matching is performed by the input matching circuit 2 and the output matching circuit 3, the gain increases, and the reverse gain also increases. This causes the stability coefficient K to become smaller than 1 and the instability to increase.
There is a problem that parasitic oscillation occurs at a required frequency.

In recent years, the performance of the high-frequency amplifier has been improved, so that the gain per stage of the amplifier has been increased, and it has become necessary to stably operate the amplifier.

An object of the present invention is to solve the above-mentioned problems and to provide a microwave and millimeter-wave band amplification device which increases the stability of a high-frequency amplifier and does not cause parasitic oscillation or the like. And

[0015]

In order to achieve the above object, an amplifying apparatus according to the present invention comprises a high-frequency transistor, a first resistor connected to a gate of the high-frequency transistor, and a second resistor connected to the other end of the first resistor. The first connected electrical length of λ / 4
A first bias supply circuit for supplying a bias to the gate of the high-frequency transistor comprising a second distributed constant line for short-circuiting the first resistor at a required frequency at a high frequency; A second bias supply circuit for supplying a bias to the drain of the high-frequency transistor, comprising a third distributed constant line of / 4, the other end of the first distributed constant line, and the third distributed constant line. Is provided with a voltage input terminal at the other end.

Thus, the impedance of the first bias supply circuit at a required frequency can be set to a finite value, so that the stability coefficient of the amplifier can be increased.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to a first aspect of the present invention is directed to a high-frequency transistor, a first resistor connected to a gate of the high-frequency transistor, and an electric resistor connected to the other end of the first resistor. A first distributed constant line having a length of λ / 4;
A first bias supply circuit for supplying a bias to a gate of the high-frequency transistor, comprising a second distributed constant line for short-circuiting the first resistor at a required frequency at a high frequency;
A second bias supply circuit configured to supply a bias to a drain of the high-frequency transistor having a third distributed constant line having an electrical length of λ / 4, the other end of the first distributed constant line; And a voltage input terminal at the other end of the distributed constant line, and the impedance of the first bias supply circuit at a required frequency can be set to a finite value. It has the effect of being able to increase.

According to a second aspect of the present invention, a bias is supplied to a high-frequency transistor, and a gate of the high-frequency transistor comprising a first distributed constant line having an electrical length of λ / 4 and a second resistor. A bias supply circuit, a third resistor connected to the drain of the high-frequency transistor,
A drain of the high-frequency transistor, comprising: a third distributed constant line connected to the drain of the high-frequency transistor and having an electrical length of λ / 4; and a fourth distributed constant line that short-circuits the third resistor at a required frequency at a high frequency. And a fourth bias supply circuit for supplying a bias to the second
And a voltage input terminal at the other end of the third distributed constant line, and the impedance of the fourth bias supply circuit at a required frequency is set to a finite value. Therefore, there is an effect that the stability coefficient of the amplification device can be increased.

According to a third aspect of the present invention, there is provided a high-frequency transistor, a first resistor connected to a gate of the high-frequency transistor, and an electrical length connected to the other end of the first resistor having an electric length of λ / 4. No. 1 distributed constant line, a fourth resistor connected to the other end of the first resistor, and a fifth resistor for short-circuiting the first resistor and the fourth resistor at a required frequency at a high frequency.
A fifth bias supply circuit for supplying a bias to the gate of the high-frequency transistor composed of a distributed constant line; And an amplifying device comprising a voltage input terminal at the other end of the first distributed constant line and the other end of the third distributed constant line. 5, the impedance of the bias supply circuit can be set to a finite value, so that the stability coefficient of the amplifier can be increased, and the impedance in the low frequency band and the impedance at the required frequency can be set freely. Having.

According to a fourth aspect of the present invention, there is provided a high-frequency transistor, a first resistor connected to a gate of the high-frequency transistor, and an electrical length connected to the other end of the first resistor having an electric length of λ / 4. A first bias supply circuit for supplying a bias to a gate of the high-frequency transistor, the first bias supply circuit comprising a first distributed constant line, a second distributed constant line for short-circuiting a first resistor at a required frequency at a high frequency, A third resistor connected to the drain, a third distributed constant line having an electrical length of λ / 4 connected to the drain of the high-frequency transistor, and a fourth short-circuiting the third resistor at a required frequency at a high frequency. A fourth bias supply circuit configured to supply a bias to a drain of the high-frequency transistor formed of a distributed constant line, the other end of the first distributed constant line, and the third bias supply circuit; This is an amplifying device having a voltage input terminal at the other end of the distributed constant line. Since the impedances of the first bias supply circuit and the fourth bias supply circuit at a required frequency can be finite, respectively. This has the effect that the stability coefficient of the amplifier device can be increased and more stable operation can be achieved.

According to a fifth aspect of the present invention, there is provided a high-frequency transistor, a first resistor connected to a gate of the high-frequency transistor, and an electric length connected to the other end of the first resistor having an electric length of λ / 4. No. 1 distributed constant line, a fourth resistor connected to the other end of the first resistor, and a fifth resistor for short-circuiting the first resistor and the fourth resistor at a required frequency at a high frequency.
A fifth bias supply circuit configured to supply a bias to the gate of the high-frequency transistor, the third resistor connected to the drain of the high-frequency transistor, and the electrical length connected to the drain of the high-frequency transistor is λ. A fourth bias supply circuit for supplying a bias to the drain of the high-frequency transistor, comprising a third distributed constant line of / 4 and a fourth distributed constant line for short-circuiting the third resistor at a required frequency at a high frequency. And an amplifying device having a voltage input terminal at the other end of the first distributed constant line and the other end of the third distributed constant line, wherein a fifth bias supply circuit at a required frequency is provided. Since the impedance of the fourth bias supply circuit can be set to a finite value, it is possible to increase the stability coefficient of the amplifier. Kiyori can be stable operation, moreover, has the effect of the impedance at the required frequency and the impedance of the low frequency band can be freely set.

According to a sixth aspect of the present invention, there is provided the first high-frequency transistor, the second high-frequency transistor, and the first high-frequency transistor.
A first resistor connected to the gate of the high-frequency transistor and an electrical length connected to the other end of the first resistor are λ / 4.
A first distributed constant line, and a first bias supply circuit for supplying a bias to a gate of the first high-frequency transistor, the second distributed constant line short-circuiting the first resistor at a required frequency at a high frequency. A fifth resistor connected to the gate of the second high-frequency transistor, a sixth distributed constant line connected to the other end of the fifth resistor and having an electrical length of λ / 4, A sixth bias supply circuit configured to supply a bias to a gate of the second high-frequency transistor, comprising a seventh distributed constant line for short-circuiting a resistor at a required frequency at a high frequency, and connected to a drain of the first high-frequency transistor. A second bias supply circuit comprising a third distributed constant line having an electric length of λ / 4, and an eighth bias supply circuit connected to the drain of the second high-frequency transistor having an electric length of λ / 4.
A voltage input terminal connected to the other end of the first distributed constant line and the other end of the sixth distributed constant line;
, And a voltage input terminal connected to the other end of the eighth distributed constant line, and the impedance of the first and sixth bias supply circuits at a required frequency. Can be individually set to finite values, so that the stability coefficient of the amplifier can be increased, and the voltage input terminals supplied to the gate and drain of the first high-frequency transistor and the second high-frequency transistor Can be reduced to one.

According to a seventh aspect of the present invention, the first high-frequency transistor, the second high-frequency transistor, the first distributed constant line having an electrical length of λ / 4, and the second resistance are provided. A first bias supply circuit for supplying a bias to the gate of the high-frequency transistor, and a bias for supplying a bias to the gate of the second high-frequency transistor comprising a ninth distributed constant line having an electrical length of λ / 4 and a sixth resistor; An eighth bias supply circuit, a third resistor connected to the drain of the first high-frequency transistor, and a third distributed constant line connected to the drain of the first high-frequency transistor and having an electrical length of λ / 4. A fourth bias supply circuit comprising a fourth distributed constant line for short-circuiting the third resistor at a required frequency at a high frequency, and a seventh resistor connected to a drain of the second high-frequency transistor. An eighth distributed constant line connected to the drain of the second high-frequency transistor and having an electrical length of λ / 4, and a tenth distributed constant line for short-circuiting the seventh resistor at a required frequency at a high frequency. A ninth bias supply circuit, a voltage input terminal connecting the other end of the second resistor and the other end of the sixth resistor, the other end of the third distributed constant line, and the eighth input terminal. An amplifier having a voltage input terminal to which the other end of the distributed constant line is connected, wherein the impedances of the fourth and ninth bias supply circuits at required frequencies can be individually set to finite values. Therefore, the gain of the amplifying device can be suppressed and the stability coefficient can be increased, and the voltage input terminals supplied to the drains of the first high-frequency transistor and the second high-frequency transistor can be reduced to one. Has the effect of cutting.

[0024] According to the present invention, a fourth resistor is provided between the first resistor and the second distributed constant line,
7. The amplifying device according to claim 6, further comprising an eighth resistor provided between the fifth resistor and the seventh distributed constant line, wherein a bias to a gate in a required frequency and a low frequency band is provided. The impedance of the supply circuit can be individually set to a finite value, the stability coefficient of the amplifier can be increased, and the voltage input supplied to the drains of the first high-frequency transistor and the second high-frequency transistor This has the effect that one terminal can be used.

According to a ninth aspect of the present invention, there is provided the third resistor connected to the drain of the first high-frequency transistor, and the fourth distributed constant line for short-circuiting the third resistor at a required frequency at a high frequency. 7. The amplifying device according to claim 6, further comprising: a seventh resistor connected to a drain of said second high-frequency transistor; and a tenth distributed constant line for short-circuiting said seventh resistor at a required frequency in a high-frequency manner. The impedance of the gate and drain of the first high-frequency transistor and the impedance of the bias supply circuit of the gate and drain of the second high-frequency transistor at the required frequency can be individually set to finite values, The gain of the amplifying device can be suppressed and the stability coefficient can be increased. In addition, the first high-frequency transistor and the resistor 3 installed at the drain and the second high-frequency transistor The resistor 5 to be installed to the gate of the transistor can be increased stability at a low frequency band to increase the resistance 5 to be installed to a gate of the second high-frequency transistors because put in parallel at the required frequency, also, the first
And the second high-frequency transistor and the second high-frequency transistor have a single voltage input terminal.

According to a tenth aspect of the present invention, a third resistor connected to a drain of the first high-frequency transistor;
A fourth circuit for short-circuiting the third resistor at a required frequency at a high frequency;
11. A distributed constant line, a seventh resistor connected to the drain of the second high-frequency transistor, and a tenth distributed constant line that short-circuits the seventh resistor at a required frequency in a high-frequency manner. 8, wherein the impedance of the gate and drain of the first high-frequency transistor and the impedance of the gate and drain of the gate and drain of the second high-frequency transistor at required frequencies are individually set to finite values. The gain of the amplifying device can be suppressed and the stability factor can be increased. In addition, the resistor 3 installed in the drain of the first high-frequency transistor and the resistor 5 installed in series with the gate of the second high-frequency transistor can be used. Since the resistor 8 is connected in parallel, the resistor 3 and the resistor 8 installed on the base of the second high-frequency transistor are increased to increase the resistance in the low-frequency band. It is possible to increase the stability further, such an action may be first RF transistor and a voltage input terminal to the gate and drain of the second high-frequency transistor in each one.

The invention according to claims 11 to 20 is an amplifying apparatus in which a resistor close to the first high-frequency transistor and the second high-frequency transistor is manufactured in the same device as the high-frequency transistor. Since the number of points can be reduced and the area of the resistor on the same device as that of the high-frequency transistor is reduced, an effect of suppressing an increase in cost can be obtained. Further, when a capacitor or the like that cuts a DC component is inserted into the input / output terminal of the amplifier, the capacitor can be manufactured on the same device as the high-frequency transistor.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First Embodiment) FIG. 1 shows the configuration of an amplifying device according to a first embodiment of the present invention. Is attached.

In FIG. 1, the difference from the conventional example of FIG. 9 is that the gate bias supply circuit 10 is different from the conventional gate bias supply circuit 8, and the other configuration is the same. The gate bias supply circuit 10 includes a resistor 101 connected to the gate of the transistor 1 made of GaAs FET.
And a distributed constant line 102 having an electrical length of λ / 4 for short-circuiting the resistor 101 at a required frequency at a high frequency, a distributed constant line 103 having an electrical length of λ / 4, and a λ / 4 distributed constant line 103 connected to a high frequency. A capacitor 104, which is electrically grounded, a resistor 107 and a high-frequency coil 108, and a resistor 105 and a capacitor which are provided in parallel with the capacitor 104 in order to suppress parasitic oscillation at a low frequency.
106.

In the amplifying device of the first embodiment configured as described above, the basic amplifying operation is the same as that of the conventional example. When a high-frequency signal is input to the input terminal 4, the conjugate matching of the input matching circuit 2 is performed. Is transmitted to the gate of the transistor 1 without causing reflection, and the output matching circuit 3
Output terminal 5 without causing reflection due to conjugate matching of
Is transmitted and output. The transistor 1 performs an operation of amplifying a high-frequency signal at an operating point determined by the bias voltages of the gate bias supply circuit 10 and the drain bias circuit 9.

Here, the gate bias supply circuit 10 has an open-ended distributed constant line 10 having a required frequency f ₀ and an electrical length of λ / 4.
2 causes a high frequency short circuit at point B, and the electrical length is λ /
The impedance of the gate bias supply circuit 10 as viewed from the point A becomes the resistance value of the resistor 101 at the required frequency f ₀ because the impedance at the point B becomes infinite at a high frequency due to the open-ended distributed constant line 103 of FIG. Note that, at a frequency lower than the required frequency f ₀ , the λ / 4 tip radiation distributed constant line 102 and the λ / 4 short-circuited distributed constant line 103 can be regarded as λ / 2 open-ended distributed constant lines. There occurs a characteristic in which the transmission characteristic becomes maximum at half the required frequency f ₀ , but this can be suppressed by reducing the characteristic impedance of the distributed constant lines 102 and 103. In a lower near-frequency band, the distributed constant lines 102 and 103 can be regarded as lines, and the impedance at this time is only the DC resistance of the resistors 101 and 107.

FIG. 3 (a), (b) is a constant gate bias supply circuit 10 to set the required frequency f ₀ to 25 GHz, which shows the S parameters and pass characteristics viewed from the main line. Further, as is clear from FIGS. 3A and 3B, at the required frequency f ₀ = 25 GHz, the impedance of the gate bias supply circuit 10 is reduced, and the attenuation of the pass characteristic is increased.

FIGS. 2A and 2B show the pass characteristics and the stability coefficient K of the amplifier when the gate bias supply circuit 10 is connected to the amplifier. In this case, a signal obtained by dividing the input signal input to the amplifying device by the voltage dividing ratio of the impedance of the gate bias supply circuit 10 and the input impedance of the transistor 1 is input. By setting the resistance value to an appropriate resistance value, the gain of the amplifier can be suppressed, and the stability coefficient K can be made larger than 1. Therefore,
It can be also stably operate at the required frequency f _0. In the low frequency band, the parasitic oscillation can be suppressed by setting the impedance of the gate bias supply circuit 10 to be small according to the resistance value of the series resistance of the resistor 107.

As described above, the gate bias supply circuit 10
A resistor 101 connected to the gate of the transistor 1;
By providing a distributed constant line 102 having an electrical length of λ / 4, which short-circuits the resistor 101 at a required frequency, at the required frequency f ₀ , the open-ended distributed constant line 102 having an electrical length of λ / 4 has a high frequency at point B. The gate bias supply circuit 10 can be short-circuited and the impedance of the gate bias supply circuit 10 as viewed from the point A at the required frequency f ₀ becomes the resistance value of the resistor 101. The signal input to the transistor 1 is a signal divided by the voltage dividing ratio of the impedance of the gate bias supply circuit 10 and the input impedance of the transistor 1. Therefore, it is possible to suppress the gain of the amplifier, it is possible to increase from 1 stability factor K, an effect that can be stably operated at the required frequency f _0.

It should be noted, the resistance value of the resistor 101 by varying, it is also possible to control the gain at the required frequency f _0.

Note that a resistor for stabilizing at a low frequency is used.
Since the resistor 107 is provided between the gate of the transistor 1 and the voltage input terminal, the resistor 107 may be omitted.

The resistor 105 and the capacitor 106, which prevent the parasitic oscillation at a low frequency, and the capacitor 104 may have another configuration as long as they have the same function.
There is no particular limitation.

The λ / 4 open-ended distributed constant line 102
May be replaced with a λ / 2 short-circuit distributed constant line. Even in such a case, the same function and effect can be obtained.

The transistor 1 and the resistor 101 can be manufactured on the same device. In addition, when a capacitor or the like that cuts a direct current component is inserted into the input / output terminal of the amplifier, the capacitor can be manufactured on the same device as the high-frequency transistor, thereby increasing the number of parts by flip mounting. Can be suppressed. Also, by inserting the resistor 101 between the voltage input terminal and the gate of the transistor, the resistor 107 can be omitted,
In the case of flip mounting, the number of components can be reduced.

(Second Embodiment) FIG. 4 shows the configuration of an amplifying apparatus according to a second embodiment of the present invention. Is attached.

In FIG. 4, the difference from the conventional example of FIG. 9 is that the drain bias supply circuit 20 is different from the conventional drain bias supply circuit 9, and the other configuration is the same. The drain bias supply circuit 20 has a resistor 201 connected to the drain of the transistor 1 and an electrical length for short-circuiting the resistor 201 at a required frequency at a high frequency of λ /
4, a distributed constant line 203 having an electrical length of λ / 4, a capacitor 204 for grounding the λ / 4 distributed constant line 203 at a high frequency, a high frequency coil 207, and a parasitic at a low frequency. It is composed of a resistor 205 and a capacitor 206 provided in parallel with the capacitor 204 to suppress oscillation.

In the amplifying device of the second embodiment having such a configuration, the basic amplifying operation is the same as that of the conventional example. When a high-frequency signal is input to the input terminal 4, the input matching circuit 2 performs conjugate matching. The signal is transmitted to the gate of the transistor 1 without causing reflection, and further transmitted and output to the output terminal 5 without causing reflection due to the conjugate matching of the output matching circuit 3. In addition, the transistor 1 performs an amplifying operation of a high-frequency signal at an operating point whose gate bias is determined by the bias voltage of the supply circuit 8 and the drain bias circuit 20.

Here, in the drain bias supply circuit 20, at the required frequency f ₀ , a short circuit occurs at a point E at a high frequency due to the open-ended distributed constant line 202 having an electrical length of λ / 4. Also, by setting the impedance of the capacitor 204 to be close to zero in the high frequency region, the distributed constant line 203 can be regarded as being short-circuited at one end at a required frequency, and the impedance of the λ / 4 distributed constant line 203 is infinite. become. Therefore, the main line D of the amplifier at the required frequency f ₀
The impedance of the drain bias supply circuit 20 from the point of view becomes the resistance value of the resistor 201. Also, in this configuration,
Between the drain voltage input terminal 7 and the point D of the main line,
Since no resistor is provided as in the conventional case, the same bias voltage as in the conventional example can be applied in DC.

The drain bias supply circuit 20
Is connected to the amplifying device, in terms of high frequency, the resistance of the drain bias supply circuit 20
It can be considered that a load of 201 has been added. Accordingly, the load impedance of the amplifier at this time is reduced when the load of the resistor 201 is applied, so that the gain of the amplifier is reduced and the amplifier operates stably. The resistance value of the resistor 201 of the drain bias supply circuit 20, by setting as the stability factor K is greater than 1, it is possible to also stably operate at the required frequency f _0.

As described above, the drain bias supply circuit
By adding a resistor 201 and a distributed constant line 202 having an electrical length of λ / 4 for short-circuiting the resistor 201 at a required frequency to 20, an open-ended distributed constant line 202 having an electrical length of λ / 4 at a required frequency f ₀ is provided. As a result, a high-frequency short circuit can be performed at the point E, and the impedance of the drain bias supply circuit 20 as viewed from the point D at the required frequency f ₀ becomes the resistance value of the resistor 201.
Since the load impedance of the signal output from the transistor 1 is reduced by adding the impedance of the drain bias supply circuit 20, the gain of the amplifier is reduced and the stability coefficient K can be made larger than 1. Therefore, an effect that can be stably operated at the required frequency f _0.

[0047] By varying the resistance value of the resistor 201, it is also possible to control the gain at the required frequency f _0.

The resistor 205 and the capacitor 206, which prevent the parasitic oscillation at a low frequency, and the capacitor 204 may have another configuration as long as they have the same function.
There is no particular limitation.

The λ / 4 open-ended distributed constant line 202
May be replaced with a λ / 2 short-circuit distributed constant line. Even in such a case, the same function and effect can be obtained.

The transistor 1 and the resistor 201 can be manufactured on the same device. In addition, when a capacitor or the like that cuts a direct current component is inserted into the input / output terminal of the amplifier, the capacitor can be manufactured on the same device as the high-frequency transistor, thereby increasing the number of parts by flip mounting. Can be suppressed.

(Third Embodiment) FIG. 5 shows the configuration of an amplifying apparatus according to a third embodiment of the present invention, in particular, the configuration of a gate bias supply circuit 30.

In FIG. 5, the gate bias supply circuit 30
Is a resistor 301 connected to the gate of the transistor 1,
A resistor 309 connected in series with the resistor 301, a distributed constant line 302 having an electrical length of λ / 4 for short-circuiting the resistor 301 and the resistor 309 connected in series at a required frequency at a high frequency, and an electrical length of λ
分布 distributed constant line 303 and λ / 4 distributed constant line 303
, A resistor 307 and a high-frequency coil 308, and a resistor 305 and a capacitor 306 provided in parallel with the capacitor 304 to suppress parasitic oscillation at low frequencies.

A gate bias supply circuit having such a configuration
Even when 30 is connected to an amplification device, the basic amplification operation is the same as that of the conventional example. When a high-frequency signal is input to the input terminal, it is transmitted to the transistor gate without causing reflection due to the conjugate matching of the input matching circuit. Then, the signal is transmitted to the output terminal without being reflected by the conjugate matching of the output matching circuit and output. The transistor performs an operation of amplifying a high-frequency signal at an operating point determined by the bias voltages of the gate bias supply circuit 30 and the drain bias circuit.

The gate bias supply circuit 30 has the required frequency
At f ₀ , the open-ended distributed constant line 302 having an electric length of λ / 4 is short-circuited at a point B2 at a high frequency, and the open-ended distributed constant line 303 having an electric length of λ / 4 has an infinite impedance at a point B1 at a high frequency. At the required frequency f ₀
The impedance of the gate bias supply circuit 30 as seen from the point A1 is the resistance value of the resistors 301 and 309. Fig. 6 (a), (b)
Sets the required frequency f ₀ to the constant of the gate bias supply circuit 30.
It is set to 25 GHz, and shows S parameters and transmission characteristics viewed from the main line. 6A and 6B, at the required frequency f ₀ = 25 GHz, the impedance of the gate bias supply circuit 30 decreases, and the attenuation of the pass characteristic increases.

When such a gate bias supply circuit 30 is connected to an amplifier, the input signal input to the amplifier at the required frequency f ₀ is a voltage dividing ratio between the impedance of the gate bias supply circuit 30 and the input impedance of the transistor 1. Is input, the gain of the amplifying device can be suppressed by setting the resistance values of the resistors 301 and 309 of the gate bias supply circuit 30 to an appropriate resistance value, and the stability coefficient K can be set to 1 Can be larger. Therefore, it is possible to also stably operate at the required frequency f _0.

As described above, the gate bias supply circuit 30
In addition, by attaching resistors 301 and 309 connected to the gate of the transistor 1 and a distributed constant line 302 having an electrical length of λ / 4 for short-circuiting the resistors 301 and 309 at a required frequency, the electrical length at the required frequency f ₀ is increased. Can be short-circuited at a high frequency at a point B2 by a distributed constant line 302 having an open end of λ / 4, and the impedance of the gate bias supply circuit 30 as viewed from the point A1 at the required frequency f ₀ is the resistance of the resistors 301 and 309. Value. Since the signal input to the transistor 1 is a signal obtained by dividing the voltage by the voltage dividing ratio of the impedance of the gate bias supply circuit 30 and the input impedance of the transistor 1, the gain of the amplifying device can be suppressed, and the stability coefficient K becomes 1 it can be increased, an effect that can either be also stably operate at the required frequency f _0.

[0057] By varying the resistance value of the resistor 309, it is also possible to control the gain at the required frequency f _0.

Note that a resistor for stabilizing at a low frequency is used.
In the 307, since the resistor 3O1 is provided between the gate of the transistor 1 and the voltage input terminal, the resistor 307 may be omitted.

The resistor 305, the capacitor 306, and the capacitor 304 that prevent the parasitic oscillation at a low frequency may have another configuration as long as they have the same function.
There is no particular limitation.

The λ / 4 open-ended distributed constant line 302
May be replaced with a λ / 2 tip short-circuit distributed constant line, in which case the gate voltage applied to the transistor 1 is
The voltage is determined by the ratio of the resistance 307 and the resistance 309. Also the resistance
By controlling the resistance value of the resistor 309 or the resistor 307, the gate voltage applied to the transistor 1 can be varied.

The transistor 1, the resistor 301 and the resistor 309
Can be manufactured on the same device. In addition, when a capacitor or the like that cuts a direct current component is inserted into the input / output terminal of the amplifier, the capacitor can be manufactured on the same device as the high-frequency transistor, thereby increasing the number of parts by flip mounting. Can be suppressed. Further, since the resistor 301 is inserted between the voltage input terminal and the gate of the transistor, the resistor 307 can be omitted, and the number of components can be reduced in the case of flip mounting.

(Fourth Embodiment) FIG. 7 shows the configuration of an amplifying device according to a fourth embodiment of the present invention, showing an example of a configuration in which amplifiers are cascaded in two stages. Things
Those having the same operations and functions as those of the conventional example are denoted by the same reference numerals.

In FIG. 7, the amplifying device includes high-frequency transistors 401 and 402, an input matching circuit 403, an inter-stage matching circuit 404 for obtaining conjugate matching between the stages of the high-frequency transistors 401 and 402, a high-frequency transistor 401 and a high-frequency transistor. The gate bias supply circuit 41 of the transistor 402,
42, a drain bias supply circuit 43, 44, and an output matching circuit 405.

The gate bias supply circuits 41 and 42 of the high-frequency transistor 401 and the high-frequency transistor 402 have the same configuration as that of the third embodiment.
The open-ended distributed constant line is replaced with a short-circuited distributed constant line, and drain bias supply circuits 43 and 44 are provided.
Has a configuration similar to that of the above-described second embodiment. Further, the gate voltage input terminal of the first-stage transistor 401 and the gate voltage input terminal of the second-stage transistor 402 are shared, and the first-stage transistor 401
And the drain voltage input terminal of the second-stage transistor 402 is shared.

In the two-stage amplifier of the fourth embodiment having such a configuration, the basic amplification operation is the same as that of the conventional example.
When a high-frequency signal is input to the input terminal 4, the input matching circuit 40
The signal is transmitted to the gate of the transistor 401 without causing reflection by the conjugate matching of 3, and transmitted without causing reflection to the gate of the transistor 402 by the conjugate matching of the interstage matching circuit 404. The signal is transmitted and output to the output terminal 5 without causing reflection. The high-frequency transistor amplifies a high-frequency signal at an operating point determined by the bias voltages of the gate bias supply circuit and the drain bias circuit.

The gate bias supply circuits 41 and 42 have a short-circuited distributed constant line 40 having a required frequency f ₀ and an electrical length of λ / 2.
8 and 416 cause a short circuit at high frequency and an electrical length of λ
The impedance becomes infinite at high frequencies due to the / 4 short-circuited distributed constant lines 409 and 417. Therefore, the required frequency f ₀ of the gate bias supply circuit 41, the impedance viewed from the point A3 is the sum of the resistance values of the resistor 406 resistor 407 has the same function as the third embodiment described above.

At the required frequency f ₀ of the gate bias supply circuit 42, the impedance viewed from the point A4 is the resistance 41
4 and the sum of the resistance values of the resistor 415, and has the same function as that of the third embodiment. Here, assuming that the voltage input from the voltage input terminal is Vgg, the voltage applied to the transistor 401 is DC grounded by the tip short-circuit distributed constant line 408 having an electrical length of λ / 2. And the voltage divided by 413. Further, the voltage applied to the transistor 402 is a short-circuit distributed constant line 416 having an electrical length of λ / 2.
Therefore, the resistors 415 and 421
The voltage is divided.

Therefore, the resistance of the transistors 401 and 413 and the resistance of the resistors 415 and
And 402 can be adjusted respectively, when different transistor sizes are used, and adjustments due to variations in the threshold voltage of the transistors, etc.
The gate voltage can be controlled by one voltage input terminal.

The drain bias supply circuit has the same configuration as that of the second embodiment. At the required frequency f ₀ , the open-ended distributed constant lines 425 and 429 having an electrical length of λ / 4 are short-circuited at high frequencies at the other ends of the resistors 424 and 429.
Of the distributed constant lines 423 and 4 at the required frequency f ₀ by setting the impedance of
27 is a λ / 4 distributed constant line that can be regarded as short-circuited at one end
The impedance of 423 and 427 becomes infinite.

Accordingly, the impedance of the drain bias supply circuits 43 and 44 as viewed from the main line of the amplifier at the required frequency f ₀ is the resistance value of the resistors 424 and 428. The drain voltage input terminal 7 is shared by connecting the other ends of the distributed constant lines 423 and 427.

[0071] can be set such, when connecting gate bias supply circuit 41 and 42 and the drain bias supply circuit 43 and 44 to the amplifier, the value impedance finite respective bias supply circuit at a desired frequency f _0, By setting the resistance of the bias supply circuit to an appropriate resistance value, the gain of the amplifying device can be suppressed and the stability coefficient K can be set to 1
Can be larger. Therefore, it is possible to also stably operate at the required frequency f _0.

As described above, even when transistors are connected in cascade in two stages to obtain high gain, the gate bias supply circuit of the third embodiment of the present invention and the drain bias supply circuit of the second embodiment of the present invention By combining the supply circuits,
It can be also stably operate at the required frequency f _0.

Further, by replacing the open-ended distributed constant line in the third embodiment of the present invention with a short-circuited distributed constant line, a resistor 407 is connected to the gate of the transistor 401.
The voltage divided by 413, the gate of the transistor 402 becomes the voltage divided by the resistors 415 and 421, and the resistance of the resistors 407 and 413 and the resistance of the resistors 415 and 421, And 402 can be adjusted respectively. Therefore, the gate voltage can be controlled by one voltage input terminal in the case where different transistor sizes are used or the adjustment due to the variation in the threshold value of the transistor or the like.

At the required frequency f ₀ , the resistance 424 of the drain bias supply circuit 43 of the transistor 401 and the resistance 414 of the gate bias supply circuit 42 of the transistor 402
Since 415 can be regarded as being connected in parallel, if the resistance value of the resistor 424 of the drain bias supply circuit 43 is reduced and the gain is suppressed, the resistances 414 and 415 of the gate bias supply circuit 42 of the transistor 402 are increased. And the stability in the low frequency band can be improved.

In this embodiment, the high-frequency transistors are cascaded in two stages. However, the same functions and effects as those of this embodiment can be obtained by adopting the same configuration in the case of further cascading multiple stages. Can have.

In this embodiment, the high-frequency transistors are connected in cascade, but the transistors can be connected in parallel as shown in FIG. It has functions similar to those of the fourth embodiment.

In this embodiment, the drain bias supply circuit has the same configuration as that of the second embodiment of the present invention, but may have the same configuration as that of the conventional example.

The resistor 413 for stabilizing the transistor 401 at a low frequency may be omitted because the resistor 406 is provided between the gate of the transistor 401 and the voltage input terminal. The resistor 421 for stabilizing the transistor 402 at a low frequency may be omitted because the resistor 414 is provided between the gate of the transistor 402 and the voltage input terminal. In this case, the gate voltage applied to transistors 401 and 402 cannot be controlled.

Note that the resistor 410 and the capacitor 411, the capacitor 412, the resistor 418 and the capacitor 419, and the capacitor 420 that prevent the parasitic oscillation at a low frequency have another configuration as long as they have the same function. It does n’t matter
There is no particular limitation.

It is to be noted that the short-circuit distributed constant line 408 at the tip of λ / 2 is used.
And 416 may be replaced by a λ / 4 open-ended distributed constant line, in which case the gate voltage applied to the transistors 401 and 402 is the voltage input from the voltage input terminal 6.

If the stability coefficient K at the required frequency f ₀ has a sufficient margin, the resistors 424 and 428 and the distributed constant line 425
And 429 are omitted, resistors 424 and 428, distributed constant lines 425 and 429, and further, resistors 407 and 415 are omitted, resistors 406, 407, 414 and 415, distributed constant lines 408 and 416 May be omitted.

Even when cascade connection and parallel connection are mixed, the amplifier can be operated stably by combining the above-described first to fourth embodiments of the present invention. 7. It is not limited to the configuration shown in FIG.

[0083]

As will be apparent from the description of the above embodiment, the effects of the present invention will be described below. (1) According to the first embodiment of the present invention, there is an effect that the impedance of the gate bias supply circuit connected to the gate of the transistor at the required frequency can be freely set to a finite value. (2) Also, by changing the resistance value of the resistor 101,
Can also control the gain at the required frequency f _0, there is an effect that it is possible to stably operate the amplifier. (3) In addition, by manufacturing the transistor 1 and the resistor 101 on the same device and flip-mounting the same, it is possible to suppress an increase in the number of components. (4) Further, since the resistor 101 is inserted between the voltage input terminal and the gate of the transistor, the resistor 107 can be omitted, and the effect of reducing the number of components can be obtained in the case of flip mounting. (5) According to the second embodiment of the present invention, there is an effect that the impedance of the drain bias supply circuit connected to the drain of the transistor at the required frequency can be freely set to a finite value. (6) Also, by changing the resistance value of the resistor 201,
Gain can be controlled in the required frequency f _0, there is an effect that it is possible to stably operate the amplifier. (7) According to the third embodiment of the present invention, the impedance of the gate bias supply circuit connected to the gate of the transistor can be freely set to a finite value in each of the low frequency band and the high frequency band. This has the effect. (8) Also, by changing the resistance value of the resistor 309,
Required frequency f can control the gain at _0, there is an effect that prevents parasitic oscillation suppressing the gain of the amplifier can be operated stably. (9) The open-ended distributed constant line 302 of λ / 4 is λ
/ 2 by replacing it with a short-circuit distributed constant line at the tip
The gate voltage applied to the transistor 1 is changed by the resistors 307 and 309.
There is an effect that the voltage can be changed to a voltage set by the voltage dividing ratio. (10) Further, since the resistor 301 is inserted between the voltage input terminal and the gate of the transistor, the resistor 307 can be omitted, and in the case of flip mounting, the effect of reducing the number of components can be obtained. (11) According to the fourth embodiment of the present invention, the gate bias supply circuit of the third embodiment of the present invention and the gate bias supply circuit of the present invention can be used even when two transistors are connected in cascade in order to obtain a high gain. Second
By combining the drain bias supply circuit of the embodiment of, there is an effect that it is possible to also stably operate at the required frequency f _0. (12) Further, by replacing the open-ended distributed constant line in the third embodiment of the present invention with a short-circuited distributed constant line, the gate of the transistor 401 becomes a voltage divided by the resistors 407 and 413, The gate 402 has a voltage divided by the resistors 415 and 421, and the resistor 407 and the resistor 4
By the resistance value of 13 and the resistance value of resistance 415 and resistance 421,
Gate voltages applied to the transistors 401 and 402 can be adjusted respectively. Therefore, the gate voltage can be controlled by one voltage input terminal in the case where different transistor sizes are used or the adjustment due to the variation in the threshold value of the transistor or the like. (13) At the required frequency f ₀ , the transistor 401
The resistance 424 of the drain bias supply circuit 43 and the resistances 414 and 415 of the gate bias supply circuit 42 of the transistor 402
Can be regarded as being connected in parallel.If the resistance value of the resistor 424 of the drain bias supply circuit 43 is reduced to suppress the gain, the resistances 414 and 415 of the gate bias supply circuit 42 of the transistor 402 need to be increased. Therefore, there is an effect that stability in a low frequency band can be improved. (14) In the fourth embodiment of the present invention, the high-frequency transistors are cascaded in two stages. However, the same configuration can be applied to the case of further cascading high-frequency transistors. There is an effect that the same function as that of the embodiment can be obtained. (15) In the fourth embodiment of the present invention, the high-frequency transistors are connected in cascade, but when the transistors are connected in parallel, they can be connected in a similar configuration. There is an effect that it has the same function as the fourth embodiment of the invention. (16) The resistor 424 according to the fourth embodiment of the present invention.
And 428, the configuration without the distributed parameter lines 425 and 429, the resistors 424 and 428, and the distributed parameter lines 425 and 429
And the configuration omitting the resistors 407 and 415, and the resistor 40
Even when the configuration in which 6, 407, 414 and 415 and the distributed constant lines 408 and 416 are omitted, the effect of suppressing the parasitic oscillation can be obtained. (17) Even when the cascade connection and the parallel connection are mixed, the amplification device can be operated stably by combining the first to fourth embodiments of the present invention.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of an amplification device according to a first embodiment of the present invention;

FIGS. 2A and 2B are diagrams showing pass characteristics in the configuration of the first embodiment of the present invention, and FIGS. 2B and 2B are diagrams showing the stability coefficient K in the configuration of the first embodiment of the present invention; FIGS.

3A is a diagram illustrating S-parameter characteristics of the gate bias supply circuit 10, and FIG. 3B is a diagram illustrating pass characteristics of the gate bias supply circuit 10.

FIG. 4 is a diagram illustrating a configuration of an amplification device according to a second embodiment of the present invention;

FIG. 5 is a diagram illustrating a configuration of an amplification device according to a third embodiment of the present invention;

FIG. 6A is a diagram illustrating an S-parameter characteristic according to the third embodiment of the present invention; FIG. 6B is a diagram illustrating a pass characteristic according to the third embodiment of the present invention;

FIG. 7 is a diagram illustrating a configuration of an amplification device according to a fourth embodiment of the present invention;

FIG. 8 is a diagram showing another configuration of the amplifier according to the fourth embodiment of the present invention;

FIG. 9 is a diagram showing a configuration of a conventional one-stage amplifier;

FIG. 10 is a diagram showing a configuration of a conventional bias supply circuit;

11A is a diagram illustrating characteristics of an S parameter of a conventional bias supply circuit, and FIG. 11B is a diagram illustrating pass characteristics of the conventional bias supply circuit.

12A is a diagram illustrating the pass characteristic of a conventional single-stage amplifier, and FIG. 12B is a diagram illustrating the stability coefficient K of the conventional single-stage amplifier.

[Explanation of symbols]

 1, 401, 402, 501, 502 High-frequency transistors 2, 3, 403, 404, 405 Matching circuit 503 Branch circuit 504 Synthesis circuit 4 Input terminal 5 Output terminal 6 Gate voltage input terminal 7 Drain voltage input terminal 8, 9, 10 , 20, 30, 41 Bias circuits 42, 43, 44, 51, 52, 53, 54 Bias circuits 81, 91, 102, 103, 202 Distributed constant lines 203, 302, 303, 408, 409 Distributed constant lines 416, 417 , 423, 425, 429 Distributed constant line 427, 507, 508, 515, 516 Distributed constant line 523, 524, 527, 528 Distributed constant line 82, 85, 95, 101, 107, 201 Resistance 205, 301, 309, 305 , 307 resistance 406, 407, 410, 413, 414 resistance 415, 418, 421, 424, 428 resistance 505, 506, 509, 512, 513 resistance 514, 517, 520, 521, 522, 526 resistance 84, 86, 94 , 96, 104, 106, 204 capacitors 206, 304, 306, 411, 412, 419 capacitors 420, 426, 430, 510, 511, 518 capacitors 519, 525, 529 capacitors 83, 93, 108, 207, 308 Yl 422,431,521,530 frequency coil

Claims (20)

[Claims] 1. A high-frequency transistor, a first resistor connected to a gate of the high-frequency transistor, a first distributed constant line connected to the other end of the first resistor and having an electrical length of λ / 4, A first bias supply circuit for supplying a bias to the gate of the high-frequency transistor, comprising a second distributed constant line for short-circuiting the first resistor at a required frequency at a high frequency, and a third distribution having an electrical length of λ / 4 A second bias supply circuit configured to supply a bias to a drain of the high-frequency transistor formed of a constant line; and a voltage input to the other end of the first distributed constant line and the other end of the third distributed constant line. An amplification device with terminals. 2. A high-frequency transistor having an electrical length of λ / 4
A third bias supply circuit configured to supply a bias to a gate of the high-frequency transistor, the third bias supply circuit including a first distributed constant line and a second resistor, and a third resistor connected to a drain of the high-frequency transistor; A bias is supplied to the drain of the high-frequency transistor, which includes a third distributed constant line connected to the drain and having an electric length of λ / 4 and a fourth distributed constant line that short-circuits the third resistor at a required frequency at a high frequency. An amplifying device comprising a fourth bias supply circuit, and a voltage input terminal at the other end of the second resistor and the other end of the third distributed constant line. 3. A high-frequency transistor, a first resistor connected to the gate of the high-frequency transistor, a first distributed constant line connected to the other end of the first resistor and having an electrical length of λ / 4, A fourth resistor connected to the other end of the first resistor, and a fifth distributed constant line that short-circuits the first resistor and the fourth resistor at a required frequency at a high frequency. A fifth bias supply circuit for supplying a bias to a gate, and a second bias supply circuit for supplying a bias to a drain of the high-frequency transistor, the third distributed constant line having an electrical length of λ / 4; An amplifier device having a voltage input terminal at the other end of the first distributed constant line and the other end of the third distributed constant line. 4. A high-frequency transistor, a first resistor connected to a gate of the high-frequency transistor, a first distributed constant line connected to the other end of the first resistor and having an electrical length of λ / 4, A first bias supply circuit configured to supply a bias to a gate of the high-frequency transistor, comprising a second distributed constant line that short-circuits the first resistor at a required frequency at a high frequency; and a third bias supply circuit connected to a drain of the high-frequency transistor. , A third distributed constant line connected to the drain of the high-frequency transistor and having an electrical length of λ / 4, and a fourth distributed constant line that short-circuits the third resistor at a required frequency at a high frequency. A fourth bias supply circuit for supplying a bias to a drain of the high-frequency transistor, the other end of the first distributed constant line and the other end of the third distributed constant line; Amplifier having a voltage input terminal. 5. A high-frequency transistor, a first resistor connected to the gate of the high-frequency transistor, a first distributed constant line connected to the other end of the first resistor and having an electrical length of λ / 4, A fourth resistor connected to the other end of the first resistor, and a fifth distributed constant line that short-circuits the first resistor and the fourth resistor at a required frequency at a high frequency. A fifth bias supply circuit for supplying a bias to the gate, a third resistor connected to the drain of the high-frequency transistor, and a third distributed constant line connected to the drain of the high-frequency transistor and having an electrical length of λ / 4. A fourth bias supply circuit configured to supply a bias to a drain of the high-frequency transistor, the fourth bias supply circuit comprising a fourth distributed constant relief line for short-circuiting the third resistor at a required frequency at a high frequency. Is, the other end of said first distributed constant line, amplifying device provided at the other end to the voltage input terminal of said third distributed constant line. 6. A first high-frequency transistor, a second high-frequency transistor, a first resistor connected to a gate of the first high-frequency transistor, and an electrical length connected to the other end of the first resistor. Is a λ / 4 first distributed constant line,
A first bias supply circuit configured to supply a bias to a gate of the first high-frequency transistor, comprising a second distributed constant line that short-circuits the first resistor at a required frequency at a high frequency; A fifth resistor connected to the gate, a sixth distributed constant line having an electrical length of λ / 4 connected to the other end of the fifth resistor, and the fifth resistor short-circuited at a required frequency at a high frequency. A sixth bias supply circuit configured to supply a bias to a gate of the second high-frequency transistor, comprising a seventh distributed constant line to be biased;
The electrical length connected to the drain of the high-frequency transistor is λ
A second bias supply circuit comprising a third distributed constant line of / 4, and a seventh bias supply comprising an eighth distributed constant line having an electrical length of λ / 4 and connected to the drain of the second high-frequency transistor. A voltage input terminal which is constituted by a circuit and connects the other end of the first distributed constant line to the other end of the sixth distributed constant line; the other end of the third distributed constant line; An amplifier comprising: a voltage input terminal to which the other end of the constant line is connected. 7. A bias is applied to the gates of a first high-frequency transistor, a second high-frequency transistor, and a gate of the first high-frequency transistor including a first distributed constant line having an electrical length of λ / 4 and a second resistor. A first bias supply circuit for supplying a bias, an eighth bias supply circuit for supplying a bias to the gate of the second high-frequency transistor including a ninth distributed constant line having an electrical length of λ / 4 and a sixth resistor; , The first
A third resistor connected to the drain of the high-frequency transistor, a third distributed constant line having an electrical length of λ / 4 connected to the drain of the first high-frequency transistor, and a third resistor connected to the third resistor at a required frequency. A fourth bias supply circuit composed of a fourth distributed constant line that is electrically short-circuited, a seventh resistor connected to the drain of the second high-frequency transistor, and an electrical length connected to the drain of the second high-frequency transistor Is composed of an eighth distributed constant line of λ / 4 and a ninth bias supply circuit composed of a tenth distributed constant line for short-circuiting the seventh resistor at a required frequency at a high frequency. And a voltage input terminal connected to the other end of the sixth resistor, and a voltage input terminal connected to the other end of the third distributed constant line and the other end of the eighth distributed constant line. Amplifying device. 8. A fourth resistor installed between the first resistor and the second distributed constant line, and an eighth resistor installed between the fifth resistor and the seventh distributed constant line. With
The amplification device according to claim 6. 9. A third resistor connected to the drain of the first high-frequency transistor, a fourth distributed constant line for short-circuiting the third resistor at a required frequency in a high frequency, and the second high-frequency transistor 7. The amplifying device according to claim 6, further comprising: a seventh resistor connected to the drain of said first resistor, and a tenth distributed constant line for short-circuiting said seventh resistor at a required frequency at a high frequency. 10. A third resistor connected to a drain of the first high-frequency transistor, a fourth distributed constant line for short-circuiting the third resistor at a required frequency at a high frequency, and the second high-frequency transistor 9. The amplifying device according to claim 8, further comprising: a seventh resistor connected to the drain of said first resistor, and a tenth distributed constant line for short-circuiting said seventh resistor at a required frequency at a high frequency. 11. The first bias supply circuit, wherein the first resistor connected to the gate of the high-frequency transistor is formed on the same device as the high-frequency transistor. The amplification device according to claim 1, wherein the amplification device is mounted. 12. A second device, wherein the third resistor connected to the drain of the high-frequency transistor in the fourth bias supply circuit is manufactured on the same device as the high-frequency transistor, and a second device is flipped on a ceramic substrate. 3. The amplifying device according to claim 2, wherein the amplifying device is mounted. 13. The third bias supply circuit, wherein the first resistor and the fourth resistor connected to the gate of the high-frequency transistor are formed on the same device as the high-frequency transistor. 4. The amplifying device according to claim 3, wherein the device is flip-mounted on a ceramic substrate. 14. In the first and fourth bias supply circuits, the first resistor and the third resistor connected to the gate and the drain of the high-frequency transistor are connected on the same device as the high-frequency transistor. 5. The amplifying apparatus according to claim 4, wherein the fourth device manufactured according to claim 4 is flip-mounted on a ceramic substrate. 15. In the fifth and fourth bias supply circuits, the first resistor, the fourth resistor, and the third resistor connected to a gate and a drain of the high-frequency transistor are connected to the high-frequency transistor. 6. The amplifying device according to claim 5, wherein a fifth device manufactured on the same device as the transistor is flip-mounted on a ceramic substrate. 16. The first high-frequency transistor, a first device in which the first resistor connected to the gate of the first high-frequency transistor is manufactured on the same device, and the second high-frequency transistor 7. The amplifying device according to claim 6, further comprising: a sixth device having the fifth resistor connected to the gate of the third device manufactured on the same device, wherein the first and sixth devices are flip-mounted on a ceramic substrate. 17. The second high-frequency transistor, wherein the first high-frequency transistor, the second resistor connected to the drain of the first high-frequency transistor, and the third resistor are manufactured on the same device. And a seventh device having a seventh resistor connected to the drain of the second high-frequency transistor manufactured on the same device, wherein the second and seventh devices are flip-mounted on a ceramic substrate. 8. The amplification device according to 7. 18. The first high-frequency transistor, a third device in which the first resistor and the fourth resistor connected to the gate of the first high-frequency transistor are manufactured on the same device, The second high-frequency transistor, and an eighth device in which the fifth resistor and the eighth resistor connected to the gate of the second high-frequency transistor are manufactured on the same device; 9. The amplifying device according to claim 8, wherein the eighth device is flip-mounted on a ceramic substrate. 19. The first high-frequency transistor, the first resistor connected to the gate of the first high-frequency transistor, and the third resistor connected to the drain of the first transistor are the same. A fourth device manufactured on the device of the above, and the second high-frequency transistor;
A fifth device connected to a gate of the second high-frequency transistor, and a ninth device manufactured on the same device as the seventh resistor connected to a drain of the second transistor; The amplifying device according to claim 9, wherein the fourth and ninth devices are flip-mounted on a ceramic substrate. 20. A fifth device in which the first high-frequency transistor, the first resistor connected to the gate of the first high-frequency transistor, and the fourth resistor are manufactured on the same device. The second high-frequency transistor; the fifth resistor connected to the gate of the second high-frequency transistor; and a tenth device in which the eighth resistor is manufactured on the same device. The amplification device according to claim 10, wherein the fifth device and the tenth device are flip-mounted on a ceramic substrate.