JPH11299776A - Ultrasonic diagnostic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the cost by enabling even a relatively slow signal processing circuit after a phase adjusting adder sufficiently to be used, in an ultrasonic diagnostic equipment with a digital beam former. SOLUTION: The beam former is equipped with an A/D convertor 10 to digitize an echo signal obtained based on ultrasonic transmit-receive waves and a phase shifter 12 to adjust the phase of an echo signal digitized by the A/D convertor 10 on each channel. A base band convertor 18 to digitally and orthogonally detect an echo signal after shifted by the phase shifter 12 and convert the signal to a base band signals I, Q with low frequency than that is equipped on each channel. A phase adjusting adder 6 to adjust the phase and add the output from a phase shifting part 12 of each channel is also included.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ultrasonic diagnostic apparatus provided with a digital beamformer for forming a reception beam by digitizing an echo signal obtained based on transmission and reception of ultrasonic waves.

[0002]

2. Description of the Related Art In order to enhance directivity, a conventional ultrasonic diagnostic apparatus digitizes echo signals obtained by transmitting and receiving ultrasonic waves by vibrators of respective channels, and then converts the phase of the echo signals. There is a device provided with a digital beamformer for forming a reception beam by performing phasing and addition together with the above.

FIG. 4 is a block diagram showing a configuration of a digital beamformer in a conventional ultrasonic diagnostic apparatus.

[0004] In the figure, 1 ₁ 1n vibrator for transmitting and receiving ultrasonic waves, 2 ₁ to 2n is transmitting circuit for transmitting ultrasonic waves by driving exciting each transducer 1 ₁ 1n, 4 ₁ to 4n is a reception circuit for a predetermined signal processing and reception of ultrasonic echo by the transducers 1 ₁ 1n.

[0005] Each transducer ₁ 1 1n, transmitting circuit 2 ₁
To 2n, and reception circuit 4 ₁ to 4n are provided respectively n channels. In addition, as the number of channels n,
For example, those having n = 128 or n = 256 are used.

[0006] 6 is a phasing adder to any phasing addition of the echo signal output from each of the reception circuit 4 ₁ to 4n.

[0007] Since it is all reception circuit 4 ₁ to 4n of the configuration of each channel of the same, wherein the reception circuit, for example 4 ₁ for one channel will be described in more detail.

[0008] The reception circuit 4 ₁ includes a preamplifier 8 amplifies an echo signal outputted from the transducer 1 _1, A / D for digitizing by quantizing the echo signal through the preamplifier 8 at a predetermined sampling frequency The converter 10, this A /
And a phase shifter 12 for making the phase of the echo signal digitized by the D converter 10 uniform.

The phase shifter 12 comprises a memory 14 for storing digitized echo signal data and an interpolation circuit 16 for interpolating echo signal data read from the memory 12 at a predetermined timing.

Next, the operation of the beam former of the conventional ultrasonic diagnostic apparatus shown in FIG. 4 will be described. Here, the operation will be described focusing on one channel, but the basic operation is the same for the other channels.

Now, the transmission circuit 2 of a certain channel
When the drive pulse is outputted from the _1, the predetermined frequency f ₀ vibrator 1 ₁ is driven excited by the drive pulse
Is emitted toward the subject (not shown).

[0012] ultrasonic echoes reflected from the object is received wave to the vibrator 1 ₁ again, where it is converted into an electric signal is outputted as an echo signal. Then, the echo signal of the high frequency, the preamplifier 8 constituting the reception circuit 4 ₁
, And digitized by the A / D converter 10,
This echo signal is temporarily stored in the memory 14 constituting the phase shifter 12.

The data of the echo signal stored in the memory 14 is read out at a predetermined timing so that the phase of each channel matches, and then input to the interpolation circuit 16.

Here, since the digitized echo signal data exists discretely in a time series, even when the phases of the respective channels are aligned, actual data is output for each corresponding time. May not exist. For this reason,
The interpolation circuit 16 interpolates between data such that data exists at the same time between channels.

[0015] In this way, the reception circuit 4 ₁ of each channel
The data of the echo signals whose phases have been aligned by 4n are subjected to phasing addition in the phasing adder 6 and output.

[0016]

[SUMMARY OF THE INVENTION Incidentally, when the center frequency of the ultrasonic wave was set to f _0, ultrasonic waves are actually transmitted and received waves, the frequency distribution in a predetermined range before and after the center of this center frequency f ₀ doing. Therefore, in order to improve the signal processing precision for the echo signal based on the transmission and reception waves of such ultrasound, it is necessary to digitize the echo signal with a sufficiently high sampling frequency than the center frequency f ₀ of the above.

For this reason, in the beamformer of the ultrasonic diagnostic apparatus having the configuration shown in FIG.
Sampling frequency sufficiently higher than f ₀ (for example, 4f ₀ )
We are going digital.

As described above, since the sampling rate for digitizing the echo signal depends on the frequency of the ultrasonic wave, when handling a high-frequency ultrasonic wave, the sampling frequency of the A / D converter is adjusted accordingly. Accordingly, it is necessary to use a circuit that can perform high-speed digital processing for the circuit at a later stage, and the number of data points increases, which causes a cost increase.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems. The present invention has been made to reduce the data transfer rate at the time of phasing addition, and the signal processing circuit thereafter operates at a relatively low speed. It is an object of the present invention to make it possible to sufficiently use the device and to reduce the cost of the device.

[0020]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides an A / D converter for digitizing an echo signal obtained based on the transmission and reception of ultrasonic waves, and an A / D converter for digitizing the echo signal.
A phase shifter for aligning the phase of the echo signal digitized by the D converter is provided for each channel, and a phase adjuster for phasing and adding the output from the phase shifter for each channel. The following configuration is employed in an ultrasonic diagnostic apparatus including a beam former.

That is, in the invention according to claim 1,
Each channel is provided with a baseband converter that digitally performs quadrature detection on the echo signal that has been phase-shifted by the phase shifter and converts it into a baseband signal of a lower frequency.

According to a second aspect of the present invention, in the configuration of the first aspect, the baseband converter includes at least a register and an adder, and performs quadrature detection processing and FI
It is configured to perform the R filter processing at the same time.

[0023]

FIG. 1 is a block diagram showing a main part of a digital beamformer constituting an ultrasonic diagnostic apparatus according to an embodiment of the present invention. FIG. 1 shows a portion corresponding to the conventional example shown in FIG. Are given the same reference numerals.

[0024] shows only reception circuit, for example 4 ₁ part of one channel constituting Figure 1, beamformer, configuration of the reception circuit 4 ₂ to 4n of other channels is the same. Therefore, here by focusing only on the reception circuit 4 ₁ of one channel will be described in detail about the configuration.

[0025] In FIG. 1, 1 ₁ vibrator 2 ₁ transmitting circuit,
4 ₁ is a reception circuit. Reference numeral 8 denotes a preamplifier, 10 denotes an A / D converter, 12 denotes a phase shifter, 14 denotes a memory, and 16 denotes an interpolation circuit. These components are basically the same as those of the conventional example shown in FIG. Therefore, detailed description is omitted here.

The feature of this embodiment converts the reception circuit 4 _1, the echo signals after phase by the phase shifter 12 by digitally quadrature detection than this to the low-frequency baseband signal That is, a baseband converter 18 is provided.

FIG. 2 shows a specific configuration of the baseband converter 18.

The baseband converter 18 includes a quadrature detection processing section 20, an FIR filter processing section 22, and a FIF
O memory 24.

The quadrature detection processing section 20 includes an A / D converter 10
The echo signal sampled at the frequency of 4f ₀ (f ₀ : the center frequency of the ultrasonic wave) and phase-adjusted by the phase shifter 12 is digitally quadrature-detected, and has both the sum and difference of the frequencies. one of the signals (hereinafter referred to as I and Q signals) used to generate alternately in time division, in this example, seven registers 30 ₁ to 30 ₇ and two multipliers 32 _1, 32 ₂ and Consists of

The FIR filter processing section 22 is for digitally removing unnecessary high frequency components contained in the I signal and the Q signal obtained by the quadrature detection in the quadrature detection processing section 20, respectively. , Two bit shifters 3
4 _1, 34 _2, two multipliers 36 _1, 36 _2, and is constituted that the digital low-pass filter by three adders 38 ₁ to 38 _3, in this example, the filter coefficients are [-
0.125, 1.0, 1.0, -0.125].

Next, the operation of the configuration shown in FIGS. 1 and 2, particularly the operation of the baseband converter 18, will be mainly described.

[0032] Here, although description focuses on reception circuit 4 ₁ of one channel, the basic operation is also the reception circuit 4 ₂ to 4n other channels are the same.

The echo signal obtained based on the ultrasonic transmitting and receiving waves, reception circuits 4 ₁ of the A / D converter 10 4f _0: are digitized at a sampling frequency of (f ₀ ultrasonic center frequency), Further, after a predetermined phase shift amount is given by the phase shifter 12 to adjust the phase, it is input to the baseband converter 18.

The baseband echo signal input to the converter 18 the data are sequentially stored in the shift register 30 ₁ to 30 ₇ of the quadrature detection processing unit 20.

Here, to orthogonally detect the echo signal (center frequency f ₀ ) in an analog manner, the phases are different from each other by 90 °.
By mixing with each carrier signal of cos ωt and sin ωt (where ω = 2πf ₀ ), two signals of I signal and Q signal can be obtained. However, since the actual echo signal is digital data, it is digitally orthogonal. Detection processing is required.

Now, each carrier signal of cos ωt and sin ωt can be digitally described as follows.

[0037] cosωt: 1,0, -1, 0,1,0, -1, ...... sinωt: 0,1, 0, -1,0,1, 0, ...... each period (= 1 / f ₀ ), Sinωt is [1, 0, -1,
0], and cosωt is [0, 1, 0, -1].
Are repeated with a shift of one bit. Note that the shift of one bit corresponds to a phase difference of 90 °.

Therefore, in order to perform quadrature detection on discrete echo signal data, an I signal is obtained by multiplying the echo signal by each of the above coefficients, and a Q signal is obtained by multiplying each of the above coefficients. Will be done.

Therefore, when the echo signal data is stored in the registers 30 ₁ to 30 ₇ in time series, multiplying each coefficient in order from the right end multiplies the carrier signal of cos ωt in an analog manner. Become.

Here, the coefficient "1" is to output the signal as it is without processing, and the coefficient "0" is a state in which no signal is output. register 30 _1, 30 _3, so that the I signal is obtained from the output of 305,30 _7.

Next, the register 30 ₁ to 30 ₇ in the right direction 1
Shifting bits, the output of the data stored in the right end of the register 30 ₁ prior to shifting becomes "0",
Before shifting the data stored from the right end in the second register 30 _2, in order to move to the right end of the register 30 ₁ would then be multiplied by the coefficient "1" to the output data of the register 30 ₁ at this time. In other words, by one bit shifting the whole, it will be multiplied by a factor of the relative echo signal stored in the register 30 ₁ to 30 _7,
In analog terms, a carrier signal of sinωt is multiplied.

Also in this case, the coefficient "1" is to output the signal as it is without processing, and the coefficient "0" is a state in which no signal is output. Favorites registers 30 _1, 30 _3, so that the Q signal is obtained by the output of 305,30 _7.

As described above, each time the registers 30 ₁ to 30 ₇ are shifted rightward by one bit, the quadrature detection processing unit 20 alternately outputs the I signal and the Q signal in a time division manner. Then, the I signal and the Q signal are input to the FIR filter processing unit 22 in the next stage.

The FIR filter processing section 22 converts the I signal and the Q signal
It acts as a low-pass filter that passes only the low-frequency component of the signal, and its filter coefficient is [-
0.125, 1.0, 1.0, -0.125].

In order to realize this, in this embodiment,
It is as follows.

Assuming that the value of the input data is X, if the input data is shifted by k bits in the low value direction, the value becomes X · (1/2) ^k . That is, shifting by k bits is equivalent to multiplying the value X of the input data by a coefficient of (1/2) ^k .

Therefore, the two output data at the right end and the left end of the quadrature detection processing section 20 are respectively output to the bit shifters 34 ₁ , 3.
Is input to the 4 _2, the bit shifter 34 _1, 34 _2,
It is shifted in the lower value direction by a predetermined number of bits (here, k = 3 bits). This is because (1/2) ² =
This means that the coefficient is multiplied by 0.125.

[0048] Then, the output of the bit shifter 34 _1, 34 _2, after the coefficients "-1" at the multipliers 36 _1, 36 ₂ are multiplied and added by the adder 38 _2.

[0049] Further, the remaining two output data of the orthogonal detection processing unit 20 is added is inputted to the adder 38 ₁ as it is without being any processed (equivalent to this was multiplied by a coefficient "1") You.

[0050] Furthermore, the adders 38 _1, the output of the 38 ₂ are added further adder 38 ₃ single output.

In this way, unnecessary high frequency components included in the I signal and the Q signal obtained by the quadrature detection in the quadrature detection processing section 20 are digitally removed by passing through the FIR filter processing section 22, and the DC ( A baseband signal having a frequency distribution centered at DC) is obtained.

The baseband I and Q signals alternately output from the FIR filter processing unit 22 in a time-division manner are serially input to the FIFO memory 24 as shown in FIG.

A write clock and a read clock are independently supplied to the FIFO memory 24. Therefore, the baseband I signal and Q signal which are alternately input serially are shown in FIG. 3 (b). The I signal and the Q signal written at such timings are then
The data is read out at the timing shown in FIG.

[0054] That is, the frequency of the write clock to the FIFO memory 24 is 4f _0, the baseband signal I, are thinned half of Q are stored in the memory 24 by intermittently supplying the write clock . On the other hand, by setting the frequency of the read clock for the FIFO memory 24 to 2f ₀ , the I signal and the Q signal are all output at the same cycle (= １ ／ f ₀ ).

Therefore, the data transfer rate from the baseband converter 18 to the phasing adder 6 is 2f ₀ , that is,
This is の of the sampling rate 4f ₀ of the A / D converter 10.

As a result, there is no need to use a circuit that can perform high-speed digital processing as in the conventional circuit, and the number of data points to be handled is reduced, as compared with the circuit at the stage subsequent to the phasing adder 6.

In this embodiment, in order to facilitate understanding of the operation, the quadrature detection processing unit 20 and the FIR filter processing unit 22 of the baseband converter 18 have multipliers 32 ₁ , 32 ₂ , 36 ₁ , respectively. a configuration has been shown in which a 36 _2,
Using adders 38 _1, 38 a subtracter instead of _2, these multipliers 32 _1, 32 _2, 36 _1, 36 ₂ it is possible to omit all the circuit configuration of the baseband converter 18 Can be further simplified.

In this embodiment, the filter coefficients of the FIR filter processing section 22 are [−0.125, 1..
0, 1.0, -0.125], the data input from the quadrature detection processing unit 20 to the FIR filter processing unit 22 has 4 taps. However, the present invention is not limited to this, and a low-pass filter having a steep band may be configured with a larger number of taps in consideration of the band of the ultrasonic wave. Alternatively, a low-pass filter with a narrow band may be configured.

[0059]

According to the present invention, the following effects can be obtained.

(1) By providing the baseband converter as described in claim 1, the data transfer rate at the time of phasing addition can be reduced, so that the subsequent signal processing circuits operate at a relatively low speed. Even if there is, it can be used sufficiently, and the cost of the apparatus can be reduced.

(2) According to the configuration of claim 2, the quadrature detection processing and the FIR filter processing can be performed simultaneously, and the configuration of the baseband converter is simplified.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a main part of one channel of a digital beamformer in an ultrasonic diagnostic apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a specific configuration of a baseband converter provided in a receiving circuit of each channel of the digital beamformer of FIG.

FIG. 3 is a timing chart for explaining the operation of the circuit of FIG. 1;

FIG. 4 is a block diagram showing an ultrasonic diagnostic apparatus provided with a conventional digital beamformer.

[Explanation of symbols]

1 ₁ 1n ... vibrator, 2 ₁ to 2n ... transmitting circuit, 4 ₁ to 4n ... reception circuit, 6 ... phasing addition circuit, 10 ... A / D converter, 12 ...
Phase shifter, 18 baseband converter, 20 quadrature detection processing unit, 22 FIR filter processing unit, 24 FIFO memory, 30 ₁ to 30 ₄ registers, 32 ₁ , 32 _2, multipliers, 34 ₁ , 34 ₂ ... bit shifter, 36 _1, 36 ₂ ... multipliers, 38 _{1-38 3} ... adder.

Claims (2)

[Claims] An A / D converter for digitizing an echo signal obtained based on transmission / reception of an ultrasonic wave, and a phase shifter for aligning the phase of the echo signal digitized by the A / D converter are provided. An ultrasonic diagnostic apparatus provided with a digital beamformer that is provided for each channel and includes a phasing adder for phasing and adding the output from the phase shifter for each channel; An ultrasonic diagnostic apparatus, comprising: a baseband converter that digitally performs quadrature detection of an echo signal that has been phase-shifted by a phase shifter and converts the echo signal into a baseband signal having a lower frequency. 2. The ultrasonic diagnostic apparatus according to claim 1, wherein the baseband converter includes at least a register and an adder, and is configured to perform quadrature detection processing and FIR filter processing simultaneously. An ultrasonic diagnostic apparatus characterized by the above-mentioned.