JPH11298310A - Solid-state relay - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a turn-on time without accompanying increase in costs and power consumption by charging capacity between the gate and source of a transistor with electric charge of a capacitive element that is charged with load voltage and reducing a voltage build-up time between the gate and source. SOLUTION: When an optical signal is received, a photodiode array 2 generates current, a control circuit 4 receives it and becomes high impedance and the current charges capacity between the gate and source of an N channel enhancement type field-effect transistor 3. Since electric charge, that is charged in a capacitive element 7 when an optical signal is not received, also charges the capacity between the gate and source of the transistor 3 through a discharge current limit resistance 6, and NPN type transistor 5 and the controller 4, voltage build-up between the gate and source is accelerated. When the voltage between the gate and source exceeds threshold voltage, a part between output terminals 3a and 3b becomes a conductive state and current is caused to flow from a load power supply 16 to a load 15.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid state relay (SSR), and more particularly to an operation control of an SSR using a field effect transistor as an output element.

[0002]

2. Description of the Related Art Conventionally, there is an SSR circuit of this type shown in FIG. This configuration includes a light emitting element 1 that generates an optical signal in response to an input signal, a photodiode array 2 that receives the optical signal and generates a photovoltaic power, and a photovoltaic power of the photodiode array 2 that is gated. A field effect transistor 3 applied between the source and the drain and the source switches between a conductive state and a non-conductive state, and a control circuit 4 for discharging a charge charged between the gate and the source of the field effect transistor 3. Have.

The operation of the configuration shown in FIG. 1 will be described below. When an input current flows between the input terminals 1a and 1b of the SSR, the light emitting element 1 generates an optical signal. An electromotive force is generated. This electromotive force is applied between the gate and the source of the field effect transistor 3 to charge the capacitance between the gate and the source.
Between the R output terminals 3a-3b from a non-conductive state to a conductive state,
Alternatively, the state changes from the conductive state to the non-conductive state (turn-on).

Next, when the input current between the input terminals 1a-1b of the SSR is cut off, the photodiode array 2
, The electric charge accumulated in the capacitance between the gate and the source of the field effect transistor 3 is discharged through the control circuit 4 and the state between the output terminals 3a and 3b of the SSR is changed from the conductive state to the non-conductive state. Or a transition from a non-conducting state to a conducting state (turn-off).

[0005]

In the above-mentioned SSR, the field effect transistor 3, which is an output switching element, has a parasitic capacitance between the gate and the source, and turns on between the drain and the source of the field effect transistor 3. For this purpose, it is necessary to charge the capacitance between the gate and the source to a threshold voltage or more. However, the output current of the photodiode array 2 for driving the field effect transistor 3 is usually about several μA, and the capacitance between the gate and source of the field effect transistor 3 is charged to a threshold voltage to turn on the drain and source. It takes at least several hundred microseconds. That is,
After an input signal is input between the input terminals 1a and 1b of the SSR, it takes at least several hundreds of microseconds until the output terminals 3a and 3b are turned on.

In order to shorten the turn-on time, the following four methods have been roughly divided into the following.
First, a means of increasing the light receiving area of the photodiode array 2 to increase the output current has been considered. However, the effect is small in spite of an increase in cost (a decrease in the yield due to an increase in the chip area). Did not.

Second, the photodiode array 2
In order to improve the luminous efficiency and increase the light output by changing the structure of the light emitting element 1 that supplies light to the light source (eg, homojunction → double heterojunction), the effect is thin and the turn-on time is greatly improved. I couldn't do that.

Third, a photodiode array 2
In order to increase the light output by supplying more current to the light-emitting element 1 that supplies light to the light-emitting element 1, this method is also less effective and further deteriorates the light-emitting element 1 (decreases luminous efficiency) and increases power consumption. It was not an optimal means because of the adverse effects.

Fourth, there has been considered a means of reducing the parasitic capacitance between the gate and the source of the driven field-effect transistor 3. (1) If the area of the gate electrode is reduced, the on-resistance increases. (2) Increasing the thickness of the gate oxide film lowers the sensitivity. (3) The material of the gate oxide film is determined by its manufacturing method. For that reason, we could not hope for a significant improvement.

The present invention has been made in view of the above-mentioned problems, and provides an SSR having a field-effect transistor whose turn-on time is greatly reduced as an output element.

[0011]

As shown in FIG. 2, the SSR according to the present invention has at least one or more light emitting elements 1 for generating an optical signal in response to an input signal. A photodiode array for receiving an optical signal and generating an electromotive force, wherein the electromotive force of the photodiode is applied between a gate and a source to switch between a conductive state and a non-conductive state between a drain and a source; An effect transistor 3; a control circuit 4 that forms a discharge path for accumulated charge between the gate and source of the field effect transistor 3 when the light output is lost; a rectifying element 9 between the drain and gate of the field effect transistor 3; A speed-up circuit connected in series with a current limiting resistor 8, a discharge current limiting resistor 6, and a transistor 5 driven by the electromotive force of the photodiode array 2; Is characterized in that it has configuration from the connected capacitor elements 7 for between said charging current limiting resistor 8 and the connection point of the discharge current limiting resistor 6 wherein the source of the field effect transistor 3.

The Zener diode 10 connected between the gate and the source of the field effect transistor 3
The resistor 11 connected between the base and the emitter of the transistor 5 is for overvoltage protection, and the presence or absence thereof does not greatly affect the basic operation.

[0013]

According to the present invention, the photodiode array 2
Since the transistor 5, the capacitor 7, etc., whose collector-emitter is in a low impedance state in response to the electromotive force, are connected between the gate and the drain of the field effect transistor 3, the load voltage is once charged to the capacitor 7, With this charge, the gate-source capacitance of the transistor 3 can be charged. Further, since the rectifying elements 9 are connected in series, it is possible to prevent the current from the photodiode array 2 from leaking from the gate of the field effect transistor 3 to the drain. Therefore, the time required for increasing the voltage between the gate and the source of the field effect transistor 3 can be reduced, and the turn-on time of the SSR can be reduced.

[0014]

FIG. 2 is a circuit diagram showing an embodiment of the present invention. The circuit configuration will be described below.
The light emitting element 1 is connected between the R input terminals 1a-1b. The photodiode array 2 is optically connected to the light emitting element 1. The anode of the photodiode array 2 is connected to the base of an NPN transistor 5,
The emitter of the NPN transistor 5 is connected to the gate of the N-channel enhancement type field effect transistor 3 via a control circuit 4 connected between the gate and the source of the N-channel enhancement type field effect transistor 3. The collector of the NPN transistor 5 is connected to the drain of the N-channel enhancement field effect transistor 3 via a discharge current limiting resistor 6, a charging current limiting resistor 8, and a rectifying element 9. The cathode of the photodiode array 2 is connected to the source of an N-channel enhancement type field effect transistor 3 via a control circuit 4.

The capacitive element 7 is connected between the connection point between the discharge current limiting resistor 6 and the charging current limiting resistor 8 and the source of the N-channel enhancement type field effect transistor 3. The resistor 11 is connected between the base and the emitter of the NPN transistor 5. Zener diode 10 is N
Channel enhancement type field effect transistor 3
Connected between the gate and the source of the The drain and source of the N-channel enhancement type field effect transistor 3 are connected to the output terminals 3a-3b of the SSR, respectively. The above circuit is housed in one package.

A switch 12, a DC drive power supply 13, and a drive current limiting resistor 14 are connected in series between the input terminals 1a-1b of the SSR as external circuits. A load 15 and a load power supply 16 are connected in series as external circuits between output terminals 3a and 3b of the SSR. Now switch 1
2 is closed and the drive current limiting resistor 1
When a current flows through the light emitting element 1 through the light emitting element 4, the light emitting element 1 generates an optical signal. Upon receiving this optical signal, the photodiode array 2 generates a current. At this time, since the control circuit 4 enters a high impedance state, the current from the photodiode array 2 charges the capacitance between the gate and the source of the N-channel enhancement type field effect transistor 3.

Further, since the collector-emitter of the NPN transistor 5 conducts due to the current of the photodiode array 2, the electric charge charged in the capacitor 7 when the switch 12 is opened is reduced to the discharge current limiting resistor 6. And N
Since the capacitance between the gate and the source of the N-channel enhancement type field effect transistor 3 is charged through the PN transistor 5 and the control circuit 4, the increase in the voltage between the gate and the source of the N-channel enhancement type field effect transistor 3 is accelerated. Is done. When the voltage between the gate and the source of the N-channel enhancement type field effect transistor 3 exceeds the threshold voltage, the state between the drain and the source of the field effect transistor 3 becomes a low impedance state and the state between the output terminals 3a and 3b of the SSR becomes conductive. . As a result, a load current flows from the load power supply 16 to the load 15.

Even if the drain-source of the N-channel enhancement type field effect transistor 3 is completely conducted, the rectifying element 9 for preventing backflow is present, so that the current from the photodiode array 2 is reduced by the NPN transistor. 5. Discharge current limiting resistor 6 and charging current limiting resistor 8
No current flows between the drain and the source of the N-channel enhancement type field effect transistor 3 via the transistor.

Next, the switch 12 is opened to open the input terminal 1a.
When the current flowing between −1b is cut off and the optical signal from the light emitting element 1 disappears, the current from the photodiode array 2 disappears. At this time, since the control circuit 4 enters a low impedance state, the electric charge accumulated between the gate and the source of the N-channel enhancement type field effect transistor 3 is rapidly discharged through the control circuit 4. As a result, a high impedance state is established between the drain and source of the N-channel enhancement type field effect transistor 3, and a non-conductive state is established between the output terminals 3a and 3b of the SSR.

[0020]

As described above, the SSR of the present invention reduces the delay of the turn-on time due to the shortage of the photovoltaic power of the photodiode array when driving the field effect transistor by the photovoltaic power generated in the photodiode array. There is an effect that the charge that has been charged using the load voltage is used to make up for and compensate for the delay in the turn-on time.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a conventional solid state relay (SSR).

FIG. 2 is a circuit diagram of a solid state relay showing one embodiment of the present invention.

[Explanation of symbols]

 1: light emitting element 1a: input plus terminal 1b: input minus terminal 2: photodiode array 3: field effect transistor 3a: output plus terminal 3b: output minus terminal 4: control circuit 5: transistor 6: resistive impedance for limiting discharge current 7: Capacitance element 8: Resistive impedance for charging current limitation 9: Rectifier element 10: Zener diode 11: Resistance 12: Switch 13: DC drive power supply 14: Driving current limiting resistance 15: Load 16: Load power supply

Claims (2)

[Claims] A light-emitting element for generating an optical signal in response to an input signal; a photodiode array for receiving an optical signal of the light-emitting element and generating an electromotive force; A field effect transistor in which an electromotive force of a diode array is applied between a gate and a source to switch between a conductive state and a non-conductive state between a drain and a source, and a charge stored between a gate and a source of the field effect transistor when light output is lost. A control circuit forming a discharge path, and a rectifier, a charging current limiting resistor, a discharging current limiting resistor, and a transistor driven by the electromotive force of the photodiode array are connected in series between the drain and the gate of the field effect transistor. Speed-up circuit, a connection point between the charge current limiting resistor and the discharge current limiting resistor, and a source of the field effect transistor. A solid state relay comprising a capacitor connected between the capacitor and the capacitor. 2. The solid-state relay according to claim 1, further comprising a thyristor instead of the transistor of the speed-up circuit.