JPH11298293A - Phase shift circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wide band phase shift circuit with which a phase can be shifted at 90 deg. over a wide frequency range in simple and low-cost configura tion requiring no complicated compensation or control. SOLUTION: This phase shift circuit is composed of phase shifters 40-1 to 40-N composed of resistors and capacitors formed on a semiconductor chip and amplifiers 2 and 6. The central frequency of the phase shift circuit is equal with a cutoff frequency determined from the constant of a passive element consisting of the phase shifters. When continuously using the phase shift circuit under the cascade connection of the plural phase shifters, by changing the cutoff frequency of the phase shifters, the phase can be shifted at 90 deg. over the wide band. Thus, the output at the same level can be provided with an exact phase difference and low voltage operation is made possible as well.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase shift circuit applicable to, for example, a digital communication circuit.

More specifically, the present invention provides an input differential amplifying means, a phase shift means connected to a stage subsequent to the input differential amplifying means, and an output differential amplifying means connected to a stage subsequent to the phase shift means. The present invention relates to a phase shift circuit including an amplifying unit.

[0003]

2. Description of the Related Art As is widely known, a phase shift circuit plays an extremely important role as a part of a digital mobile communication circuit.

[0004] That is, a quadrature modulator and a quadrature demodulator are provided in a digital mobile communication circuit, and a mixer forming the quadrature modulator or a mixer forming the quadrature demodulator needs carrier waves which are different from each other by 90 degrees. And Then, a phase shift circuit is required to obtain the carrier.

FIG. 1 shows an example of a conventionally known phase shift circuit. In the figure, reference numeral 2 denotes a differential amplifier to which two input signals V _IN ⁺ and V _IN ^- are input, and 4 denotes two input signals V _P ⁺ and V _P ^- to input four phase component signals (0 °, 180 °, 90 °, 270 °), and 6 is a buffer differential amplifier.

FIG. 2 shows an example of the phase shifter 4 shown in FIG. In the figure, I ₀ ⁺ , I ₀ ⁻ , Q ₀ ⁺ , and Q ₀ ⁻ obtained from the respective terminals of the resistor and the capacitor as four phase component signals.
Is used.

The phase shift circuit (FIG. 1) shifts the phase of an input signal to obtain an output having a difference between two output phases of 90 degrees. For a detailed description of the phase shift circuit, see “Communication filter circuit design and its application,” for example.
(2nd edition, 1997, Sogo Denshi Publisher).

[0008]

However, when a phase shifter is formed using resistors and capacitors on a semiconductor integrated circuit, the size of the circuit itself can be reduced, but on the other hand, due to process variations, The values of the resistance and the capacitance also fluctuate, and there is a disadvantage that the cutoff frequency also fluctuates in accordance with the fluctuations. In particular, when the cutoff frequency fluctuates, a deviation occurs in the output phase difference.

For these reasons, conventionally, it has been necessary to provide an external adjustment circuit or an automatic correction circuit for adjusting the cutoff frequency, and there has been a problem that the circuit itself becomes large-scale.

[0010] In addition, when the phase shifter is formed using the resistance and the capacitance as described above, there is a problem that it is not easy to widen the band since the band is determined by the constant of the passive element.

Accordingly, an object of the present invention is to provide
An object of the present invention is to provide a phase shift circuit capable of obtaining the same output level with an accurate phase difference without increasing the circuit scale and achieving a wide band.

[0012]

In order to achieve the above object, a phase shift circuit according to the present invention comprises an input differential amplifying means, and a phase shift means connected to a stage subsequent to the input differential amplifying means. And a differential amplifying means for output connected at a subsequent stage of the phase shifting means, wherein the phase shifting means includes a plurality of RC networks comprising a plurality of resistance elements and a plurality of capacitance elements. Are connected in cascade.

Here, a polyphase shifter can be used as the RC network.

In addition, it is possible to insert an amplitude compensating differential amplifying means for compensating for the attenuation of the amplitude between the plurality of RC networks.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. 3 shows an embodiment in which a plurality of phase shifters 40-1 to 40-N are connected in cascade.

FIG. 4 is a circuit diagram showing a polyphase shifter formed of a resistor and a capacitor formed on a semiconductor chip and suitable for use as a phase shifter.

In the following description, a phase shifter means a block (RC network) constituting a phase shifter including only passive elements, and a phase shifter means a block connecting a plurality of phase shifters. Further, the phase shift circuit means all circuits including a phase shifter unit, a differential amplifier, and the like.

In the first embodiment, the polyphase shifter shown in FIG. 4 is used to reduce the variation in the amount of phase shift due to process variations. This circuit has a flat gain and phase shift over a wider band than a conventionally known phase shifter (see FIG. 2).

However, although the characteristics of the polyphase shifter shown in FIG.
When it is necessary to handle two different bands, that is, a 0 MHz band and a 1800 MHz band, even if a single polyphase shifter is used, it is impossible to maintain characteristics as a phase shifter over 900 MHz to 1800 MHz.

Therefore, when such a phase shifter for a wide band application is required, for example, two phase shifters are cascaded, and one cutoff frequency is set to 900 MHz and the other cutoff frequency is set to 1800 MHz. Thereby, good characteristics can be maintained in two different bands. When such a cascade configuration is employed, the two phase shifters may be constituted by polyphase shifters, or the phase shifter shown in FIG. 2 may be used as one of the phase shifters.

However, when a plurality of phase shifters are cascaded, it is necessary to connect the phase shifters in order from the one with the highest cutoff frequency. This is because, if a low cut-off frequency is connected to the first stage, a high-frequency signal is attenuated by the first-stage phase shifter, and desired characteristics cannot be achieved. In consideration of this point, in the case of the above example, a phase shifter for 1800 MHz is arranged in the first stage, and a 90 °
It is appropriate to arrange a phase shifter for 0 MHz.

Furthermore, in order to accurately achieve a phase shift of 90 degrees, it is necessary to minimize harmonic distortion of a signal input to the phase shifter. Therefore, in the present embodiment, the amplitude of the signal is suppressed in order to improve the distortion factor of the signal, and the amplifier is operated in a region where the first-stage amplifier circuit is not saturated so as not to deteriorate the amplifier output. As a result, there is a margin for the saturation condition of the transistor, and accordingly, a low voltage operation becomes possible.

Embodiment 2 FIG. 5 shows a configuration example in which a buffer differential amplifier 50 is inserted between phase shifters.

If the output of the phase shifter in a certain stage becomes very small and as a result the performance is not good, it is amplified by the buffer differential amplifier 50 and then input to the next-stage phase shifter. Good performance can be maintained. Thus, by inserting an amplifier between the phase shifters, the phase shifters can be cascaded in any number of stages.

In the configuration of FIG. 5, a band which can be shifted as long as the operation band of the transistor permits can be added, so that a phase shifter having a wider band can be designed.

On the other hand, since the phase shifter itself also has frequency characteristics, there is an advantage that higher frequencies can be attenuated by using a multi-stage configuration.

Other Embodiments The phase shift circuit is commonly used in a transmitting circuit or a receiving circuit, both of which are within the scope of the present invention. Further, the present invention is not limited to the 90-degree phase shift, and is applicable to any phase shift amount.

[0028]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Specific circuit configurations corresponding to the above-described embodiments will be described below. FIG. 6 is a diagram for explaining the arrangement of the drawings in the first and second embodiments.

Embodiment 1 FIGS. 7 to 12 are circuit examples showing good phase shift characteristics from 900 MHz to 1.8 GHz.

An input signal first enters a differential amplifier composed of differential pairs Q1 and Q2 (see FIG. 10).
The outputs outp and outn of the second pass into the 1.8 GHz band phase shifter (see FIG. 7), and the output further goes into the 900 MHz band phase shifter (see FIG. 8).
The signal received by the emitter follower 6 and amplified by the output buffer amplifier consisting of Q7 to Q14 becomes the output of the phase shift circuit.

In this embodiment, the output amplifier has a two-stage configuration because the first stage obtains a desired amplitude and
This is because it is necessary to adjust the output destination and the impedance at the stage.

In the 1.8 GHz band phase shifter of the circuit example shown in FIG. 7, the resistance is 360Ω and the capacitance is 0.25p.
F was selected. On the other hand, in the 900 MHz band phase shifter shown in FIG. 8, the resistance value is 720Ω and the capacitance value is 0.25p.
F was selected.

Embodiment 2 When the amplitude is relatively large and amplification is not necessary, FIG.
To the first stage differential amplifier (FIG. 1).
Q1 and Q2) shown in FIG. Therefore, the second embodiment is a circuit suitable for a design with low current consumption.

[0034]

As described above, according to the phase shift circuit of the present invention, an output of the same level can be obtained with an accurate phase difference, a low voltage operation can be performed, and further downsizing can be achieved. Excellent effect is obtained.

[Brief description of the drawings]

FIG. 1 is a diagram showing a conventionally known phase shift circuit.

FIG. 2 is a diagram illustrating a circuit example of the phase shifter illustrated in FIG. 1;

FIG. 3 is a diagram showing a basic configuration when phase shifters are cascaded according to the present invention.

FIG. 4 is a diagram showing a circuit example of a polyphase shifter to which the present invention is applied.

5 is a diagram showing a basic configuration when an amplifier is inserted between the phase shifters shown in FIG.

FIG. 6 is a diagram for explaining the arrangement of the drawings in the first and second embodiments.

FIG. 7 is a circuit diagram of the first embodiment.

FIG. 8 is a circuit diagram of the first embodiment.

FIG. 9 is a circuit diagram of the first embodiment.

FIG. 10 is a circuit diagram of the first embodiment.

FIG. 11 is a circuit diagram of the first embodiment.

FIG. 12 is a circuit diagram of the first embodiment.

FIG. 13 is a circuit diagram of a second embodiment.

FIG. 14 is a circuit diagram of a second embodiment.

FIG. 15 is a circuit diagram of a second embodiment.

FIG. 16 is a circuit diagram of a second embodiment.

FIG. 17 is a circuit diagram of a second embodiment.

FIG. 18 is a circuit diagram of a second embodiment.

FIG. 19 is a circuit diagram of a second embodiment.

[Explanation of symbols]

 2 Differential Amplifier 4 Phase Shifter 6 Buffer Differential Amplifier 40 Phase Shifter 50 Buffer Differential Amplifier

Claims (3)

[Claims] 1. A phase comprising input differential amplifying means, phase shifting means connected to a stage subsequent to the input differential amplifying means, and output differential amplifying means connected to a stage subsequent to the phase shifting means. In the shift circuit, a plurality of RC networks composed of a plurality of resistance elements and a plurality of capacitance elements are cascade-connected as the phase shift means. 2. The phase shift circuit according to claim 1, wherein a polyphase shifter is used as the RC network. 3. The phase shift circuit according to claim 1, further comprising an amplitude compensating differential amplifier inserted between said plurality of RC networks.