JPH11296255A - Information processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce hardware such as a clock and a battery in an information processor, to secure the normality of a clock by an inexpensive device and to provide an inexpensive abnormality detection means. SOLUTION: Respective MPUs 19, 20 in clock control parts 10, 11 read out the values of interval timers 17, 18 and the values of clocks 15, 16, record the read values in respective memories 21, 22, calculate the advanced time values of the timers 17, 18 and of the clocks 15, 16 and compare both the advanced values. When the difference between both advanced time values exceeds a fixed value, the clocks 15, 16 are judged as abnormal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information processing apparatus such as a computer which has a clock in the apparatus and uses the clock to start an event and manage generations of various data.

2. Description of the Related Art In recent computers, a built-in clock backed up by a battery has been used for triggering an event start and managing various data (files). In such an electronic computer or the like, problems such as a serious processing occurring at an unintended timing or a failure of the processing occurring at a necessary timing occur due to a clock error. Further, logical inconsistency such as inversion of the generation time of data or the like occurs depending on the date and time, which may be a serious problem. Therefore, there has been a demand for always maintaining the accuracy of a clock built in an electronic computer or the like.

[0003]

2. Description of the Related Art A conventional example will be described below. §1: Description of Conventional Example 1—See FIG. 9A FIG. 9A is an explanatory diagram of Conventional Example 1. FIG. In the first conventional example, an electronic computer is provided with two clocks (pair clocks) for the active system and the standby system, respectively, and compares the clocks of the respective systems to ensure the normality of the clocks. This is an example in which a method called a "spare method" is employed, and is not actually used but is a proposed technique.

In this example, a pair 1 composed of two clocks, a clock 1 and a clock 2, is provided in an operating system, and a clock 3 is provided in a standby system.
And a pair 2 composed of two clocks, namely a clock 4 and a clock 4. Then, the two clocks 1 and 2 in the pair 1 provided in the active system are compared, and if the difference is within a preset value, the pair 1
Use the clock value of as the correct value. In this case,
There are various types of processing methods and correction means, such as using one of the two clocks or using the average value of the two clocks.

If the difference between the pair 1 clocks 1 and 2 is equal to or greater than a preset value, it is determined that the clock of the pair 1 is abnormal, and the operation system is switched to the standby system to switch the operation system to the standby system. Performs the same processing as. Then, the two clocks 3 and 4 in the pair 2 are compared, and if the difference is within a preset value, the clock value of the pair 2 is used as a correct value. In addition,
Also in this case, there are various types of processing methods and correction means, such as using one of the two clocks or using the average value of the two clocks. In this way, the normality of the watch is ensured.

§2: Description of Conventional Example 2—See FIG. 9B FIG. 9B is an explanatory diagram of Conventional Example 2. Conventional example 2 is an example in which the normality of a clock is ensured by a method called a “triple comparison method” in an electronic computer. As shown in FIG. 9B, three timepieces including a timepiece 1, a timepiece 2, and a timepiece 3 are provided, and the normality of the timepiece is ensured by comparing these tripled timepieces.

In this case, the values of clock 1, clock 2 and clock 3 are read and compared. When the values indicated by the two watches are equal (errors in a predetermined range are allowed)
Adopts that value as the correct value. If all the clocks are different, it is determined that there is an abnormality.

§3: Description of Conventional Example 3 Conventional Example 3 is an example in which one clock is used and this clock is used as a normal one. This example is an example known in a general-purpose electronic computer or the like. Note that the electronic computer has an interval timer for use for other purposes, not as a clock function, but this interval timer is not used for ensuring the normality of the clock.

[0009]

The above-mentioned prior art has the following problems. (1): In Conventional Example 1, it is necessary to use four clocks,
It causes cost increase. In addition, since it is necessary to back up each timepiece with a battery, the burden is increased in cost and physical scale, such as an increase in battery capacity.

(2): In the second conventional example, it is necessary to use three clocks, which causes an increase in cost. In addition, since it is necessary to back up each timepiece with a battery, the burden is increased in cost and physical scale, such as an increase in battery capacity.

(3): In Conventional Example 3, since one clock is used, it can be constructed at a low cost, but it is difficult to ensure the normality of the clock. (4): In the conventional device as described above, various methods are used for correcting the clock, such as receiving time information from the host device every day and correcting the clock. In particular, no consideration is given to the detection of a failure in a timepiece. Therefore, it is difficult to ensure perfect normality of the watch.

The present invention solves the above-mentioned conventional problems, reduces the physical quantity of a clock, a battery, and the like, and can ensure the normality of the clock with an inexpensive device. The purpose is to be able to provide.

[0013]

Means for Solving the Problems The present invention has the following constitution in order to achieve the above object. (1): An information processing apparatus including a clock backed up by a battery and an interval timer not backed up by a battery, and including a clock control unit having a function of checking the normality of the clock, wherein the clock control unit includes: Clock data reading and recording means for reading the value of the interval timer and the value of the clock and recording them in storage means (for example, a memory);
From the previously recorded value and the currently recorded value on the storage means, the elapsed time of the interval timer and the time of advance of the clock are calculated, and the elapsed time comparing means for comparing both advanced times, When the difference between the advanced times is equal to or greater than a predetermined value, the timepiece is provided with abnormality determining means for determining that the clock is abnormal.

(2): In the information processing apparatus of (1),
The storage means has a plurality of recording areas for recording the value read from the interval timer and the value read from the clock, and the clock control unit uses the plurality of recording areas to read from the interval timer. There is provided a function of improving the accuracy of abnormality detection of a clock by comparing a short interval at a predetermined short interval and a long interval at a longer interval based on the value and a value read from the clock.

(3): In the information processing apparatus of (1),
It has two timepiece control units to operate in duplicate. (4): In the information processing apparatus of (3), by sending a read request to the clock control unit, the clock data acquisition unit that acquires clock data from both clock control units, and the clock data acquisition unit acquires the clock data. If one of the clocks becomes abnormal due to the data obtained, the system (for example, CPU) is started with the normal clock, and if both clocks become abnormal, the system waits for the date and time input by the operator and sets the system. If both clocks are normal without starting, if the difference between the two clocks is within a certain time, the system is started with one predetermined clock, and the other clock is corrected to that time and If the difference between the two clocks is equal to or longer than a predetermined time, the system is provided with a system start-up control unit that does not start up the system waiting for date and time input from the operator.

(5): In the information processing apparatus of (3),
By sending a read request to the clock control unit, a clock data acquisition unit that acquires clock data from both clock control units, and by the data acquired by the clock data acquisition unit,
If one of the clocks becomes abnormal, start the system with the normal clock, and if both clocks become abnormal,
When the system is started at the last power-off time and both clocks are normal, if the difference between the two clocks is within a certain time, the system is started with one predetermined clock and the other clock is started. Is provided with a system start-up control unit that corrects the time and, if the difference between the two clocks is equal to or longer than a predetermined time, starts up the system at the previous power-off time.

(6): In the information processing apparatus of (3),
By sending a read request to the clock control unit, a clock data acquisition unit that acquires clock data from both clock control units, and by the data acquired by the clock data acquisition unit,
If one of the clocks becomes abnormal, start the system with the normal clock, and if both clocks become abnormal,
When the system was started at the last power-off time and both clocks became normal, the average value of the two clocks was calculated,
A system start-up control unit is provided for starting up the system with the average value and correcting both clocks with the average value.

(7) The value of the interval timer and the value of the clock are read out to a clock control unit having a clock backed up by a battery and an interval timer not backed up by a battery and having a function of checking the normality of the clock. And a procedure of calculating the time advanced by the interval timer and the time advanced by the clock from the previously recorded value and the value recorded this time, and comparing the advanced times of the two. And a computer-readable recording medium for recording a program for executing a procedure for determining that the clock is abnormal when the difference between the advanced times is equal to or greater than a preset value.

(Operation) The operation of the present invention based on the above configuration will be described. (a): Operation of the above (1) In the clock control section, the clock data reading and recording means reads the value of the interval timer and the value of the clock and records them in the storage means. Further, the elapsed time comparing means calculates the time that the interval timer has advanced and the time that the clock has advanced from the previously recorded value and the currently recorded value in the storage means, and compares the advanced times. Then, the abnormality determining means determines the
If the difference between the advanced times is equal to or greater than a preset value, the clock is determined to be abnormal.

In general, an information processing device such as an electronic computer has a built-in timepiece element for counting time even when the power is turned off. Further, in recent years, information processing apparatuses generally have an interval timer for operating an operating system or the like, even with a low function. Therefore, as described above, by using the interval timer that the information processing apparatus generally has,
The watch can be checked to ensure the normality of the watch.

Therefore, it is possible to detect a failure of the clock element (corrupted data, extreme advance / delay of the clock, etc.) with an inexpensive device, and an event occurs at an unintended timing, and an event does not occur at a necessary timing. Such problems as described above and errors in managing data managed by date and time can be prevented.

(B): Operation of the above (2) The clock control unit uses a plurality of recording areas to determine a short interval at a predetermined short interval based on the value read from the interval timer and the value read from the clock. And long intervals at longer intervals. In this way, the abnormality detection accuracy of the timepiece can be improved.

As described above, by comparing the short interval (for example, every 10 minutes) and the long interval (for example, every 2 hours), it is possible to improve the accuracy of detecting the abnormality of the clock. . That is, the clock element generally performs counting in seconds. Therefore, when comparing the elapsed time between the previous reading and the present reading, at least two clocks are required depending on the clock reading timing (just before carrying and immediately after carrying).
Second errors (differences in comparison) must be tolerated.

However, since the accuracy of the clock element itself is several seconds to several tens of seconds per month, the error of 2 seconds is a large value as the abnormality detection accuracy. Therefore, the accuracy of the abnormality detection of the timepiece can be improved by using both the comparison of the short interval for ensuring the number of checks and the long interval check for ensuring the accuracy.

(C): Operation of the above (3) It has two clock control units and operates in duplicate. in this way,
By providing two watches having a check function, a function equivalent to the pair-and-spare method described in the conventional example can be realized at low cost.

(D): Operation of the above (4) The clock data obtaining means obtains clock data from both clock control units by sending a read request to the clock control units. Then, when one of the clocks becomes abnormal due to the data acquired by the clock data acquiring means, the system activation control means activates the system with the normal clock, and both clocks become abnormal. In this case, the system is not started up waiting for the operator to input the date and time. If both clocks are normal, the system is started up with one predetermined clock if the difference between the two clocks is within a certain time. ,
The other clock corrects the time and, if the difference between the two clocks is equal to or longer than a predetermined time, performs control so as not to start up the system while waiting for date and time input from the operator.

In this way, it is possible to provide one control method when two clocks are provided, and it is possible to reliably prevent operation with an incorrect clock. In addition, the normality of the timepiece can be ensured by an inexpensive device, and an inexpensive abnormality detecting means can be provided.

(E): Operation of the above (5) The clock data obtaining means obtains clock data from both clock control units by sending a read request to the clock control units. Then, the device start-up control means starts up the system with a normal clock if one of the clocks becomes abnormal due to the data obtained by the clock data obtaining means.
If both clocks are abnormal, the system is started at the last power-off time. If both clocks are normal, if the difference between the two clocks is within a certain time, a predetermined value is set. The system is started with one clock, the other clock is corrected to that time, and if the difference between the two clocks is equal to or more than a predetermined time, the system is controlled to start up at the last power-off time.

In this way, it is possible to provide one control method when two clocks are provided, and it is possible to reliably prevent an operation with an incorrect clock. In addition, the normality of the timepiece can be ensured by an inexpensive device, and an inexpensive abnormality detecting means can be provided.

Further, by starting up the system as described above, processes such as detailed notification of the details of the abnormality and notification to the remote monitoring device are simplified. In addition, when the device operation (system operation) does not start and only the notification function needs to be secured, the system can be started up with a minimum guarantee (only the order of data is guaranteed).

(F): Operation of the above (6) The clock data obtaining means obtains clock data from both clock control units by sending a read request to the clock control units. Then, the device start-up control means starts the system with the normal clock if one of the clocks becomes abnormal based on the data obtained by the clock data obtaining means, and Starts the system at the last power-off time, and if both clocks are normal,
An average value of the two clocks is calculated, the system is started with the average value, and control is performed so that both clocks are corrected with the average value.

In this way, it is possible to provide one control method when two clocks are provided, and it is possible to reliably prevent operation with an incorrect clock. In addition, the normality of the timepiece can be ensured by an inexpensive device, and an inexpensive abnormality detecting means can be provided.

Further, the deviation from the normal time can be minimized, the system can be started up, the operation at the wrong time can be prevented, and the accuracy of the timepiece can be improved.

(G): action of the above (7): a step of reading the program of the recording medium and causing the clock control section to execute the program, thereby reading the value of the interval timer and the value of the clock and recording them in the storage means; From the previously recorded value and the value recorded this time, calculate the time that the interval timer has advanced and the time that the clock has advanced, and compare the two advanced times. If the value is equal to or greater than the set value, a procedure for determining that the clock is abnormal is performed.

By the way, in an information processing apparatus such as an electronic computer, an element dedicated to a clock is usually used to count time even when the power is turned off. Further, in recent years, information processing apparatuses generally have an interval timer for operating an operating system or the like, even with a low function. Therefore, as described above, by using the interval timer that the information processing apparatus generally has,
The watch can be checked to ensure the normality of the watch.

Therefore, failure of the clock element (corruption of data, extreme advance / delay of the clock, etc.) can be detected by an inexpensive method, and an event occurs at an unintended timing and an event does not occur at a necessary timing. Such problems as described above and errors in managing data managed by date and time can be prevented.

[0037]

Embodiments of the present invention will be described below in detail with reference to the drawings. §1: Description of the apparatus: see FIGS. 1 and 2 FIG. 1 is an explanatory view of the apparatus, and FIG. 2 is an explanatory view of a power supply system. Hereinafter, an apparatus used in the present embodiment will be described with reference to FIGS. This apparatus is an example in which the information processing apparatus is applied to a communication server (communication server). The communication server includes a clock control unit 10 connected to a system 0 system bus and a clock control unit 10 connected to a system 1 system bus. And a CPU (upper device) 12 connected to the 0-system bus and the 1-system bus.

The clock control unit 10 is composed of a printed board on which parts constituting the clock control unit are mounted.
3, a calendar clock (hereinafter simply referred to as a “clock”) 15 backed up by 3, an interval timer 17,
A microprocessor (hereinafter referred to as “MPU”) 19;
A memory 21 is provided. The clock control unit 11 is composed of a printed board on which components constituting the clock control unit are mounted, and includes a calendar clock (hereinafter simply referred to as “clock”) 16 backed up by a battery 14, and an interval timer 18. And a microprocessor (hereinafter “MPU”)
20) and a memory 22.

Incidentally, the above-mentioned interval timer is generally built in an electronic computer or the like for measuring time.
Ensure the normality of the battery-backed watch. Clocks 15 and 16 and interval timers 17 and 1
Reference numeral 8 denotes a value (date and time) which is read by the MPUs 19 and 20.
20.

The CPU 12 sends the clock 1 from the MPUs 19 and 20 via the system 0 system bus and the system 1 system bus.
5 and 16 are read out (a request command is sent and a response to the request command is received). In this example, the clock control units 10 and 11 are connected to the system 0 system bus and the system 1 system bus, so that the clock control units are duplicated.

The power supply system of the device is configured as shown in FIG. That is, the device shown in FIG.
There are two independent power supply units 24 and 25, and power is supplied from these power supply units to the respective units. In this case, the power supply unit 24 includes an AC-DC converter 26 and a power switch 28 that is turned on / off by the clock control unit 10. The power supply unit 25 includes an AC-DC converter 27 and a power switch 29 that is turned on / off by the clock control unit 11.

The AC-DC converter 26 of the power supply unit 24 and the AC-DC converter 27 of the power supply unit 25
Are connected to an AC power supply, and AC-DC converters 26 and 27 are connected.
A DC voltage is generated on the output side of. Further, the output of the AC-DC converter 26 is directly connected to the clock control unit 10 (always supplying power), and the output of the AC-DC converter 26 is connected to the CPU 12 via the power switch 28 (supply of main power). . Further, the output of the AC-DC converter 27 is directly connected to the clock control unit 11 (always supply of power).
And the output of the AC-DC converter 27 is connected to the power switch 2
9 to the CPU 12 (supply of main power).

As described above, the interval timer 1
7 and 18 are always power supplies (DC power is always supplied)
Works with In addition, the clocks 15 and 16 usually operate with a constant power supply (a DC power supply is always supplied).
If for any reason you lose power,
Operated by backup batteries 13 and 14.

As described above, since the dual timepiece control unit is provided, the timepiece control unit 10
If only 8 is turned on, the CPU
Main power is supplied to the CPU 12 and the CPU 12 operates.
When only the power switch 29 is turned on by the clock control unit 11, main power is supplied to the CPU 12 via the power switch 29, and the CPU 12 operates.

An operation system (OS) and application programs operate on the CPU 12. When the CPU 12 sends a clock reading request to the clock control unit, and the MPU 19 or 20 detects a clock abnormality, the MPU 19 or 20 sends a hardware abnormality response as a response to the abnormality.

§2: Outline description of each example (1): Description of example 1 In example 1, the MPUs 19 and 20 are controlled by the CPU 1 at regular intervals.
2 at the time of a clock reading request (when a command is received), the values of the interval timers 17 and 18 and the clock 15 and
16 is read out and recorded in the memories 21 and 22, and the time advanced by the interval timers 17 and 18 and the time advanced by the clocks 15 and 16 are calculated from the previously recorded value and the value recorded this time. The clocks are compared, and if the difference between the advanced times is equal to or greater than a preset value, the clock is determined to be abnormal.

By the way, in an electronic computer, an element dedicated to a clock is usually used to count time even when the power is turned off. Also, recent computers generally have an interval timer for operating an operating system or the like, even if the computer has a low function. Therefore, a clock is checked by using an interval timer generally provided in a computer, and the normality of the clock is ensured.

In the first example, it is possible to detect the failure of the clock element (corruption of data, extreme advance / delay of the clock, etc.) with an inexpensive device. Problems such as not occurring and errors in the management of data managed by date and time do not occur.

(2): Description of Example 2 In Example 2, the values of the interval timers 17 and 18 and the values of the clocks 15 and 16 which are stored at the time of reading out the values of the clocks 15 and 16 in the example 1 are used. By having a plurality of recording areas and comparing the short interval and the long interval, the abnormality detection accuracy of the timepiece is improved.

A clock element generally performs counting in seconds.
Therefore, when comparing the elapsed time between the previous and current readings, an error of 2 seconds (difference in comparison) must be allowed depending on the timing of clock reading (just before carrying and immediately after carrying). However, since the accuracy of the timepiece element itself is several seconds to several tens of seconds per month, the error of 2 seconds is a large value as the abnormality detection accuracy.

For this reason, the accuracy of the abnormality detection of the timepiece is improved by using both the comparison of the short intervals for securing the number of checks and the long interval checks for securing the accuracy.

(3): Description of Example 3 In Example 3, two clock control units are provided and operated in duplicate. As described above, by providing two watches having the check function, the same function as the pair-and-spare method described in the conventional example can be realized at low cost.

(4): Description of Example 4 Example 4 is an example in which control is performed by the following method in Example 3. First, the system (CPU
12) gets up. At that time, read both clocks,
The CPU 12 performs control as follows.

If one of the clocks becomes abnormal, the system is started with the normal clock. : If both clocks become abnormal, the system waits for the operator to enter the date and time (waits for the correct date and time), and does not start up the system.

When both clocks are normal, if the difference between the two clocks is within a preset value (constant time), the system starts with the predetermined clock (either clock). Raise. The other clock corrects the date and time (sets the date and time).

If the difference between the two clocks is equal to or greater than a preset value (a fixed time), the system waits for the date and time input from the operator and does not start up the system. The "abnormality" refers to an abnormality when the time elapsed by the interval timer and the time elapsed by the clock are compared, and the difference between the two is greater than or equal to a certain value.

(5): Description of Example 5 Example 5 is an example in which control is performed by the following method in Example 3 described above. First, the system (CPU 1
2) stand up. At that time, both clocks are read out and C
The PU 12 performs control as follows.

When one of the clocks becomes abnormal, the system is started with the normal clock. : When both clocks become abnormal, start up at the last power-off time. When the system (CPU 12) starts up, a warning notification is issued to a remote monitoring device or the like.

When both clocks are normal, if the difference between the two clocks is within a preset value (constant time), a predetermined clock (uniformly one of the clocks)
Start with At this time, the other clock corrects to that time.

If the difference between the two clocks is equal to or longer than a predetermined time, the clock is started at the previous power-off time. When the system (CPU 12) starts up, a warning notification is issued to a remote monitoring device or the like.

The "abnormality" is determined by comparing the time advanced by the interval timer with the time advanced by the clock.
Abnormality when the difference between them is more than a certain value. (6): Description of Example 6 Example 6 is an example in which control is performed by the following method in Example 3 described above. First, the system (CPU
12) gets up. At that time, read both clocks,
The CPU 12 performs control as follows.

When one of the clocks becomes abnormal, the system (CPU 12) is started up with the normal clock. : When both clocks become abnormal, start up at the last power-off time. When the system starts up,
A warning is notified to a remote monitoring device or the like.

When both clocks are normal, the average of the two clocks is calculated and the system is started. In this case, both clocks are corrected by the average value. The "abnormality" refers to an abnormality when the time elapsed by the interval timer and the time elapsed by the clock are compared, and the difference between the two is greater than or equal to a certain value.

§3: Detailed explanation of the operation of the clock control unit
FIG. 3 is an explanatory diagram of the processing of the clock control unit. FIG. 3A is an explanatory diagram at the time of checking the clock, and FIG. 3B is an example of a table on the memory.
Hereinafter, the detailed operation of the clock control unit will be described with reference to FIG. The following control is performed by the MPUs 19 and 20.

A clock element generally performs counting in seconds.
Therefore, when comparing the elapsed time between the previous and current readings, an error of 2 seconds (difference in comparison) must be allowed depending on the timing of clock reading (just before carrying and immediately after carrying). However, since the accuracy of the timepiece element itself is several seconds to several tens of seconds per month, the error of 2 seconds is a large value as the abnormality detection accuracy.

Therefore, as shown in FIG. 3A, a short interval (for example, a 10-minute interval) for securing the number of checks is required.
(Error N seconds) and a check (error L seconds) at a long interval (M times at short intervals: M = 12) to ensure accuracy, the accuracy of timepiece abnormality detection (However, N × M> L). In this case, a clock shift can be detected macroscopically by comparing L seconds smaller than the stack of the error N seconds.

As described above, the clock control units 10 and 11 always operate with the power supply. When the constant power supply (power obtained by converting AC100V to DC) is turned on, the MPUs 19 and 20 operate the clocks 15 and 20 in the respective clock control units. 16 and the values of the interval timers 17 and 18 are read out and recorded in the memories 21 and 22. Note that the power supply is always energized. After that, the MPUs 19 and 20 operate the interval timers 17 and 1
A predetermined time (10 minutes in this example) is measured by 8.

Then, every ten minutes, clocks 15, 16
The values of the interval timers 17 and 18 are read out and recorded in the memories 21 and 22. FIG. 3B shows an example of a table on the memories 21 and 22 in this case. In this example, the table in the storage area on the memories 21 and 22 includes 12
It has a data space for each and stores it cyclically sequentially. That is, each of the items 1 to 12 is a storage area for every 10 minutes, and a clock value (date and time data) and an interval timer value can be recorded for each area. Then, the MPUs 19 and 20 perform the following comparison.

The time (elapsed time) that the clock has advanced from the previous time to the current time (elapsed time) and the time that the interval timer has advanced (elapsed time), ) Is calculated and compared with each other. If the difference is 3 seconds or more, the clock is regarded as abnormal.

The elapsed time of the clock from the previous 12 times to the current time and the elapsed time of the interval timer are obtained from the recorded data 12 times before (long interval: 2 hours before) and the current recorded data, and compared with each other. If the difference is more than 4 seconds, the watch is considered abnormal.

The above processing is repeated every 10 minutes. It should be noted that the comparison time between the previous time and the current time, and the comparison between the previous time and the current time 12 times, are the same in the time period for determining that they are abnormal. Further, when a clock reading request is received from the CPU 12 in addition to the comparison at regular time intervals, the comparison process is performed in the same manner as described above. And, when it is determined that the comparison is abnormal,
In response to the clock reading request from the CPU 12, a hardware abnormality is responded.

In the example shown in FIG. 3B, items 1 to 12 are used cyclically. That is, every 10 minutes, clock data is recorded in order from item 1 to item 12, and when item 12 is completed, item 1 is overwritten, and then item 2, item 3, and so on are overwritten in order. Go. In this way, the table on the memory is used cyclically.

In this way, for example, the latest data
When recorded in the item, the difference between the value of the clock (count value) and the difference between the values of the interval timer are extracted from the items 9 and 8, and the two are compared (short interval comparison every 10 minutes). At this time, 9
A similar comparison is made between terms and 10 (long interval comparison every 2 hours).

§4: Description of Operation of Clock Control Unit by Flowchart--See FIG. 4 FIG. 4 is a processing flowchart of the clock control unit. Less than,
The processing of the clock control unit will be described based on FIG. Although the following processing is performed by the MPU 19 of the clock control unit 10, the MPU 20 of the clock control unit 11 performs the same processing. S1 to S9 indicate each processing step.

The MPU 19 first reads the values (date and time) of the clock 15 and the interval timer 17 and
(S1). Thus, the memory 21
Record the first clock data in one item of the above table. After that, by reading the value of the interval timer 17,
It is determined whether ten minutes have elapsed (S2). And
When 10 minutes have elapsed according to the value of the interval timer 17, the value of the clock 15 and the value of the interval timer 17 are read out again and recorded in the memory 21 (S3).

Next, the MPU 19 accesses the memory 21 to obtain the time (elapsed time) advanced by the clock 15 and the interval timer 17 from the previous time to the current time, and compares the advanced time (elapsed time) of both. (S4). In addition,
The comparison performed at this time is a comparison of the short intervals, and in this example, the comparison is performed at intervals of 10 minutes.

Then, it is determined whether or not the comparison result is normal (S5). If not (if abnormal), the CPU 1
The hardware abnormality is notified in response to the clock reading request from the device 2 (S9). If it is normal, it is determined whether or not the value 12 times before is present in the memory 21 (S6).

As a result, if there is no value 12 times before, the processing is repeated from the processing of S2. If there is a value 12 times earlier, the time (elapsed time) advanced by the clock 15 and the interval timer 17 from the previous 12 times to the current time is obtained, and the advanced time (elapsed time) of both is compared (S7). . In addition,
The comparison performed at this time is a comparison of the long intervals, and in this example, the comparison is performed at intervals of 12 hours.

The comparison was performed as described above, and as a result,
If it is determined that it is not normal (S8), the process of S9 is performed. If it is determined that the process is normal, the process is repeated from the process of normal S2. The comparison process is performed by the CPU 1
When a watch reading request is received from the second device, the same operation is performed as described above.

§5: Description of processing of Example 4—see FIG. 5 FIG. 5 is a processing flowchart of Example 4. Hereinafter, the process of Example 4 will be described with reference to FIG. Note that the processing of Example 4 below is processing performed by the CPU 12, and S11 to S22 indicate respective processing steps. First, when the main power is turned on (S11), the CPU 12 performs an initial diagnosis (S1).
2). Thereafter, the CPU 12 issues a command (command for requesting a clock readout) to the clock control units 10 and 11 of both the system 0 and the system 1 and reads the clock (S).
13). Then, it is determined whether both clocks are abnormal (S14). As a result, if both clocks are abnormal, the operation waits for clock input (input of correct date and time) by the operator (S18). In this case, when the operator inputs a normal clock value, the CPU 12 operates with the value input by the operator and starts operation (S22).

However, if both clocks are not abnormal in the process of S14, the CPU 12 determines whether or not one of the clocks is abnormal (S15), and the abnormality is returned from one of the clock control units. Then, the operation is performed using the normal system clock (the clock having the normal response) (S20). And
A warning is notified to an external device (for example, a remote monitoring device) (S21), and operation starts (S22).

If both clock control units respond that the clocks are normal, it is determined whether the error between the two clocks is within a preset value (for example, 100 seconds) (S16). . As a result, if the error is not within 100 seconds (a state in which the exact date and time are not known), the process of S18 is performed. If the error between the two clocks is within 100 seconds, it is determined that both clocks are normal. Operates on a 1-system clock. Then, the system 0 is corrected (set the clock) by the value of the system 1 (S
17). Thereafter, the operation starts (S22).

§6: Description of processing of Example 5—see FIG. 6 FIG. 6 is a processing flowchart of Example 5. Hereinafter, the process of Example 5 will be described with reference to FIG. Note that the processing of Example 5 below is processing performed by the CPU 12, and S31 to S42 indicate each processing step.

First, when the main power is turned on (S31), the CPU 12 performs an initial diagnosis (S32). afterwards,
The CPU 12 controls the clock control unit 1 of both the 0 system and the 1 system.
A command (command for a clock reading request) is issued to 0 and 11 to read the clock (S33). Then, it is determined whether both clocks are abnormal (S34). As a result, if both clocks are abnormal, the device is started up at the last power-off time (S38), and a warning is notified to an external device (for example, a remote monitoring device) (S3).
9), operation starts (S42).

However, if both clocks are not abnormal in the process of S34, the CPU 12 determines whether or not one of the clocks is abnormal (S35), and the abnormality is responded from one of the clock control units. Then, the operation is performed using the normal system clock (the clock having the normal response) (S40). And
A warning is notified to an external device (for example, a remote monitoring device) (S41), and operation starts (S42).

If both clock control units respond that the clocks are normal, it is determined whether the error between the two clocks is within a preset value (for example, 100 seconds) (S36). . As a result, if the error is not within 100 seconds (a state in which the exact date and time are not known), the process of S38 is performed. If the error between the two clocks is within 100 seconds, it is determined that both clocks are normal. Operates on a 1-system clock. Then, the system 0 is corrected (set the clock) by the value of the system 1 (S
37). Thereafter, the operation starts (S42).

§7: Description of processing of Example 6—see FIG. 7 FIG. 7 is a processing flowchart of Example 6. Hereinafter, the process of Example 6 will be described with reference to FIG. Note that the processing of Example 6 below is processing performed by the CPU 12, and S51 to S60 indicate each processing step.

First, when the main power is turned on (S51), the CPU 12 performs an initial diagnosis (S52). afterwards,
The CPU 12 controls the clock control unit 1 of both the 0 system and the 1 system.
A command (command for requesting clock reading) is issued to 0 and 11 to read the clock (S53). Then, it is determined whether both clocks are abnormal (S54). As a result, if both clocks are abnormal, the device is started up at the previous power-off time (S58), and a warning notification is sent to an external device (for example, a remote monitoring device) (S5).
9) The operation starts (S60).

However, if both clocks are not abnormal in the processing of S54, the CPU 12 determines whether or not one of the clocks is abnormal (S55), and the abnormality is returned from one of the clock control units. Then, the system (CPU 12) is started using the normal system clock (the clock with the normal response) (S57), and the operation is started (S60). However, if there is a response indicating that the clocks are normal from both clock control units in the process of S55, the system is started with the average value of the two clocks (S56), and operation starts (S60).

§8: Description of Recording Medium and Program FIG. 8 is a diagram showing a configuration example of an information processing apparatus. The information processing apparatus (the apparatus to which the present invention is applied) including the communication server is configured, for example, as shown in FIG.
In this example, clock control units 10 and 11 and C
A PU 12, a memory 21, a communication control unit 32 for controlling communication with the outside, an input / output control unit 31 for controlling input / output devices, and the like are provided.

The main body of the apparatus has a CD-ROM
Drive 33 and a flexible disk drive (FD)
D) 34, a hard disk drive (HDD) 35 and the like are connected, and these input / output devices are controlled by the input / output control unit 31.

As described above, the clock control units 10 and 11 read the values of the interval timers and the clock values of the clock control units 10 and 11 at predetermined time intervals and upon a request to read the clock from the CPU 12, and store them in the memory. Record at 21.
Also, from the value recorded last time and the value recorded this time, calculate the time that the interval timer has advanced and the time that the clock has advanced,
Compare the advanced times of both. Further, in the comparison, when the difference between the advanced times is equal to or greater than a preset value,
A process for determining that the clock is abnormal is performed.

The clock control unit 1 includes these processes.
The processes of 0 and 11 and the process performed by the CPU 12 are realized as follows by the MPUs 19 and 20 of the clock control units 10 and 11 and the CPU 12 executing programs. That is, the processing of the clock control units 10 and 11 is stored in the recording medium (hard disk) of the hard disk device 35.
In addition, a program for realizing the processing of the CPU 12 and other various data are stored.

When performing the above processing, the CPU 1
2 reads out the programs and data stored in the recording medium of the hard disk device 35, and reads the programs and data from the memory (memory 2 in the clock control units 10 and 11) in the device main body.
1, 22 and a memory in the CPU 12). Thereafter, the MPUs 19, 20 and the CPU 12 sequentially read and execute necessary programs from among the programs stored in the memory, thereby performing the processing. The program stored in the recording medium of the hard disk device 35 is recorded (stored) as follows.

A program (program data created by another device) stored in a flexible disk (floppy disk) is read by a flexible disk drive 34 and stored in a recording medium (hard disk) of a hard disk device 35.

: Magneto-optical disk or CD-ROM
And the like stored on a storage medium such as the CD-R.
The data is read by the OM drive 33 or another optical disk drive (not shown) and stored in the recording medium (hard disk) of the hard disk device 35.

The data transmitted from another device via a communication line such as a LAN is received by the communication control unit 32,
The data is stored in the recording medium (hard disk) of the hard disk device 35.

§9: Other explanations (1): In the above example, an example in which the present invention is applied to a communication server has been described. However, the present invention is not limited to such an example, and all other similar information processing apparatuses can be used. Applicable.

(2) The warning notification can be executed not only to the remote monitoring device but also to another similar device, for example, another monitoring terminal. Also,
If the device is always operated by the operator (when the device is not an unmanned device), warning information may be displayed on a display device.

[0100]

As described above, the present invention has the following effects. (1): In the conventional example, since the normality of the clock was ensured by using three or four clocks,
The number of clocks increased and the device became expensive. Moreover,
Since it is necessary to back up each timepiece with a battery, the burden has been increased in terms of cost and physical scale, such as an increase in battery capacity.

On the other hand, in the present invention, the normality of the timepiece can be ensured by using a smaller number of timepieces than the conventional one, so that the apparatus is correspondingly inexpensive. (2): By using inexpensive equipment and inexpensive methods,
Since the normality of the clock can be ensured, there is no problem that an event activated by the clock occurs at an unintended timing or does not occur at a necessary timing. Also,
No error occurs in the order management of data managed by date and time.

(3): With an inexpensive device and a method that can be realized at low cost, it is possible to improve the reliability of important timepiece elements without having a large impact on cost and device scale. In addition to the above effects, the following effects are provided corresponding to each claim.

(4): In claim 1, the clock data reading and recording means of the clock control unit reads the value of the interval timer and the value of the clock and records them in the storage means. Further, the elapsed time comparing means calculates the time advanced by the interval timer and the time advanced by the clock from the previously recorded value and the value recorded this time in the storage means, and compares the advanced times. Then, the abnormality determining means determines that the clock is abnormal when the difference between the advanced times in the comparison becomes equal to or greater than a preset value.

By the way, an information processing device such as an electronic computer usually incorporates an element dedicated to a clock in order to count time even when the power is turned off. Further, in recent years, information processing apparatuses generally have an interval timer for operating an operating system or the like, even with a low function. Therefore, as described above, by using the interval timer that the information processing apparatus generally has,
The watch can be checked to ensure the normality of the watch.

Therefore, it is possible to detect a failure of the clock element (corruption of data, extreme advance / delay of the clock, etc.) with an inexpensive device, and an event occurs at an unintended timing and an event does not occur at a necessary timing. Such problems as described above and errors in managing data managed by date and time can be prevented.

(5) In the second aspect, the clock control unit uses a plurality of recording areas to compare a short interval at a predetermined short interval based on a value read from the interval timer and a value read from the clock. And long intervals at longer intervals are compared. In this way, the abnormality detection accuracy of the timepiece can be improved.

As described above, by comparing the short interval (for example, every 10 minutes) and the long interval (for example, every 2 hours), it is possible to improve the abnormality detection accuracy of the clock. . That is, the clock element generally performs counting in seconds. Therefore, when comparing the elapsed time between the previous reading and the present reading, at least two clocks are required depending on the clock reading timing (just before carrying and immediately after carrying).
Second errors (differences in comparison) must be tolerated.

However, since the accuracy of the timepiece element itself is several seconds to several tens of seconds per month, the error of two seconds is a large value as the abnormality detection accuracy. Therefore, the accuracy of the abnormality detection of the timepiece can be improved by using both the comparison of the short interval for ensuring the number of checks and the long interval check for ensuring the accuracy.

(6): According to the third aspect, two clock control units are provided to perform a duplex operation. As described above, by providing two watches having the check function, the same function as the pair-and-spare method described in the conventional example can be realized at low cost.

(7): In claim 4, the clock data obtaining means obtains clock data from both clock control units by sending a read request to the clock control units. Then, according to the data acquired by the clock data acquisition means, the apparatus start-up control means starts up the system with the normal clock if one of the clocks becomes abnormal, and if both clocks become abnormal, If both clocks are normal without waiting for the operator to input the date and time and both clocks are normal, if the difference between the two clocks is within a certain time, the system is started with one predetermined clock and the other The clock is corrected to that time, and if the difference between the two clocks is equal to or more than a certain time, control is performed so as not to start up the system in waiting for the date and time input from the operator.

In this way, it is possible to provide one control method when two clocks are provided, and it is possible to reliably prevent operation with an incorrect clock. In addition, the normality of the timepiece can be ensured by an inexpensive device, and an inexpensive abnormality detecting means can be provided.

(8) In claim 5, the clock data obtaining means obtains clock data from both clock control units by sending a read request to the clock control units. Then, according to the data acquired by the clock data acquisition means, the apparatus start-up control means starts up the system with a normal clock if one of the clocks becomes abnormal, and if both clocks become abnormal, When the system is started at the previous power-off time and both clocks are normal, if the difference between the two clocks is within a predetermined time, the system is started with one predetermined clock and the other is started. The clock corrects to that time. If the difference between the two clocks is equal to or longer than a predetermined time, control is performed so that the system is started at the last power-off time.

In this way, it is possible to provide one control method when two clocks are provided, and it is possible to reliably prevent an operation with an incorrect clock. In addition, the normality of the timepiece can be ensured by an inexpensive device, and an inexpensive abnormality detecting means can be provided.

Further, by starting up the system as described above, processes such as detailed notification of the details of the abnormality and notification to the remote monitoring device are simplified. Further, when the system operation does not start and only the notification function needs to be secured, the system can be started up with a minimum guarantee (only the order of data is guaranteed).

(9): In claim 6, the clock data obtaining means obtains clock data from both clock control units by sending a read request to the clock control units. Then, the device start-up control means starts the system with the normal clock if one of the clocks becomes abnormal based on the data obtained by the clock data obtaining means, and Starts the system at the previous power-off time, and when both clocks become normal, calculates the average value of the two clocks, starts the system with the average value, and averages both clocks. Control is performed so as to correct the value.

In this way, it is possible to provide one control method when two clocks are provided, and it is possible to reliably prevent operation with an incorrect clock. In addition, the normality of the timepiece can be ensured by an inexpensive device, and an inexpensive abnormality detecting means can be provided.

In addition, the deviation from the normal time can be minimized, the system can be started, the operation at the wrong time can be prevented, and the accuracy of the timepiece can be improved.

(10) According to the seventh aspect, the procedure of reading out the value of the interval timer and the value of the clock by reading out the program of the recording medium and causing the clock control unit to execute the program and the procedure of recording the previous time. From the value and the value recorded this time, a procedure of calculating the time advanced by the interval timer and the time advanced by the clock, and comparing the advanced times of both, and the comparison, the difference between the advanced times is a preset value. If this is the case, a procedure for determining that the clock is abnormal is performed.

By the way, in an information processing apparatus such as an electronic computer, an element dedicated to a clock is usually used to count time even when the power is turned off. Further, in recent years, information processing apparatuses generally have an interval timer for operating an operating system or the like, even with a low function. Therefore, as described above, by using the interval timer that the information processing apparatus generally has,
The watch can be checked to ensure the normality of the watch.

Therefore, it is possible to detect a failure of the clock element (corruption of data, extreme advance / delay of the clock, etc.) by an inexpensive method, and an event occurs at an unintended timing and an event does not occur at a necessary timing. Such problems as described above and errors in managing data managed by date and time can be prevented.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of an apparatus according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram of a power supply system according to the embodiment of the present invention.

FIG. 3 is an explanatory diagram of processing of a clock control unit according to the embodiment of the present invention.

FIG. 4 is a processing flowchart of a timepiece control unit according to the embodiment of the present invention.

FIG. 5 is a processing flowchart of Example 4 in the embodiment of the present invention.

FIG. 6 is a processing flowchart of Example 5 in the embodiment of the present invention.

FIG. 7 is a processing flowchart of Example 6 in the embodiment of the present invention.

FIG. 8 is a diagram illustrating a configuration example of an information processing apparatus according to an embodiment of the present invention.

FIG. 9 is an explanatory diagram of Conventional Examples 1 and 2.

[Explanation of symbols]

 1, 2, 3, 4 clock 10, 11 clock control unit 12 CPU (central processing unit) 13, 14 battery 15, 16 calendar clock 17, 18 interval timer 19, 20 MPU (microprocessor) 21, 22 memory 24, 25 Power supply unit 28, 29 Power switch 31 Input / output control unit 32 Communication control unit 33 CD-ROM drive 34 Flexible disk drive (FDD) 35 Hard disk drive (HDD)

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Kazuyuki Mitsuishi 4-1-1, Kamidadanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Inside Fujitsu Limited (72) Inventor Hidetoshi Tamura 4-1-1, Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture No. 1 Inside Fujitsu Limited

Claims (7)

[Claims] An information processing apparatus having a clock backed up by a battery and an interval timer not backed up by a battery and having a clock control unit having a function of checking the normality of the clock, wherein the clock control unit is A time data reading and recording means for reading the value of the interval timer and the value of the clock and recording the value in the storage means; and An elapsed time comparing means for calculating an advanced time and comparing the advanced times, and an abnormality for determining that the clock is abnormal when the difference between the advanced times is equal to or greater than a preset value. An information processing apparatus comprising: a determination unit. 2. The storage means has a plurality of recording areas for recording a value read from the interval timer and a value read from a clock, and the clock control unit uses the plurality of recording areas to store the value. A function to improve the accuracy of watch error detection by comparing a short interval at a predetermined short interval and a long interval at a longer interval based on the value read from the interval timer and the value read from the clock. 2. The method according to claim 1, further comprising:
An information processing apparatus according to claim 1. 3. The information processing apparatus according to claim 1, wherein two clock control units are provided to perform a duplex operation. 4. A clock data acquisition unit for acquiring clock data from both clock control units by sending a read request to the clock control unit, and one of the clocks is abnormal due to the data acquired by the clock data acquisition unit. If it becomes, start the system with the normal clock.If both clocks become abnormal, wait for the operator to input the date and time, do not start the system, and if both clocks become normal, If the difference between the two clocks is within a certain period of time, start up the system with one predetermined clock, correct the other clock to that time,
4. The information processing apparatus according to claim 3, further comprising a system start-up control unit that does not start up the system when the difference between the two clocks is equal to or more than a predetermined time, and waits for a date and time input from an operator. 5. A clock data acquisition unit for acquiring clock data from both clock control units by sending a read request to the clock control unit, and one of the clocks is abnormal due to the data acquired by the clock data acquisition unit. , Start the system with the normal clock.If both clocks become abnormal, start the system with the previous power-off time.If both clocks become normal, If the difference between the two clocks is within a certain time, the system is started with one predetermined clock, and the other clock is corrected to that time,
4. The information processing apparatus according to claim 3, further comprising a system start-up control unit that starts the system at a previous power-off time when a difference between the two clocks is equal to or longer than a predetermined time. 6. A clock data acquisition unit for acquiring clock data from both clock control units by sending a read request to the clock control unit, and one of the clocks is abnormal due to the data acquired by the clock data acquisition unit. , Start the system with the normal clock.If both clocks become abnormal, start the system with the previous power-off time.If both clocks become normal, Calculate the average value of the two watches, start up the system with the average value,
4. The information processing apparatus according to claim 3, further comprising system startup control means for correcting both clocks with the average value. 7. A clock control unit having a clock backed up by a battery and an interval timer not backed up by a battery, and having a function of checking the normality of the clock, reads and stores the value of the interval timer and the value of the clock. Means for recording, calculating the time advanced by the interval timer and the time advanced by the clock from the previously recorded value and the value recorded this time, and comparing the time advanced by both. And a computer-readable recording medium storing a program for executing a step of determining that the clock is abnormal when a difference between the advanced times is equal to or greater than a preset value.