JPH11289047A - Multi-chip module its and manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten a signal propagation delay time between chips, and to improve chip mounting density. SOLUTION: A multi-chip module on which plural processor are mounted is constituted of plural semiconductor chips 1 laminated in a two layer structure and a substrate 2 on which the semiconductor chip 1 in the laminated structure is mounted, and the electric connection of the semiconductor chip 1 with the substrate 2 is withdrawn from a semiconductor chip 1a in the upper layer. The semiconductor chip 1 is formed so that the positions of the overlapped semiconductor chip 1a in the upper layer and semiconductor chip 1b in the lower layer can be shifted, and the overlapped pads can be directly connected through solder balls 3. Also, the substrate 2 is formed so that the surface can be shaped like projection and recession, and the semiconductor chip 1b in the lower layer is mounted at the recessed part 2a upside down, and the wiring of a signal and a power source is connected through the solder balls 3 with the pad of the semiconductor chip 1a in the upper layer at the projecting part 2b.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a module technology in which a plurality of semiconductor chips are mounted, and more particularly to a multi-chip module suitable for reducing a signal propagation delay time between chips and improving a chip mounting density and a method of manufacturing the same. And effective technology.

[0002]

2. Description of the Related Art For example, as a technique studied by the present inventor, as a module on which a plurality of semiconductor chips are mounted, a technique of stacking bare chips to constitute a memory module is considered. In this memory module, a bare chip is coated with polyimide, wiring is formed so that the connection pad position is located at the end, a plurality of chips are laminated with an adhesive, wiring is formed at the side end, and the end is formed at the end. Each chip is connected to a wiring, a solder bump is formed at the lowermost portion, and connected to a substrate to realize a large-capacity memory module.

[0003] As a technique relating to such a multi-chip module such as a memory module, for example, on May 31, 1993, "Practical Course VLSI Packaging Technology (Lower)" P179 to P18 issued by Nikkei BP Company.
5 and the like.

[0004]

In the multichip module as described above, as the operation of the semiconductor chip becomes faster, signal delay and noise due to wiring between chips when the semiconductor chip is mounted on the module are increased. Is considered to be remarkable. This causes a problem that the characteristics of the system are determined by the wiring between chips.

Accordingly, an object of the present invention is to provide a multi-chip module and a method of manufacturing the same that can improve the chip mounting density while shortening the signal propagation delay time between the chips by devising the stacked structure of the semiconductor chips. To provide.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0007]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, in the multi-chip module according to the present invention, the overlapping semiconductor chips are displaced from each other, and the pads are connected directly to each other by solder balls or the like without using a wiring board or the like, so that the semiconductor chips have a two-layer structure. This is a stacked mounting method.

In this mounting method, the lower semiconductor chip is mounted upside down, the signal and the power supply are transferred to and from the upper semiconductor chip, and the wiring of the signal and the power supply to the substrate is drawn out from the pad of the upper semiconductor chip. It is assumed that.

[0010] A concave portion for mounting the lower semiconductor chip upside down is formed on the substrate, and the signal / power supply wiring of the substrate and the pad of the upper semiconductor chip are interposed at the convex portion of the substrate via solder balls. Connected.

Further, an upper surface substrate having the same shape as the substrate is added to the back surface of the upper semiconductor chip and mounted upside down, so that signal / power supply wiring of the substrate and pads of the upper semiconductor chip,
The wiring of the signal / power supply on the upper substrate and the pads of the lower semiconductor chip are connected via solder balls.

In the method of manufacturing a multi-chip module according to the present invention, a lower semiconductor chip is mounted upside down in a concave portion on a substrate, a solder ball is formed on a pad of the upper semiconductor chip, and the lower semiconductor chip is formed. Connecting the pads to the solder balls on the pads of the upper semiconductor chip, and connecting the solder balls on the pads of the upper semiconductor chip to the signal / power wiring of the convex portion of the substrate. .

Therefore, according to the multichip module and the method of manufacturing the same, it is possible to reduce the signal propagation delay time between the semiconductor chips. In terms of products, since the distance between the chips is reduced, the chip mounting density is improved, and a small, high-performance system can be configured.

That is, by forming the semiconductor chip in a two-layer structure, the semiconductor chips can be arranged close to each other.
Since the distance from pad to pad is shortened, it is possible to reduce the signal delay time. Further, since the semiconductor chips are arranged so as to overlap with each other, the size of the substrate can be reduced, so that the mounting rate of the semiconductor chips can be increased.

[0015]

Embodiments of the present invention will be described below in detail with reference to the drawings. In all the drawings for describing the embodiments, the same members are denoted by the same reference numerals, and the description thereof will not be repeated.

(Embodiment 1) FIG. 1 is a schematic plan view showing a multi-chip module according to Embodiment 1 of the present invention.
FIG. 2 is a schematic sectional view taken along the line II-II ′ of FIG.
FIG. 4 is a flowchart showing a method for manufacturing a multichip module.

First, a schematic configuration of the multichip module of the present embodiment will be described with reference to FIGS.

The multi-chip module according to the present embodiment is, for example, a module on which a plurality of processors are mounted, and includes a plurality of semiconductor chips 1 stacked in a two-layer structure.
And a substrate 2 on which the semiconductor chip 1 having the stacked structure is mounted, and the electrical connection with the substrate 2 is drawn out from the upper semiconductor chip 1a.

The semiconductor chip 1 is composed of, for example, a bare chip such as a processor. The upper semiconductor chip 1a and the lower semiconductor chip 1b which overlap each other are displaced from each other. ing. Each of the processors can operate independently, and the memory and the peripheral device can be shared between the processors.

The substrate 2 is formed of, for example, a wiring substrate having a multilayer structure. Wirings such as signals and power supplies are formed on each layer. The surface is formed in an irregular shape, and the lower semiconductor chip 1b is mounted on the concave portion 2a upside down. Signal at the convex portion 2b.
The power supply wiring and the pads of the upper semiconductor chip 1 a are connected via the solder balls 3.

Next, the operation of the present embodiment will be described with reference to the flow chart of FIG. In FIG. 3, the figure on the right side is a cross-sectional view of the multi-chip module corresponding to each flow.

First, in the step of mounting the lower semiconductor chip 1b of the semiconductor chips 1a and 1b, the substrate 2
The lower semiconductor chip 1b is mounted upside down by bonding to the upper concave portion 2a with an adhesive 4 or the like (step 30).
1). The substrate 2 is formed, for example, by bonding a plurality of substrate base materials having a wiring layer formed thereon, forming a concave opening by spot facing on the surface of the laminated substrate substrate, or forming a laminated substrate substrate. It can be formed by a method of bonding the convex portion 2b on the surface of the substrate.

In the step of forming the solder balls 3, the solder balls 3 are formed on the pads of the upper semiconductor chip 1a (step 302). In the connection step between the semiconductor chips 1a and 1b and between the semiconductor chips 1a and 1b and the substrate 2, the pads of the lower semiconductor chip 1b and the solder balls 3 on the pads of the upper semiconductor chip 1a are connected and the upper layer is connected. Then, the solder balls 3 on the pads of the semiconductor chip 1a are connected to the signal / power supply wiring of the convex portion 2b of the substrate 2 (step 303).

As a result, the solder balls 3
Thereby, a multi-chip module in which the semiconductor chips 1a and 1b having a two-layer structure in which the pads are connected to each other can be completed.

Therefore, according to the multi-chip module of the present embodiment, the semiconductor chip 1 is stacked in a two-layer structure, and the pads of the semiconductor chip 1 are directly connected to each other by the solder balls 3, so that the semiconductor chip 1 Can be arranged close to each other, and the distance from pad to pad can be shortened, so that the signal delay time can be reduced. Further, since the semiconductor chips 1 are arranged so as to overlap with each other, the size of the substrate 2 can be reduced, so that the mounting rate of the semiconductor chips 1 can be increased.

(Embodiment 2) FIG. 4 is a schematic sectional view showing a multichip module according to Embodiment 2 of the present invention.

The multi-chip module according to the present embodiment is a module in which a plurality of processors are mounted as in the first embodiment. The difference from the first embodiment is that the multi-chip module is stacked in a two-layer structure. The point is that an upper substrate is mounted on the back surface of the upper semiconductor chip.

That is, in the present embodiment, as shown in FIG. 4, for example, in addition to a plurality of semiconductor chips 1 stacked in a two-layer structure and a substrate 2 on which the semiconductor chips 1 having these stacked structures are mounted. And is mounted on the back surface of the upper semiconductor chip 1a, and comprises an upper substrate 5 having the same shape as the substrate 2.

In this configuration, the signal / power supply wiring of the substrate 2 and the pad of the upper semiconductor chip 1a are connected via the solder ball 3, and the added signal / power supply wiring of the upper substrate 5 is connected to the lower layer. The pads of the semiconductor chip 1b are connected via the solder balls 3, so that signals and power can be drawn from the lower semiconductor chip 1b.

Therefore, according to the multi-chip module of the present embodiment, the semiconductor chips 1 can be arranged close to each other and the distance from pad to pad becomes short, as in the first embodiment. Since the delay time of the signal can be reduced and the semiconductor chips 1 are arranged so as to overlap each other, the size of the substrate 2 can be reduced, so that the mounting rate of the semiconductor chips 1 can be increased. 1, signals and power can be drawn from the lower semiconductor chip 1b, so that the number of input / output terminals with the substrate 2 and the upper substrate 5 can be increased.

Although the invention made by the inventor has been specifically described based on the embodiment, the invention is not limited to the embodiment, and various modifications may be made without departing from the gist of the invention. It goes without saying that it is possible.

For example, in the above-described embodiment, a multi-chip module in which a plurality of semiconductor chips including a processor are mounted has been described. However, the present invention is not limited to this. The present invention can be widely applied to a multi-chip module in which a plurality of semiconductor chips composed of a combination with a memory are mounted.

[0033]

Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows.

(1) The semiconductor chips can be arranged close to each other by using a mounting method in which the pads of the overlapping semiconductor chips are directly connected to each other by solder balls and the semiconductor chips are stacked in a two-layer structure. Thus, the distance from pad to pad is shortened, so that the signal delay time can be reduced.

(2) Since the semiconductor chips are arranged so as to overlap each other, the size of the substrate can be reduced and the distance between the chips can be reduced, so that the mounting rate of the semiconductor chips can be improved.

(3) Add the top substrate and mount it upside down,
By adopting a mounting method of connecting the signal / power supply wiring of the substrate and the upper substrate to the pads of the upper and lower semiconductor chips, respectively, the number of input / output terminals with the substrate can be increased.

(4) According to the above (1) to (3), a multi-chip module capable of shortening the signal propagation delay time between chips and improving the chip mounting density is realized. A system can be configured.

[Brief description of the drawings]

FIG. 1 is a schematic plan view showing a multichip module according to a first embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view taken along line II-II ′ of FIG. 1 in the multichip module according to the first embodiment of the present invention;

FIG. 3 is a flowchart showing a method for manufacturing the multi-chip module according to the first embodiment of the present invention.

FIG. 4 is a schematic sectional view showing a multichip module according to a second embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor chip 1a Upper semiconductor chip 1b Lower semiconductor chip 2 Substrate 2a Concave part 2b Convex part 3 Solder ball 4 Adhesive material 5 Top substrate

Claims (6)

[Claims] 1. A multi-chip module in which a plurality of semiconductor chips are mounted on a substrate, wherein, among the plurality of semiconductor chips, overlapping semiconductor chips are shifted from each other and connection terminals are directly connected by solder balls. A multi-chip module, wherein the semiconductor chips are stacked in a two-layer structure on the substrate. 2. The multi-chip module according to claim 1, wherein, of the overlapping semiconductor chips, a lower semiconductor chip is mounted on the substrate upside down, and an upper semiconductor chip is mounted face-up. -A multi-chip module, wherein power is transferred, and wiring of signals and power to the substrate is drawn out from connection terminals of the upper semiconductor chip. 3. The multi-chip module according to claim 2, wherein the substrate has a concave portion on which the lower semiconductor chip is mounted upside down, and a signal of the substrate is formed by a convex portion of the substrate. A multi-chip module, wherein a power supply wiring and connection terminals of the upper semiconductor chip are connected via the solder balls; 4. The multi-chip module according to claim 3, wherein an upper substrate having the same shape as the substrate is mounted upside down on the back surface of the upper semiconductor chip, and the signal / power supply wiring of the substrate is connected to the upper surface. The connection terminals of the upper semiconductor chip are connected via the solder balls, and the signal / power wiring of the upper substrate and the connection terminals of the lower semiconductor chip are connected via the solder balls. A multi-chip module characterized by the following. 5. The multi-chip module according to claim 1, wherein said plurality of semiconductor chips comprise a processor, a memory, or a combination thereof. 6. A method of manufacturing a multi-chip module in which a plurality of semiconductor chips are mounted on a substrate, wherein a lower semiconductor chip of the plurality of semiconductor chips is mounted in a concave portion on the substrate. Forming a solder ball on a connection terminal of an upper semiconductor chip of the plurality of semiconductor chips; and forming a solder ball on the connection terminal of the lower semiconductor chip and the connection terminal of the upper semiconductor chip. Connecting the solder balls on the connection terminals of the semiconductor chip in the upper layer and the signal / power supply wiring on the convex portion of the substrate.