JPH11284223A - Superluminascent diode - Google Patents

Superluminascent diode

Info

Publication number
JPH11284223A
JPH11284223A JP8005398A JP8005398A JPH11284223A JP H11284223 A JPH11284223 A JP H11284223A JP 8005398 A JP8005398 A JP 8005398A JP 8005398 A JP8005398 A JP 8005398A JP H11284223 A JPH11284223 A JP H11284223A
Authority
JP
Japan
Prior art keywords
layer
thickness
sld
barrier layer
light
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8005398A
Other languages
Japanese (ja)
Other versions
JP3712855B2 (en
Inventor
Atsushi Yamada
敦史 山田
Katsunori Shinone
克典 篠根
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Anritsu Corp
Original Assignee
Anritsu Corp
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Filing date
Publication date
Application filed by Anritsu Corp filed Critical Anritsu Corp
Priority to JP8005398A priority Critical patent/JP3712855B2/en
Publication of JPH11284223A publication Critical patent/JPH11284223A/en
Application granted granted Critical
Publication of JP3712855B2 publication Critical patent/JP3712855B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To hold a hole injection efficiency so as to obtain a high luminous efficiency and high polarization quench ratio, by specifying the thickness of a barrier layer and no. of well layers in a multiple quantum well structure of an active layer. SOLUTION: A barrier layer 5 of a superluminescent diode SLD is set to 4 nm or less, without forming a strain in a well layer 4. If about 4 nm or less, the wave functions of the carriers esp. holes begin to couple with each other to thereby improve the uniformity of the carriers in the quantum well layer. The densities of electrons and holes in the SLD are higher than those of a semiconductor laser LD and hence either the no. or thickness of the well layers 4 must be increased. If the barrier layer 5 is 4 nm or less thick, increase of the layer no. never deteriorates the emission efficiency and hence the barrier layer 5 is set to 4 nm or less thick and the no. of the well layers 5 is set to 5 or more.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、ファイバジャイロ
等の光応用計測に用いられる、スーパールミネッセント
ダイオード(以下SLDという)に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a superluminescent diode (hereinafter referred to as "SLD") used for optical measurement of a fiber gyro or the like.

【0002】[0002]

【従来の技術】SLDは発光ダイオードに近いブロード
なスペクトルを持ちながら、半導体レーザ(以下LDと
いう)並の狭い放射角と強度で光を放射することを特徴
としている。このSLDは、ファイバジャイロ用の光源
として実用化されているほか、高分解能OTDR(Op
tical Time Domain Reflect
ometry)やエンジン燃焼モニタなどの分野への応
用も検討されている。
2. Description of the Related Art An SLD is characterized by emitting light with a narrow emission angle and intensity comparable to a semiconductor laser (hereinafter referred to as an LD) while having a broad spectrum close to that of a light emitting diode. This SLD has been put into practical use as a light source for a fiber gyro, and has a high resolution OTDR (Op
physical Time Domain Reflect
Application to fields such as ommetry) and engine combustion monitoring is also being studied.

【0003】従来のSLDを、図4を参照して説明す
る。図4はInGaAsP/InP系材料による従来の
SLDの例を示す図である。このSLDを得るために
は、1回目の成長として液相成長法(LPE)及び気相
成長法(VPE,MO−CVD)または分子線エピタキ
シー(MBE)法等により、n形InP基板21上にn
形InGaAsP光ガイド層(λ:1.3μm組成)2
2、ノンドープInGaAsP活性層(λ:1.5μm
組成)23,p型InPクラッド層24,p型InGa
AsP電極層(λ:1.1μm組成)25を成長する。
A conventional SLD will be described with reference to FIG. FIG. 4 is a diagram showing an example of a conventional SLD using an InGaAsP / InP-based material. In order to obtain this SLD, the first growth is performed on the n-type InP substrate 21 by liquid phase epitaxy (LPE), vapor phase epitaxy (VPE, MO-CVD) or molecular beam epitaxy (MBE). n
InGaAsP light guide layer (λ: 1.3 μm composition) 2
2. Non-doped InGaAsP active layer (λ: 1.5 μm
Composition) 23, p-type InP cladding layer 24, p-type InGa
An AsP electrode layer (λ: 1.1 μm composition) 25 is grown.

【0004】次に、RFスパッタ又はCVD法等により
SiO2 もしくはSiN等の薄膜をp形InGaAsP
電極層25の層の全表面に形成する。その後フォトエッ
チング技術により活性層を埋め込むために、電流注入領
域29を直線状に<110>方向にそってストライプ状
に幅4〜5μm、長さ400μm、非電流注入領域30
も同様に、非電流注入領域30の長さが200μmとな
るように電流注入領域29のストライプ幅と同じ幅で形
成した後、このSiO2 ストライプ薄膜もしくはSiN
ストライプ薄膜をマスクとして利用し、ブロムメタノー
ル4%溶液により25,24,23,22の各層を基板
21に達するまでエッチングして逆メサ状の積層体を形
成する。次に、2回目の成長としてLPEにより、エッ
チングにより取り除いた部分にp形InP層26、及び
n形InP層27の電流狭窄用埋め込み成長を行う。
Next, a thin film of SiO 2 or SiN is formed by p-type InGaAsP by RF sputtering or CVD.
The electrode layer 25 is formed on the entire surface of the layer. Thereafter, in order to bury the active layer by the photo-etching technique, the current injection region 29 is linearly formed in a stripe shape along the <110> direction with a width of 4 to 5 μm, a length of 400 μm, and a non-current injection region 30.
Similarly, after forming the same width as the stripe width of the current injection region 29 so that the length of the non-current injection region 30 becomes 200 μm, this SiO 2 stripe thin film or SiN
Using the striped thin film as a mask, each layer of 25, 24, 23, and 22 is etched with a 4% solution of bromomethanol until it reaches the substrate 21 to form an inverted mesa-shaped laminate. Next, as a second growth, a current confinement buried growth of the p-type InP layer 26 and the n-type InP layer 27 is performed by LPE on the portions removed by etching.

【0005】こうして得たウェハの上面にはAu−Zn
を蒸着してp形オーミック電極28をフォトエッチング
技術を用いて電流注入領域29にのみ形成する。この上
に再び、SiO2 もしくはSiN膜を形成し、フォトエ
ッチング技術により、非電流注入領域30の溝33の形
成のための窓開けを行なう。そしてこれをマスクとして
ブロムメタノール4%溶液によりウェハの各層をエッチ
ングして溝33を形成する。溝33の深さは上端より活
性層23の位置を越えるまで行う。また、溝33の壁の
角度は図3の(a)で活性層23を斜めに切断し、か
つ、深さ方向に対しても斜めに切断するように形成す
る。また、基板21側には全体の厚みが80μm程度に
なるまで研磨した後Au−Ge−Niを蒸着し、n形オ
ーミック電極32を全面に形成する。各層の構成は次の
通りであり、また、各結晶層はInPの格子定数に合致
している。
[0005] The upper surface of the wafer thus obtained is Au-Zn.
And a p-type ohmic electrode 28 is formed only in the current injection region 29 using a photo-etching technique. An SiO 2 or SiN film is formed thereon again, and a window for forming the groove 33 in the non-current injection region 30 is formed by a photo etching technique. Using this as a mask, each layer of the wafer is etched with a 4% solution of bromomethanol to form a groove 33. The depth of the groove 33 is set so as to exceed the position of the active layer 23 from the upper end. Further, the angle of the wall of the groove 33 is formed so that the active layer 23 is cut obliquely in FIG. 3A and also obliquely in the depth direction. On the substrate 21 side, Au-Ge-Ni is vapor-deposited after polishing until the entire thickness becomes about 80 μm, and an n-type ohmic electrode 32 is formed on the entire surface. The structure of each layer is as follows, and each crystal layer matches the lattice constant of InP.

【0006】21:Snドープn形InP基板、厚み8
0μm、キャリア密度3×1018cm-3 22:n形InGaAsP光ガイド層、厚み0.2μ
m、Snドープ、キャリア密度3×1017cm−3 23:n形InGaAsP活性層、厚み0.2〜0.3
μm、ノンドープ 24:p形InP結晶層、厚み1.5μm、Znドー
プ、キャリア密度5×1017cm-3 25:p形InGaAsP電極層、厚み0.7μm、Z
nドープ、キャリア密度5×1018cm-3 26:p形InP電流狭窄層、厚み1.5μm、Znド
ープ、キャリア密度1×1017cm-3 27:p形InP電流狭窄層、厚み1.5μm、Znド
ープ、キャリア密度1×1017cm-3 この素子を素子長600μm、幅400μmの一定のぺ
レットに分割して、AuSnはんだによりヒートシンク
上にマウントした、電流、波長、1.55μmにおける
光出力特性は、25℃連続動作において電流注入にした
がって光出力が発振することなく増加し、200mAに
おいて3mWのインコヒーレント光出力を得ることがで
きるものである。非電流注入領域30に形成した溝33
の端面で反射した光が再び電流注入領域29を形成する
活性層23に結合しないようになっていて十分FPモー
ドを抑圧して非電流注入領域30を長くすることなく、
SLD発振を得るものである。
21: Sn-doped n-type InP substrate, thickness 8
0 μm, carrier density 3 × 10 18 cm −3 22: n-type InGaAsP light guide layer, thickness 0.2 μm
m, Sn-doped, carrier density 3 × 10 17 cm −3 23: n-type InGaAsP active layer, thickness 0.2 to 0.3
μm, non-doped 24: p-type InP crystal layer, thickness 1.5 μm, Zn-doped, carrier density 5 × 10 17 cm −3 25: p-type InGaAsP electrode layer, thickness 0.7 μm, Z
n-doped, carrier density 5 × 10 18 cm −3 26: p-type InP current blocking layer, thickness 1.5 μm, Zn-doped, carrier density 1 × 10 17 cm −3 27: p-type InP current blocking layer, thickness 1. 5 μm, Zn-doped, carrier density 1 × 10 17 cm −3 This element was divided into fixed pellets having an element length of 600 μm and a width of 400 μm, and mounted on a heat sink with AuSn solder, at a current, wavelength and 1.55 μm. The light output characteristic increases without oscillating the light output according to the current injection in the continuous operation at 25 ° C., and an incoherent light output of 3 mW at 200 mA can be obtained. Groove 33 formed in non-current injection region 30
The light reflected at the end face of the first layer is not coupled to the active layer 23 forming the current injection region 29 again, and the FP mode is sufficiently suppressed without lengthening the non-current injection region 30.
This is to obtain SLD oscillation.

【0007】このようにSLDは、構造的にはLDに近
いが、端面反射率を抑制し発振を妨げる工夫がされてい
る点でLDとは異なる。活性領域はLD同様、バルク構
造と多重量子井戸(以下MQWとする)構造の2タイプ
がある。SLDは発振させない状態で動作させるため
に、注入キャリア密度はLDと比べるとはるかに高くな
る。ヘテロ界面からのキャリアのオーバーフローを避け
るために活性層厚を厚くしたり幅を広めに設計したりし
た。また、MQW構造では井戸層の層数または井戸層の
層厚を大きく設定していた。
[0007] As described above, the SLD is structurally similar to the LD, but differs from the LD in that it is devised to suppress end face reflectance and prevent oscillation. Like the LD, there are two types of active regions: a bulk structure and a multiple quantum well (hereinafter referred to as MQW) structure. Since the SLD is operated without oscillation, the injected carrier density is much higher than that of the LD. In order to avoid overflow of carriers from the hetero interface, the active layer was designed to be thicker or wider. In the MQW structure, the number of well layers or the thickness of well layers is set to be large.

【0008】MQW構造では井戸層は通常4〜12nm
程度で、障壁層は閉じ込められた電子の波動関数が隣の
井戸層内の電子の波動関数と重ならないように、8〜1
2nmの厚さにするのが普通である。
In the MQW structure, the well layer is usually 4 to 12 nm.
To the extent that the wave functions of the confined electrons do not overlap with the wave functions of the electrons in the adjacent well layers.
It is usual to have a thickness of 2 nm.

【0009】長波長帯の高出力半導体レーザの量子井戸
層数は、通常4層前後が採用される。これはしきい値を
下げるために低電流領域での利用を重視しているためで
あり、注入キャリア密度、内部利得が高くなるSLDと
は事情が異なる。
The number of quantum well layers of a high-output semiconductor laser in a long wavelength band is usually about four. This is because the use in a low current region is emphasized in order to lower the threshold value, and is different from the SLD in which the injected carrier density and the internal gain are increased.

【0010】[0010]

【発明が解決しようとする課題】バルク構造では、状態
密度が2次関数型をしているので光出力を大きくしやす
い反面、スペクトル半値幅が小さくなってしまうという
問題がある。これに対して、MQW構造では、スペクト
ル幅が広い一方、LDと同様な構造では光出力を上げる
のが困難であった。そこで、SLDでは前述のように層
数や層厚を増やすことで光出力を大きくする設計として
いた。MQW構造では障壁層厚を薄くして波動関数が重
なってしまうと、井戸の数だけ量子準位が分裂して、微
分利得の低下などLDとしての素子性能に悪影響を及ぼ
すので、障壁層を薄くすることは困難である。トータル
の活性層厚が厚くなるSLDでは、注入キャリア、特
に、ホールが各井戸層に均一に注入されなくなる。その
結果発光効率が下がってしまう問題があった。
In the bulk structure, since the density of states is of a quadratic function type, the light output is easily increased, but the half-width of the spectrum is reduced. On the other hand, while the MQW structure has a wide spectrum width, it has been difficult to increase the optical output with a structure similar to the LD. Therefore, the SLD is designed to increase the light output by increasing the number of layers and the layer thickness as described above. In the MQW structure, if the wave functions overlap with each other by reducing the thickness of the barrier layer, quantum levels are split by the number of wells, which adversely affects the device performance as an LD, such as a decrease in differential gain. It is difficult to do. In an SLD in which the total active layer thickness is increased, injected carriers, particularly holes, are not uniformly injected into each well layer. As a result, there is a problem that the luminous efficiency is reduced.

【0011】[0011]

【課題を解決するための手段】本発明にかかるスーパー
ルミネットセントダイオードは、第1の導電型の半導体
基板1上に、第1の導電型のクラッド層2、多重量子井
戸構造を含む活性層3および第2の導電型のクラッド層
7の順に積層されてなるスーパールミネットセントダイ
オードであって、前記活性層の多重量子井戸構造は障壁
層5の層厚が4nm以下であり、かつ、井戸層4の層数
が5層以上であるものである。
A super luminescent diode according to the present invention comprises a first conductive type semiconductor substrate 1, a first conductive type cladding layer 2, and an active layer including a multiple quantum well structure. 3 and a cladding layer 7 of the second conductivity type in this order, wherein the multiple quantum well structure of the active layer has a barrier layer 5 having a layer thickness of 4 nm or less, and The number of the layers 4 is five or more.

【0012】[0012]

【発明の実施の形態】前述の問題点を解決するために本
発明は、MQW構造の障壁層の層厚を薄くすることを特
徴とする。これにより活性領域全体の厚さを増やさずに
井戸層数を増やすことができる。しかも、波動関数が互
いに結合するので量子井戸層数を増やしていった場合に
も活性層内キャリアの均一性が悪くなることがない。こ
のため従来の量子井戸構造より井戸層数を増やすことが
可能になる。SLDではLDよりもはるかにキャリア密
度が高くなるために、LDのようなしきい値電流付近で
の微分利得や状態密度の低下などの問題が少ない。バル
ク構造の活性層では、光出力の偏波消光比は5〜7dB
である。層数を多くすることで、バルク活性層のときを
上回る光出力とMQW構造の利点である高い偏波消光比
を、スペクトル半値幅を狭めることなく実現することが
できる。なお、信学技法0QE93−90,pp51−
56“電子のエンベロープ関数の最適化を計った多重量
子井戸LDの設計”で計算されているような、バリア層
厚を薄くすることで電子とホールのエンベロープ関数の
一致度が高くなることによる発光効率の向上をも期待で
きるという利点もある。
DESCRIPTION OF THE PREFERRED EMBODIMENTS In order to solve the above-mentioned problems, the present invention is characterized in that the thickness of a barrier layer of an MQW structure is reduced. Thereby, the number of well layers can be increased without increasing the thickness of the entire active region. Moreover, since the wave functions are coupled to each other, even when the number of quantum well layers is increased, the uniformity of carriers in the active layer does not deteriorate. Therefore, the number of well layers can be increased as compared with the conventional quantum well structure. Since the carrier density of the SLD is much higher than that of the LD, there are few problems such as a decrease in the differential gain and the state density near the threshold current as in the LD. In the active layer having the bulk structure, the polarization extinction ratio of the light output is 5 to 7 dB.
It is. By increasing the number of layers, it is possible to realize an optical output higher than that of the bulk active layer and a high polarization extinction ratio, which is an advantage of the MQW structure, without reducing the spectral half width. It should be noted that the IEICE technical technique 0QE93-90, pp51-
Light emission due to a higher degree of coincidence between the electron and hole envelope functions by reducing the thickness of the barrier layer, as calculated in 56 “Design of a Multiple Quantum Well LD Optimizing the Envelope Function of Electrons” There is also an advantage that efficiency can be improved.

【0013】このように、MQW構造の活性層を薄くす
ることにより活性領域全体の厚さを増やさずに井戸層数
を増やすことができる。その結果、ホールの注入効率が
落ちないため、高い発光効率と高い偏波消光比を得るこ
とができる。
As described above, by reducing the thickness of the active layer having the MQW structure, the number of well layers can be increased without increasing the thickness of the entire active region. As a result, since the hole injection efficiency does not decrease, a high luminous efficiency and a high polarization extinction ratio can be obtained.

【0014】[0014]

【実施例】本発明の一実施例としてRVN構造埋込みタ
イプのSLDを図1及び図2を参照して説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS As an embodiment of the present invention, an SLD of an RVN structure embedded type will be described with reference to FIGS.

【0015】図1は、この実施例の外観斜視図、図2は
MQW活性層の一実施例を説明するための模式的な図で
ある。
FIG. 1 is an external perspective view of this embodiment, and FIG. 2 is a schematic diagram for explaining an embodiment of an MQW active layer.

【0016】まず、MOVPE(有機金属気相成長法)
等の結晶成長装置を用いて、n−InP基板1に1.0
8μm組成のn−InGaAsP光閉じ込め層2を50
nm堆積し、その上にノンドープMQW活性層3を堆積
する。このノンドープMQW活性層は、例えば障壁層5
として1.08μmの組成波長で2nm、井戸層4とし
て1.35μmの組成波長で5nmの堆積を15周期繰
り返す。そして、その上に、1.08μm組成のp−I
nGaAsP光閉じ込め層6を50nm、p−InPク
ラッド層7を2μm,p+ −InGaAsPコンタクト
層8を0.2μmと順に積層する。
First, MOVPE (metal organic chemical vapor deposition)
Using a crystal growth apparatus such as
The n-InGaAsP light confinement layer 2 having a composition of 8 μm
Then, a non-doped MQW active layer 3 is deposited thereon. The non-doped MQW active layer includes, for example, a barrier layer 5
The deposition of 2 nm at a composition wavelength of 1.08 μm and the deposition of 5 nm at a composition wavelength of 1.35 μm as the well layer 4 are repeated for 15 periods. And, on top of that, pI of 1.08 μm composition
The nGaAsP light confinement layer 6 is laminated with a thickness of 50 nm, the p-InP cladding layer 7 with a thickness of 2 μm, and the p + -InGaAsP contact layer 8 with a thickness of 0.2 μm.

【0017】次に、前記エピウエハの表面にSiNx膜
をプラズマCVD等の方法で堆積する。そして、フォト
リソグラフィーによって(110)方向に長く伸びた幅
6μmのSiNx膜ストライプパターンに加工する。前
記SiNx膜パターンをマスクとして、HC1系エッチ
ング液、ブロムメタノールをもちいてメサエッチングを
行う。その上に、液相成長法によって電流狭窄のための
p−InP9及びn−InP10の電流ブロック層を積
層する。
Next, a SiNx film is deposited on the surface of the epi-wafer by a method such as plasma CVD. Then, it is processed into a 6 μm-wide SiNx film stripe pattern elongated in the (110) direction by photolithography. Using the SiNx film pattern as a mask, mesa etching is performed using an HC1-based etchant and bromomethanol. A current blocking layer of p-InP9 and n-InP10 for current confinement is stacked thereon by a liquid phase growth method.

【0018】次に、前記SiNx膜ストライプパターン
を形成したときと同様にして、MQW活性層3における
反射抑制のための溝パターン11を形成する。まず、ブ
ロムメタノール等でエッチングを行い、10μm程度の
溝11を掘る。
Next, a groove pattern 11 for suppressing reflection in the MQW active layer 3 is formed in the same manner as when forming the SiNx film stripe pattern. First, a groove 11 of about 10 μm is dug by etching with bromomethanol or the like.

【0019】次に、基板1側を研磨し100μm程度に
まで薄くした後、エピ面側にフォトリソグラフィーによ
ってフォトレジストのパターンを作成する。エピ面側P
側電極12(例えば、Zn:10nm、Au:50n
m)、基板1側にn側電極13(例えばAuGeの合
金:50nm)を蒸着してから、ウエハをアセントン中
に入れてリフトオフを行う。400℃程度のサーマルア
ニーリングで電極の金属と半導体を合金化する。劈開し
た後に両端面14にSiOxの無反射コーティングを蒸
着する。このように構成されたSLDにおいて、p−電
極12及びn−電極13より、電流注入領域15に電流
を注入すると、電流注入領域で発光した光は、非電流注
入領域16へ損失されながらガイドされて強度を低減さ
れるが、端面14で反射した光が再び電流注入領域15
に形成された光導波路(MQW活性層3)に結合しない
ように、溝11は、光導波路が延びる方向に対して傾き
を持って、かつ、深さ方向に対しても傾きをもって光導
波路を切断するように非電流注入領域に形成されてい
て、ファブリペローモードの発振を抑圧している。
Next, after the substrate 1 side is polished to a thickness of about 100 μm, a photoresist pattern is formed on the epi-plane side by photolithography. Epi surface side P
Side electrode 12 (for example, Zn: 10 nm, Au: 50 n
m), an n-side electrode 13 (for example, an AuGe alloy: 50 nm) is vapor-deposited on the substrate 1 side, and then the wafer is put into Ascenton to perform lift-off. The metal of the electrode and the semiconductor are alloyed by thermal annealing at about 400 ° C. After cleavage, a non-reflective coating of SiOx is deposited on both end surfaces 14. In the SLD configured as described above, when a current is injected from the p-electrode 12 and the n-electrode 13 into the current injection region 15, light emitted in the current injection region is guided while being lost to the non-current injection region 16. However, the light reflected by the end face 14 is again reflected by the current injection region 15.
The groove 11 cuts the optical waveguide with an inclination with respect to the direction in which the optical waveguide extends and also with an inclination with respect to the depth direction so as not to couple with the optical waveguide (the MQW active layer 3) formed at the bottom. And is formed in the non-current injection region to suppress the Fabry-Perot mode oscillation.

【0020】この実施例においては、MQW活性層3と
して、障壁層5の層厚を2nmまた、井戸層4の層厚を
5nmとする井戸を15周期繰返し形成することによ
り、MQW活性層3の層厚を厚くすることなく井戸層4
の層数を増やしたので、注入キャリア、特にホールのオ
ーバーフローがなく、ホールの注入効率が落ちないた
め、高い発光効率と高い偏波消光比を得ることができ
る。
In this embodiment, the MQW active layer 3 is formed by repeatedly forming a well with the barrier layer 5 having a thickness of 2 nm and the well layer 4 having a thickness of 5 nm for 15 periods. Well layer 4 without increasing the thickness
Since the number of layers is increased, there is no overflow of injected carriers, particularly holes, and the efficiency of hole injection does not decrease, so that a high luminous efficiency and a high polarization extinction ratio can be obtained.

【0021】なお、障壁層5の層厚は、LDの例では8
〜12nm程度であるが、本SLDでは、井戸層4の歪
みを形成しないようにして4nm以下とした。約4nm
以下になるとキャリア、特にホールの波動関数が互いに
結合が始まるため、量子井戸層内のキャリアの均一性が
向上する。また井戸層4の層数はLDでは5層以下で、
これより多くなると発振しきい値が高くなってしまう。
SLDでは電子及びホールの密度がLDと比べて高くな
るために、層数か層厚のいずれかを増やす必要がある。
従来の障壁層厚では5層以上の層厚になると発光効率が
落ちるため改善の効果が少なかった。障壁層を約4nm
以下にしておけば、層数を増やした場合にも発光効率が
劣化することがない。従って、本発明では、障壁層5の
層厚を4nm以下、井戸層4の層数を5以上として、S
LDとしての特徴的な構成とした。
The thickness of the barrier layer 5 is 8 in the LD example.
In the present SLD, the thickness is set to 4 nm or less so as not to form distortion of the well layer 4. About 4nm
Below this point, the wave functions of carriers, particularly holes, start to couple with each other, so that the uniformity of carriers in the quantum well layer is improved. The number of well layers 4 is 5 or less in LD.
If the number is larger than this, the oscillation threshold becomes high.
Since the density of electrons and holes is higher in SLD than in LD, it is necessary to increase either the number of layers or the layer thickness.
With the conventional barrier layer thickness, when the layer thickness is 5 or more, the luminous efficiency is reduced, so that the effect of improvement is small. About 4 nm barrier layer
In the following, the luminous efficiency does not deteriorate even when the number of layers is increased. Therefore, in the present invention, the thickness of the barrier layer 5 is set to 4 nm or less, and the number of the well layers 4 is set to 5 or more.
It has a characteristic configuration as an LD.

【0022】なお、前述した実施例では結晶成長装置に
MOVPE法を用いているが、MBE法やMOBE法、
LPE法を用いることもできる。また、SLDの作成方
法において、埋込み構造はRVN構造でなくDC−PB
H構造などでも実現可能である。また、反射率抑制構造
に溝構造でなく窓構造や斜めストライプなどの方法で構
成してもよい。
Although the MOVPE method is used for the crystal growth apparatus in the above-described embodiment, the MBE method, the MOBE method,
The LPE method can also be used. Also, in the SLD creation method, the embedded structure is not an RVN structure but a DC-PB
It can also be realized with an H structure or the like. Further, instead of the groove structure, the reflectivity suppressing structure may be configured by a window structure, a diagonal stripe, or the like.

【0023】次に本発明のSLDを光源としたファイバ
ジャイロについて図3を参照して説明する。
Next, a fiber gyro using the SLD of the present invention as a light source will be described with reference to FIG.

【0024】ジャイロは、外部からの情報がなくても、
それが取り付けられた移動体の角速度や角度を検出し
て、位置の計測や制御をするためのセンサである。ファ
イバジャイロは光ファイバをコイル状にして、両方向か
らコヒーレント光を入射し、サニヤック効果を利用して
回転の速度や角度を検知するものである。光ファイバ
は、通常、偏波保持型を用い、SLDからの出力はその
片側の偏光方向の光のみが使用される。
The gyro can be used without any external information.
It is a sensor for detecting the angular velocity and angle of the moving body to which it is attached, and measuring and controlling the position. The fiber gyro is a type in which an optical fiber is formed into a coil shape, coherent light is incident from both directions, and the speed and angle of rotation are detected by using the Sannyak effect. The optical fiber usually uses a polarization maintaining type, and the output from the SLD uses only the light in the polarization direction on one side thereof.

【0025】図3はファイバジャイロの原理を示す図で
ある。
FIG. 3 shows the principle of the fiber gyro.

【0026】図において、41は本発明に係るSLD,
42は光を透過及び反射させる半透明板,43は光ファ
イバ,44は干渉出力光である。SLD41から出力さ
れたコヒーレント光は半透明板42を透過して光ファイ
バ43の一端43aから光ファイバ43に入射され、コ
イル状に巻かれた光ファイバ43を矢印a方向に通過し
て、半透明板42を透過して出力部44から出力光aと
して出力されるとともに、SLD41から出力されたコ
ヒーレント光の一部は、半透明板42で反射して光ファ
イバ43にその他端から入射され、コイル状に巻かれた
光ファイバ43を矢印b方向に通過して、半透明板42
で反射されて出力部44から出力光bとして出力され
る。サニヤック効果は、このように閉じた光路を反対方
向に伝搬する光は、伝搬時間(位相)が閉光路の回転角
速度に比例して変化する現象であり、ファイバジャイロ
は、光ファイバ43の一端43aから入射された光と他
端43bから入射された光との位相の変化を干渉などに
より検知して、回転角速度を光干渉などによって検知す
るものである。
In the figure, reference numeral 41 denotes an SLD according to the present invention,
42 is a translucent plate for transmitting and reflecting light, 43 is an optical fiber, and 44 is interference output light. The coherent light output from the SLD 41 passes through the translucent plate 42, enters the optical fiber 43 from one end 43a of the optical fiber 43, passes through the optical fiber 43 wound in a coil shape in the direction of arrow a, and becomes translucent. The light transmitted through the plate 42 is output from the output unit 44 as output light a, and a part of the coherent light output from the SLD 41 is reflected by the translucent plate 42 and is incident on the optical fiber 43 from the other end. Through the optical fiber 43 wound in the direction of arrow b,
And is output from the output unit 44 as output light b. The Sagnac effect is a phenomenon in which the light propagating in the opposite direction through the closed optical path changes the propagation time (phase) in proportion to the rotational angular velocity of the closed optical path. The change in phase between the light incident from the other end and the light incident from the other end 43b is detected by interference or the like, and the rotational angular velocity is detected by light interference or the like.

【0027】ファイバジャイロは、閉光路の面積が大き
いほど、また光源の光パワーが大きいほど、ゆっくりし
た回転角度を検出することができる。本発明のSLDで
は、従来以上の出力を大きな偏波消光比で得られる。従
来のバルク構造のSLDと偏波消光比を比較すると、約
10dB以上改善されている。同じ出力で換算しても有
効な出力が約2割向上することになるため、ファイバジ
ャイロの可能性を大きく改善することができる。
The fiber gyro can detect a slower rotation angle as the area of the closed optical path is larger and the light power of the light source is larger. With the SLD of the present invention, an output higher than the conventional one can be obtained with a large polarization extinction ratio. When the polarization extinction ratio is compared with that of the conventional bulk-structured SLD, it is improved by about 10 dB or more. Even if the same output is converted, the effective output is improved by about 20%, so that the possibility of the fiber gyro can be greatly improved.

【0028】[0028]

【発明の効果】本発明のスーパールミネッセントダイオ
ードは、第1の導電型の半導体基板1上に、第1の導電
型のクラッド層2、多重量子井戸構造を含む活性層3お
よび第2の導電型のクラッド層7の順に積層されてなる
スーパールミネッセントダイオードであって、前記活性
層の多重量子井戸構造は障壁5の層が4nm以下であ
り、かつ、井戸層4の層数が5層以上であるので、電流
注入領域15において、ホールの注入効率を保ち、高い
発光効率と、高い偏波消光比を得ることができる。これ
によりファイバジャイロにおいて、高い検出分解能を得
ることが可能になる。
The superluminescent diode of the present invention comprises a first conductive type cladding layer 2, an active layer 3 having a multiple quantum well structure, and a second conductive type semiconductor substrate 1 on a first conductive type semiconductor substrate 1. A superluminescent diode having a conductive type clad layer 7 stacked in this order, wherein the multiple quantum well structure of the active layer has a barrier 5 layer of 4 nm or less and a number of well layers 4 of 5 Since the number of layers is equal to or greater than the number of layers, in the current injection region 15, the hole injection efficiency can be maintained, and a high luminous efficiency and a high polarization extinction ratio can be obtained. This makes it possible to obtain a high detection resolution in the fiber gyro.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のスーパールミネッセントダイオードの
一実施例を示す斜視図である。
FIG. 1 is a perspective view showing one embodiment of a super luminescent diode of the present invention.

【図2】本発明のスーパールミネッセントダイオードの
MQW活性層の一実施例を示す模式図である。
FIG. 2 is a schematic view showing one embodiment of an MQW active layer of the super luminescent diode of the present invention.

【図3】ファイバジャイロの原理を示す図である。FIG. 3 is a diagram illustrating the principle of a fiber gyro.

【図4】従来のスーパールミネッセントダイオードを示
す図である。
FIG. 4 is a diagram showing a conventional superluminescent diode.

【符号の説明】[Explanation of symbols]

1 n−InP基板(半導体基板) 2 n−InGaAsP光閉じ込め層 3 MQW活性層 4 井戸層 5 障壁層 6 p−InGaAsP光閉じ込め層 7 p−InP(クラッド層) 8 p+ −InGaAsP(コンタクト層) 9 p−InP(電流ブロック層) 10 n−InP(電流ブロック層) 11 溝 12 p−電極(エピ面側p側電極) 13 n−電極(n側電極) 14 無反射コート 15 電流注入領域 16 非電流注入領域Reference Signs List 1 n-InP substrate (semiconductor substrate) 2 n-InGaAsP light confinement layer 3 MQW active layer 4 well layer 5 barrier layer 6 p-InGaAsP light confinement layer 7 p-InP (cladding layer) 8 p + -InGaAsP (contact layer) Reference Signs List 9 p-InP (current blocking layer) 10 n-InP (current blocking layer) 11 groove 12 p-electrode (p-side electrode on epi-face side) 13 n-electrode (n-side electrode) 14 anti-reflection coat 15 current injection region 16 Non-current injection area

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 第1の導電型の半導体基板(1)上に、
第1の導電型のクラッド層(2)、多重量子井戸構造を
含む活性層(3)および第2の導電型のクラッド層
(7)の順に積層されてなるスーパールミネッセントダ
イオードであって、前記活性層の多重量子井戸構造は障
壁層(5)の層厚が4nm以下であり、かつ、井戸層
(4)の層数が5層以上であることを特徴とするスーパ
ールミネッセントダイオード。
1. A semiconductor device of a first conductivity type, comprising:
A super luminescent diode comprising a first conductive type clad layer (2), an active layer (3) having a multiple quantum well structure, and a second conductive type clad layer (7) stacked in this order, A super luminescent diode, wherein the multiple quantum well structure of the active layer has a barrier layer (5) with a layer thickness of 4 nm or less and a well layer (4) with five or more layers.
JP8005398A 1998-03-27 1998-03-27 Super luminescent diode Expired - Fee Related JP3712855B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8005398A JP3712855B2 (en) 1998-03-27 1998-03-27 Super luminescent diode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8005398A JP3712855B2 (en) 1998-03-27 1998-03-27 Super luminescent diode

Publications (2)

Publication Number Publication Date
JPH11284223A true JPH11284223A (en) 1999-10-15
JP3712855B2 JP3712855B2 (en) 2005-11-02

Family

ID=13707507

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Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2006075759A1 (en) * 2005-01-17 2008-06-12 アンリツ株式会社 Semiconductor optical device having broad light spectrum emission characteristics, manufacturing method thereof, and external cavity semiconductor laser using the same
JP2010141039A (en) * 2008-12-10 2010-06-24 Hamamatsu Photonics Kk Super-luminescent diode
KR20130007918A (en) * 2011-07-11 2013-01-21 엘지이노텍 주식회사 Light emitting device, method for fabricating the same, and light emitting device package
KR20140040386A (en) * 2012-09-26 2014-04-03 엘지이노텍 주식회사 Light emitting device
KR20140052572A (en) * 2012-10-25 2014-05-07 엘지이노텍 주식회사 Light emitting device
KR20140119704A (en) * 2012-01-20 2014-10-10 오스람 옵토 세미컨덕터스 게엠베하 Light-emitting diode chip

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2006075759A1 (en) * 2005-01-17 2008-06-12 アンリツ株式会社 Semiconductor optical device having broad light spectrum emission characteristics, manufacturing method thereof, and external cavity semiconductor laser using the same
JP4571635B2 (en) * 2005-01-17 2010-10-27 アンリツ株式会社 Super luminescent diode
JP2010141039A (en) * 2008-12-10 2010-06-24 Hamamatsu Photonics Kk Super-luminescent diode
KR20130007918A (en) * 2011-07-11 2013-01-21 엘지이노텍 주식회사 Light emitting device, method for fabricating the same, and light emitting device package
KR20140119704A (en) * 2012-01-20 2014-10-10 오스람 옵토 세미컨덕터스 게엠베하 Light-emitting diode chip
KR20140040386A (en) * 2012-09-26 2014-04-03 엘지이노텍 주식회사 Light emitting device
KR20140052572A (en) * 2012-10-25 2014-05-07 엘지이노텍 주식회사 Light emitting device

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