JPH11281953A - Power source circuit for display element and method for generating driving voltage - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a display driving power source circuit which has a low power consumption by reducing the current consumption in a voltage division circuit which generates plural bias voltages. SOLUTION: A boosting circuit 210 raises a supply voltage VDD and supplies this raised voltage to a voltage division circuit 230. A switch control circuit 231 of the voltage division circuit 230 turns on or off switches SW1 to SW8 in accordance with the clock signal from a timing circuit and repeatedly supplies the electric charge of a charge carrying capacitor CC to charge storage capacitors C1 to C3 in a prescribed order. This operation is repeated to charge the charge storage capacitors C1 to C3 with a voltage ratio of about 1:2:3. Voltages in both ends of charge storage capacitors C1 to C3 are outputted as driving voltages V1 to V3 through voltage follower circuits VF1 to VF3 and voltage stabilizing capacitors C1' to C3'. Since capacitors are used to divide the boosted voltage in this manner, the through current of the voltage division circuit is eliminated to reduce the power consumption.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply circuit for generating a plurality of bias voltages for driving a display element and a method for generating the bias voltage, and more particularly to a power supply circuit for a display element with reduced power consumption. The present invention relates to a method for generating a driving voltage.

[0002]

2. Description of the Related Art As shown in FIG. 5, a power supply circuit of a liquid crystal display element generates a high voltage by boosting a supplied power supply voltage, and generates the high voltage by a plurality of resistors connected in series. The voltage is divided by a voltage dividing circuit having a voltage resistance, and a plurality of bias voltages for driving the liquid crystal display element are generated from each voltage dividing point via a voltage follower.

[0003]

SUMMARY OF THE INVENTION In a conventional power supply circuit,
As described above, since the boosted high voltage is divided by the plurality of voltage-dividing resistors connected in series, a through current always flows through the plurality of voltage-dividing resistors, resulting in a problem of high power consumption.

In order to reduce the shoot-through current, a method of connecting a voltage dividing capacitor in series instead of the voltage dividing resistor shown in FIG. However, in this method, the charge once accumulated in each voltage dividing capacitor is discharged through the voltage follower, and the charge is not replenished. Inability to perform partial pressure.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems of the prior art, and has a low power consumption by reducing a current consumption in a voltage dividing circuit for generating a plurality of bias voltages. It is another object to provide a display driving power supply circuit.

[0006]

In order to achieve the above object, a power supply circuit for a display element according to a first aspect of the present invention comprises:
The charge storage capacitors connected between each output line and the ground potential to maintain the voltage of the output line outputting a different voltage and the charge transfer capacitor charged to a voltage lower than that voltage by the input voltage. And a control circuit for sequentially switching and connecting the charge transfer capacitors between the output lines including the ground potential and charging the charge storage capacitors to different voltages.

According to this configuration, the charge transport capacitor charged to a voltage lower than the input voltage is provided, and the voltage charged in the charge transport capacitor is distributed to the charge storage capacitor, thereby dividing the high voltage. As a result, current flowing through the voltage dividing circuit does not occur, and power consumption of the power supply circuit can be reduced.

The control circuit includes a first connection switching circuit for charging the charge transport capacitor by connecting the charge transport capacitor and at least one of the charge storage capacitors in series and connecting the input voltage to an input voltage. It is desirable to have.

Further, the control circuit connects the charge transfer capacitor in parallel with one of the charge storage capacitors to charge the charge storage capacitor, and the charged charge storage capacitor and the charge transfer capacitor It is desirable to include a second connection switching circuit that switches the connection of each of the capacitors so that the other charge storage capacitors are further charged by the voltage across the series connection circuit.

According to this configuration, the charge transport capacitor is charged with a voltage lower than the input voltage by the first switching connection circuit, and the connection with another charge storage capacitor is sequentially switched by the second switching connection circuit. As a result, each charge storage capacitor is charged. Therefore, a current flowing through the voltage dividing circuit does not occur, and power consumption of the power supply circuit can be reduced.

The charge storage capacitors each have substantially the same capacitance, and the charge transfer capacitor has a ratio of internally dividing the input voltage by a voltage obtained by dividing the input voltage by the number of divisions. It is desirable to have a capacitance according to the following.

According to a second aspect of the present invention, there is provided a method for generating a voltage for driving a liquid crystal display element, comprising: a boosting step of boosting a supplied voltage; and a charge carrier using the boosted voltage in the boosting step. By charging a capacitor, connecting this charge-carrying capacitor and an arbitrary capacitor in series, and connecting this series circuit and another capacitor in parallel while replacing the connected capacitor, multiple capacitors can be used. And a voltage dividing step of outputting the charging voltages of the plurality of capacitors as voltages obtained by dividing the voltages boosted in the boosting step.

According to this configuration, the charge-carrying capacitor is charged by using the boosted voltage, the charge-carrying capacitor is connected to an arbitrary capacitor in series, and the series circuit and another capacitor are connected in parallel. This operation is repeated while replacing the connected capacitor, thereby dividing the high voltage. Therefore, a current flowing through the voltage dividing circuit does not occur, and the power consumption of the power supply circuit can be reduced.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a liquid crystal display according to an embodiment of the present invention will be described with reference to the drawings. This liquid crystal display device has a liquid crystal display element 1 as shown in FIG.
0 and a drive circuit 20.

As schematically shown in FIG. 1, the liquid crystal display element 10 includes a plurality of signal electrodes 11, a plurality of scanning electrodes 13 arranged orthogonally to the signal electrodes 11, a signal electrode 11, a scanning electrode 13, and the like. And a liquid crystal layer 15 disposed between the signal electrodes 11 and the scanning electrodes 13 to constitute a plurality of regions or pixels where the signal electrodes 11 and the scanning electrodes 13 face each other, and a voltage applied between the signal electrodes 11 and the scanning electrodes 13. The display is performed by changing the alignment state of the liquid crystal of the pixel according to.

The drive circuit 20 is a circuit for controlling and driving the liquid crystal display element 10. As schematically shown in FIG. 1, a power supply circuit 21, a signal drive circuit 23, a scan drive circuit 25 and a timing It is composed of a circuit 27.

As shown in FIG. 2, the power supply circuit 21 includes a booster circuit 210 and a voltage divider 230 for dividing the voltage boosted by the booster circuit 210.
Drive voltages V4, V3, V2, V1 (V
4>V3>V2> V1) and the reference voltage V0 (V1> V
0), and the signal drive circuit 23 and the scan drive circuit 25
To supply. Further, the power supply circuit 21 is formed integrally with the signal drive circuit 23, the scan drive circuit 25, the timing circuit 27, and the like in an integrated circuit (LSI), for example.

The boosting circuit 210 boosts the power supply voltage VDD supplied from the outside, such as a battery, and supplies the boosted voltage Vpr to the voltage dividing circuit 230. The voltage dividing circuit 230 is
Drive voltages V4, V3,
V2 and V1 are generated, and a reference voltage V0 serving as a reference of the drive voltage is generated and output. This voltage dividing circuit 230
As shown in FIG. 2, the switch control circuit 231, the switch groups SW1 to SW8, the charge transfer capacitors CC, the charge storage capacitors C1 to C4, the voltage follower circuits VF1 to VF4, and the voltage stabilization capacitors C1 'to
C4 '.

The switch control circuit 231 turns on and off a switch group SW1 to SW8 composed of semiconductor switches and the like in a time sequence shown in FIG.
The connection relationship between C1 and C3 is switched.

The charge transport capacitor CC includes a switch group S
By opening and closing W1 to SW8, the charge storage capacitor C1
To C3 are sequentially switched to supply charges to the charge storage capacitors C1 to C3. The charge storage capacitors C1 to C3 store the charge supplied from the charge transfer capacitor CC and supply a voltage corresponding to the stored charge to the corresponding voltage follower circuits VF1 to VF3.
For example, assuming that the capacitances of the capacitors are equal, each of the charge storage capacitors C1, C2, and C3 is approximately 1: 2:
The charge is accumulated at a voltage ratio of 3 and supplied to the corresponding voltage follower circuits VF1 to VF3.

Voltage follower circuits VF1 to VF3
Are the corresponding charge storage capacitors C1 to C3
Amplifies the output voltage from the amplifier by 1 (impedance conversion)
And output. In addition, the voltage follower circuit VF4
Amplifies (impedance conversion) the boosted voltage Vpr from the booster circuit 210 by a factor of 1 and outputs it. The voltage stabilizing capacitors C1 'to C4' stabilize output voltages from the corresponding voltage follower circuits VF1 to VF4, and output the output voltages as drive voltages V1 to V4 of the liquid crystal display element 10.

The signal drive circuit 23 generates a signal voltage by sequentially selecting an appropriate voltage from the reference voltage V0 output from the power supply circuit 21 and a plurality of drive voltages V1 to V4 in accordance with an external display signal. In accordance with a timing signal from the timing circuit 27, a signal voltage is supplied to each signal electrode 11 of the liquid crystal display element 10.

The scan drive circuit 25 sequentially selects an appropriate voltage from the reference voltage V0 output from the power supply circuit 21 and a plurality of drive voltages V1 to V4 to generate a scan voltage. According to the signal, a scanning signal voltage is sequentially supplied to each scanning electrode 13 of the liquid crystal display element 10.

The timing circuit 27 controls the operation timing of the entire drive circuit 20. For example, a switch group SW
A reference clock for opening and closing 1 to SW8 is supplied to the switch control circuit 213. In addition, a timing signal for outputting a signal voltage and a scanning voltage to the signal driving circuit 23 and the scanning driving circuit 25 is supplied.

Next, the operation of the liquid crystal display device thus configured will be described. The drive circuit 20 is supplied with a power supply voltage VDD. The supplied power supply voltage VDD is supplied to the booster 21
0, and a voltage dividing circuit 230 as a boosted voltage Vpr.
Supplied to The switch control circuit 231 first turns on the switches SW1 and SW2 according to the clock signal supplied from the timing circuit 27, as shown in FIG. Then, the charge transport capacitor CC and the charge storage capacitor C3 are connected in series. Therefore, the charge storage capacitor C3 changes the boosted voltage Vpr to the charge transfer capacitor C3.
It is charged with a voltage divided according to the capacitance ratio between C and the charge storage capacitor C3.

Next, as shown in FIG. 3, the switch control circuit 231 turns off the switches SW1 and SW2 and turns on the switches SW7 and SW8. As a result, the charge storage capacitor C1 is connected in parallel to the charge transfer capacitor CC. Accordingly, the charge storage capacitor C1 is charged to a voltage lower than the voltage of the charge transfer capacitor CC according to the ratio of the capacitance of the charge transfer capacitor CC to the sum of the charge transfer capacitor CC and the charge storage capacitor C1. .

Next, as shown in FIG. 3, the switch control circuit 231 turns off the switches SW7 and SW8 and turns on the switches SW5 and SW6. Thereby, the charge storage capacitor C2 is connected in parallel to the series circuit of the charge transfer capacitor CC and the charge storage capacitor C1. Therefore, the charge storage capacitor C2 is charged at a high voltage obtained by adding the charge voltage of the charge storage capacitor C1 to the charge voltage of the charge storage capacitor C1, and is charged to a higher voltage than the charge storage capacitor C1.

Next, as shown in FIG. 3, the switch control circuit 231 turns off the switches SW5 and SW6 and turns on the switches SW3 and SW4. Thereby, the charge storage capacitor C3 is connected in parallel to the series circuit of the charge transfer capacitor CC and the charge storage capacitor C2. Therefore, the charge storage capacitor C3 is charged at a high voltage obtained by adding the charge voltage of the charge storage capacitor C2 to the charge voltage of the charge storage capacitor C2, and is charged to a voltage higher than the charge voltage of the charge storage capacitor C2. .

That is, the switch control circuit 231 controls the switch groups SW1 to SW8, first connects the charge transfer capacitor CC and the charge storage capacitor C3 in series, and applies a voltage lower than the boosted voltage Vpr to the charge transfer capacitor CC. To charge the charge storage capacitor C1 with the voltage charged in the charge transfer capacitor CC, and sequentially add the voltage of the charge transfer capacitor CC to the charge voltage of the already charged charge storage capacitors C1 and C2. With this, the charge storage capacitors C2 and C3 at the next stage are sequentially charged.

By repeating such a switching operation of the switch groups SW1 to SW8 at high speed and a plurality of times, the charge storage capacitors C1, C2 and C3 are gradually charged and maintained at a stable potential. The voltages charged in the charge storage capacitors C1, C2, and C3 can be selected by appropriately setting the capacitances of the charge storage capacitors C1, C2, and C3 and the charge transfer capacitor CC. For example, by setting the respective capacitances of the charge storage capacitors C1, C2, and C3 equal and setting the ratio of the capacitance of the charge transfer capacitor CC to the capacitance of the charge storage capacitor C3 to 3: 1, the switching of the switches is performed. By repetition, finally, the charge storage capacitor C1 is charged with a voltage of approximately Vpr / 4, the charge storage capacitor C2 is charged with a voltage of approximately 2 Vpr / 4, and the charge storage capacitor C3 is charged with a voltage of approximately 3 Vpr / 4. The battery is charged at a voltage of / 4. That is, the boosted voltage Vpr is divided into four.

Then, each of the charge storage capacitors C1 to C
3 is charged to a voltage follower circuit VF1.
To VF3, and is further stabilized by voltage stabilizing capacitors C1 'to C3'. The driving voltages V1 (Vpr / 4), V2 (2 · Vpr / 4), V
3 (3 · Vpr / 4). The boosted voltage Vpr from the boosting circuit 210 is impedance-converted by a voltage follower circuit VF4, further stabilized by a voltage stabilizing capacitor C4 ', and
It is output as (4 · Vpr / 4).

The signal drive circuit 23 generates a signal voltage by sequentially selecting an appropriate voltage from the reference voltage V0 and the drive voltages V1 to V4 in accordance with the supplied display signal, and according to the timing signal from the timing circuit 27. A signal voltage is applied to each signal electrode 11.

The scanning drive circuit 25 sequentially selects an appropriate voltage from the reference voltage V0 and the driving voltages V1 to V4 in accordance with the voltage switching signal to generate a scanning voltage, and sequentially applies a scanning period to each of the scanning electrodes 13. Is applied.

As described above, the scanning electrode 13 and the signal electrode 11 are controlled by the scanning signal applied to the selected scanning electrode 13 of the liquid crystal display element 10 and the signal voltage supplied to the signal electrode 11 in synchronization with the scanning signal. A voltage is applied during this period, and lighting of a plurality of pixels according to the display signal is controlled, whereby desired data can be displayed.

As described above, in the liquid crystal display device according to this embodiment, the power supply circuit 21 includes the plurality of charge storage capacitors C1 to C3 and the charge transfer capacitors C1 to C3.
Since a plurality of drive voltages are generated by dividing the high voltage by distributing the voltage charged to C, a current flowing through the voltage dividing circuit can be eliminated. Therefore, as compared with the case where a resistor is provided in a voltage dividing circuit to divide a high voltage as in the related art, an invalid current is eliminated, and current consumption can be reduced.

It should be noted that the present invention is not limited to the above embodiment, and various modifications and applications are possible. For example, in the above description, the impedance was converted by the voltage follower circuits VF1 to VF4. However, the voltage stabilizing capacitors C1 'to C1'
When externally connecting 4 ', the voltage follower circuit VF1
To VF4 may be omitted. Further, when the voltage follower circuits VF1 to VF4 are provided, the capacitance of the external capacitor is reduced as compared with the case where the voltage follower circuits are not provided,
Alternatively, the drive circuit 20 can be used without an external capacitor, and part or all of the drive circuit 20 can be built in the LSI.

In the above embodiment, three charge storage capacitors C1 to C3 are provided to divide the boosted voltage into four parts.
Although the drive voltages V1 to V3 (V4 is a boost voltage and V0 is a ground voltage) are generated, a charge storage capacitor may be further provided to generate five or more drive voltages. In this way, more drive voltages can be generated. In addition, the number of charge storage capacitors was set to two,
Two types of drive voltages may be generated.

That is, the present invention provides a charge storage capacitor C
1 to CN are provided, and the boosted voltage is divided by N + 1 to obtain V1 to CN.
The present invention can be widely applied to the case of generating VN (including the boosted voltage itself and the ground voltage V0 as necessary). In this case, the charge transfer capacitor CC and the N-th capacitor CN are connected in series and charged with the boosted voltage, and then the charge transfer capacitor CC and the first capacitor C1 are connected in parallel to The charge of the capacitor CC is supplied to the first capacitor C1.
(I is a natural number of 1 or more and less than N) in series, and the series circuit is connected in parallel to the (i + 1) th capacitor Ci + 1 to transfer the charge of the charge carrier capacitor CC to the (i +) th capacitor. The same operation may be repeated by sequentially supplying the same to the one capacitor Ci + 1.

In the above embodiment, the voltage stabilizing capacitors C1 'to C4' are provided. However, when the size of the display element is small, the voltage stabilizing capacitors C1 'to C4' may not be provided. In this way, the configuration of the LSI can be simplified.

Further, the configuration of the booster circuit described in the above embodiment can be arbitrarily modified and applied.
The configuration as shown in FIG. In this case, as shown in FIG. 4, the booster circuit 210 includes a booster circuit 211, an amplifier 213, a smoothing capacitor C ′, and a booster capacitor C ′.
pr and resistors R1 and R2. Booster circuit 211
Supplies and boosts the power supply voltage VDD supplied from the outside using a boosting capacitor Cpr and a smoothing capacitor C ′, and supplies the boosted voltage to the amplifier 213. The amplifier 213 uses the boosted voltage supplied from the booster circuit 211 as a power supply, and supplies a reference voltage VRE supplied from the outside.
F is amplified about {(R1 + R2) / R2} times, and the amplified voltage Vpr is supplied to the voltage dividing circuit 230 of FIG. In this way, a voltage higher than the power supply voltage VDD is applied to the voltage dividing circuit 230.
And the voltage dividing circuit 230 supplies the power supply voltage V
A voltage higher than DD can be generated.

Further, in the above-described embodiment, the case where the display element is the simple matrix type liquid crystal display element 10 has been described, but the configuration of the display element is arbitrary. For example,
As a display element, an active matrix type liquid crystal display element using a TFT or MIM can be used.

The configuration of the timing circuit 27 can be arbitrarily changed, and the image signal may be a digital signal or an analog signal.

Further, the driving circuit of the present invention is not limited to a driving circuit for a liquid crystal display element, but includes a PDP (plasma display panel), an EL (electroluminescence) panel, and a FED (field emission display).
The present invention can be widely applied as a driving circuit for driving such as.

[0044]

As described above, according to the present invention,
Since the voltage charged in the charge carrier capacitor CC is distributed to the charge storage capacitor, the high voltage is divided, so that no current flows through the voltage divider circuit, and the power supply circuit is not consumed. The power can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a power supply circuit shown in FIG.

FIG. 3 shows the ON / OFF state of switch groups SW1 to SW8 shown in FIG.
6 is a timing chart showing an off timing.

FIG. 4 is a block diagram illustrating a modification of the configuration of the booster circuit in FIG. 2;

FIG. 5 is a diagram showing a configuration of a conventional power supply circuit.

[Description of Signs] 10 ... Liquid crystal display element, 11 ... Signal electrode, 13 ... Scan electrode, 15 ... Liquid crystal layer, 20 ... Drive circuit, 21 ... Power supply circuit, 23 ... ..Signal drive circuits, 25... Scan drive circuits, 2
7 timing circuit, 210 boost circuit, 230
Voltage divider circuit, 231, switch control circuit

Claims (5)

[Claims] 1. A charge transfer capacitor which is charged to a voltage lower than the voltage by an input voltage, and between each output line and a ground potential to maintain a voltage of an output line outputting a different voltage. A charge storage capacitor connected thereto; and a control circuit for sequentially switching and connecting the charge transfer capacitor between the output lines including the ground potential and charging the charge storage capacitors to different voltages. A power supply circuit for a display element, comprising: 2. A first connection switching circuit for charging the charge transport capacitor by connecting the charge transport capacitor and at least one of the charge storage capacitors in series and connecting the input voltage to the input voltage. The power supply circuit for a display element according to claim 1, further comprising a circuit. 3. The control circuit connects the charge transport capacitor in parallel with one of the charge storage capacitors to charge the charge storage capacitor. The charged charge storage capacitor and the charge transport capacitor 3. A second connection switching circuit for switching the connection of each capacitor so as to further charge another capacitor for charge storage according to the voltage between both ends of the series connection circuit of claim 1 or 2. Power supply circuit of the display element. 4. The charge storage capacitor according to claim 1, wherein each of said charge storage capacitors has a substantially equal capacitance, and said charge transfer capacitor has a ratio of internally dividing said input voltage by a voltage obtained by dividing said input voltage by a division number. The power supply circuit for a display element according to any one of claims 1 to 3, wherein the power supply circuit has a capacitance according to the following. 5. A method for generating a voltage for driving a liquid crystal display element, comprising: a boosting step of boosting a supplied voltage; and charging a charge carrier capacitor using the boosted voltage in the boosting step. By connecting this charge-carrying capacitor and any capacitor in series and repeating the operation of connecting this series circuit and other capacitors in parallel while replacing the connected capacitors, multiple capacitors can be connected at different voltages. A driving step for driving a liquid crystal display element, comprising: a charging step of charging; and a voltage dividing step of outputting a charging voltage of the plurality of capacitors as a voltage obtained by dividing the voltage boosted in the boosting step. Voltage generation method.